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From: Andrew Lunn <andrew@lunn.ch>
To: Robert Marko <robert.marko@sartura.hr>
Cc: gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com,
	robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/4] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins
Date: Mon, 27 Sep 2021 18:38:04 +0200	[thread overview]
Message-ID: <YVHzbLJTFgOdVWQx@lunn.ch> (raw)
In-Reply-To: <20210927154159.2168500-3-robert.marko@sartura.hr>

On Mon, Sep 27, 2021 at 05:41:58PM +0200, Robert Marko wrote:
> Both the Topaz switch and 88E1512 PHY have their reset and interrupts
> connected to the SoC.
> 
> So, define the Topaz and 88E1512 reset pins in the DTS.
> 
> Defining the interrupt pins wont work as both the 88E1512 and the
> Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller
> only supports edge triggers.
> 88E1512 would require special setup anyway as its INT pin is shared with
> the LED2 and you first need to configure it as INT.
> 
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

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WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Robert Marko <robert.marko@sartura.hr>
Cc: gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com,
	robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/4] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins
Date: Mon, 27 Sep 2021 18:38:04 +0200	[thread overview]
Message-ID: <YVHzbLJTFgOdVWQx@lunn.ch> (raw)
In-Reply-To: <20210927154159.2168500-3-robert.marko@sartura.hr>

On Mon, Sep 27, 2021 at 05:41:58PM +0200, Robert Marko wrote:
> Both the Topaz switch and 88E1512 PHY have their reset and interrupts
> connected to the SoC.
> 
> So, define the Topaz and 88E1512 reset pins in the DTS.
> 
> Defining the interrupt pins wont work as both the 88E1512 and the
> Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller
> only supports edge triggers.
> 88E1512 would require special setup anyway as its INT pin is shared with
> the LED2 and you first need to configure it as INT.
> 
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

  reply	other threads:[~2021-09-27 16:40 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-27 15:41 [PATCH 1/4] arm64: dts: marvell: espressobin-ultra: enable UART output by default Robert Marko
2021-09-27 15:41 ` Robert Marko
2021-09-27 15:41 ` [PATCH 2/4] arm64: dts: marvell: espressobin-ultra: fix SPI-NOR config Robert Marko
2021-09-27 15:41   ` Robert Marko
2021-09-27 15:41 ` [PATCH 3/4] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins Robert Marko
2021-09-27 15:41   ` Robert Marko
2021-09-27 16:38   ` Andrew Lunn [this message]
2021-09-27 16:38     ` Andrew Lunn
2021-09-28 15:32   ` Pali Rohár
2021-09-28 15:32     ` Pali Rohár
2021-09-28 16:02     ` Robert Marko
2021-09-28 16:02       ` Robert Marko
2022-09-24 12:03       ` Pali Rohár
2022-09-24 12:03         ` Pali Rohár
2021-09-27 15:41 ` [PATCH 4/4] arm64: dts: marvell: espressobin-ultra: enable front USB3 port Robert Marko
2021-09-27 15:41   ` Robert Marko
2021-09-28 15:37   ` Pali Rohár
2021-09-28 15:37     ` Pali Rohár
2021-09-28 16:02     ` Robert Marko
2021-09-28 16:02       ` Robert Marko
2021-09-27 16:37 ` [PATCH 1/4] arm64: dts: marvell: espressobin-ultra: enable UART output by default Andrew Lunn
2021-09-27 16:37   ` Andrew Lunn
2021-09-28 15:13 ` Pali Rohár
2021-09-28 15:13   ` Pali Rohár
2021-09-28 15:49   ` Robert Marko
2021-09-28 15:49     ` Robert Marko

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