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From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Mark Brown <broonie@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Sergei Shtylyov <sergei.shtylyov@gmail.com>,
	devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Prabhakar <prabhakar.csengg@gmail.com>,
	Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 6/6] memory: renesas-rpc-if: Add support for RZ/G2L
Date: Tue, 5 Oct 2021 11:14:44 +0200	[thread overview]
Message-ID: <YVwXhFalcYr72CZT@kunai> (raw)
In-Reply-To: <20210928140721.8805-7-prabhakar.mahadev-lad.rj@bp.renesas.com>


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Hi Prabhakar,

some updates after internal discussions I had.

> +#define RPCIF_CMNCR_MOIIO_HIZ(val) (RPCIF_CMNCR_MOIIO0(val) | \
> +				 RPCIF_CMNCR_MOIIO1(val) | \
> +				 RPCIF_CMNCR_MOIIO2(val) | RPCIF_CMNCR_MOIIO3(val))

Shimoda-san rightfully said that '_HIZ' should be removed from the macro
name because HIZ implies the value 3.


>  #define RPCIF_CMNCR_IO3FV(val)	(((val) & 0x3) << 14) /* undocumented */
>  #define RPCIF_CMNCR_IO2FV(val)	(((val) & 0x3) << 12) /* undocumented */

As discussed before, mention here that they are documented for G2L.
Sadly, we can't use them with Gen3...

> -#define RPCIF_CMNCR_IOFV_HIZ	(RPCIF_CMNCR_IO0FV(3) | RPCIF_CMNCR_IO2FV(3) | \
> -				 RPCIF_CMNCR_IO3FV(3))
> +#define RPCIF_CMNCR_IOFV_HIZ(val) (RPCIF_CMNCR_IO0FV(val) | RPCIF_CMNCR_IO2FV(val) | \
> +				 RPCIF_CMNCR_IO3FV(val))

... which means we should remove this macro entirely because it is
forbidden for Gen3. I think it is best to use the RPCIF_CMNCR_IO<n>FV
macros directly where we need them.

Do you agree?

Kind regards,

   Wolfram


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WARNING: multiple messages have this Message-ID (diff)
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Rob Herring <robh+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Mark Brown <broonie@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Sergei Shtylyov <sergei.shtylyov@gmail.com>,
	devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Prabhakar <prabhakar.csengg@gmail.com>,
	Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 6/6] memory: renesas-rpc-if: Add support for RZ/G2L
Date: Tue, 5 Oct 2021 11:14:44 +0200	[thread overview]
Message-ID: <YVwXhFalcYr72CZT@kunai> (raw)
In-Reply-To: <20210928140721.8805-7-prabhakar.mahadev-lad.rj@bp.renesas.com>

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Hi Prabhakar,

some updates after internal discussions I had.

> +#define RPCIF_CMNCR_MOIIO_HIZ(val) (RPCIF_CMNCR_MOIIO0(val) | \
> +				 RPCIF_CMNCR_MOIIO1(val) | \
> +				 RPCIF_CMNCR_MOIIO2(val) | RPCIF_CMNCR_MOIIO3(val))

Shimoda-san rightfully said that '_HIZ' should be removed from the macro
name because HIZ implies the value 3.


>  #define RPCIF_CMNCR_IO3FV(val)	(((val) & 0x3) << 14) /* undocumented */
>  #define RPCIF_CMNCR_IO2FV(val)	(((val) & 0x3) << 12) /* undocumented */

As discussed before, mention here that they are documented for G2L.
Sadly, we can't use them with Gen3...

> -#define RPCIF_CMNCR_IOFV_HIZ	(RPCIF_CMNCR_IO0FV(3) | RPCIF_CMNCR_IO2FV(3) | \
> -				 RPCIF_CMNCR_IO3FV(3))
> +#define RPCIF_CMNCR_IOFV_HIZ(val) (RPCIF_CMNCR_IO0FV(val) | RPCIF_CMNCR_IO2FV(val) | \
> +				 RPCIF_CMNCR_IO3FV(val))

... which means we should remove this macro entirely because it is
forbidden for Gen3. I think it is best to use the RPCIF_CMNCR_IO<n>FV
macros directly where we need them.

Do you agree?

Kind regards,

   Wolfram


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  parent reply	other threads:[~2021-10-05  9:15 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-28 14:07 [PATCH 0/6] Add SPI Multi I/O Bus Controller support for RZ/G2L Lad Prabhakar
2021-09-28 14:07 ` Lad Prabhakar
2021-09-28 14:07 ` [PATCH 1/6] dt-bindings: memory: renesas, rpc-if: Add support for the R9A07G044 Lad Prabhakar
2021-09-28 14:07   ` [PATCH 1/6] dt-bindings: memory: renesas,rpc-if: " Lad Prabhakar
2021-10-04 18:30   ` [PATCH 1/6] dt-bindings: memory: renesas, rpc-if: " Rob Herring
2021-10-04 18:30     ` [PATCH 1/6] dt-bindings: memory: renesas,rpc-if: " Rob Herring
2021-10-05 14:46   ` [PATCH 1/6] dt-bindings: memory: renesas, rpc-if: " Geert Uytterhoeven
2021-10-05 14:46     ` [PATCH 1/6] dt-bindings: memory: renesas,rpc-if: " Geert Uytterhoeven
2021-09-28 14:07 ` [PATCH 2/6] dt-bindings: memory: renesas, rpc-if: Add optional interrupts property Lad Prabhakar
2021-09-28 14:07   ` [PATCH 2/6] dt-bindings: memory: renesas,rpc-if: " Lad Prabhakar
2021-09-30 13:39   ` Wolfram Sang
2021-10-04 18:30   ` Rob Herring
2021-10-04 18:30     ` Rob Herring
2021-10-05 15:11   ` Geert Uytterhoeven
2021-10-05 15:11     ` Geert Uytterhoeven
2021-09-28 14:07 ` [PATCH 3/6] spi: spi-rpc-if: Check return value of rpcif_sw_init() Lad Prabhakar
2021-09-28 14:07   ` Lad Prabhakar
2021-09-30 13:41   ` Wolfram Sang
2021-10-05 15:25   ` Geert Uytterhoeven
2021-10-05 15:25     ` Geert Uytterhoeven
2021-09-28 14:07 ` [PATCH 4/6] mtd: hyperbus: rpc-if: " Lad Prabhakar
2021-09-28 14:07   ` Lad Prabhakar
2021-09-30 13:42   ` Wolfram Sang
2021-10-08  9:27   ` Geert Uytterhoeven
2021-10-08  9:27     ` Geert Uytterhoeven
2021-09-28 14:07 ` [PATCH 5/6] memory: renesas-rpc-if: Drop usage of RPCIF_DIRMAP_SIZE macro Lad Prabhakar
2021-09-28 14:07   ` Lad Prabhakar
2021-09-30 13:55   ` Wolfram Sang
2021-09-30 14:14     ` Lad, Prabhakar
2021-09-30 14:14       ` Lad, Prabhakar
2021-09-30 14:43       ` Wolfram Sang
2021-09-30 14:43         ` Wolfram Sang
2021-09-28 14:07 ` [PATCH 6/6] memory: renesas-rpc-if: Add support for RZ/G2L Lad Prabhakar
2021-09-28 14:07   ` Lad Prabhakar
2021-09-30 14:40   ` Wolfram Sang
2021-09-30 14:40     ` Wolfram Sang
2021-10-01  8:02     ` Lad, Prabhakar
2021-10-01  8:02       ` Lad, Prabhakar
2021-10-01  8:54       ` Wolfram Sang
2021-10-01  8:54         ` Wolfram Sang
2021-10-01  9:06         ` Lad, Prabhakar
2021-10-01  9:06           ` Lad, Prabhakar
2021-10-01 12:04           ` Wolfram Sang
2021-10-01 12:04             ` Wolfram Sang
2021-10-01 12:53             ` Lad, Prabhakar
2021-10-01 12:53               ` Lad, Prabhakar
2021-10-05  9:14   ` Wolfram Sang [this message]
2021-10-05  9:14     ` Wolfram Sang
2021-09-30 15:01 ` [PATCH 0/6] Add SPI Multi I/O Bus Controller " Wolfram Sang
2021-09-30 15:01   ` Wolfram Sang
2021-10-01  8:03   ` Lad, Prabhakar
2021-10-01  8:03     ` Lad, Prabhakar

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