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From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: Andrew Kilroy <andrew.kilroy@arm.com>,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	Will Deacon <will@kernel.org>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Leo Yan <leo.yan@linaro.org>, Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/4] perf vendor events: Add the Neoverse V1 to arm64 mapfile
Date: Tue, 5 Oct 2021 14:58:21 -0300	[thread overview]
Message-ID: <YVySPe1LRz4bGZFy@kernel.org> (raw)
In-Reply-To: <424d066b-30d5-4512-bd8c-15b700af2864@huawei.com>

Em Tue, Oct 05, 2021 at 10:33:49AM +0100, John Garry escreveu:
> On 04/10/2021 17:00, Andrew Kilroy wrote:
> > This is so that performance counters for the Neoverse V1 appear
> > categorised upon running 'perf list' on the CPU.
> > 
> 
> this really belongs with the previous patch

Waiting for a resolution on this one.

- Arnaldo
 
> Thanks,
> John
> 
> > Signed-off-by: Andrew Kilroy <andrew.kilroy@arm.com>
> > ---
> >   tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
> >   1 file changed, 1 insertion(+)
> > 
> > diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > index c43591d831b8..31d8b57ca9bb 100644
> > --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > @@ -18,6 +18,7 @@
> >   0x00000000410fd080,v1,arm/cortex-a57-a72,core
> >   0x00000000410fd0b0,v1,arm/cortex-a76-n1,core
> >   0x00000000410fd0c0,v1,arm/cortex-a76-n1,core
> > +0x00000000410fd400,v1,arm/neoverse-v1,core
> >   0x00000000420f5160,v1,cavium/thunderx2,core
> >   0x00000000430f0af0,v1,cavium/thunderx2,core
> >   0x00000000460f0010,v1,fujitsu/a64fx,core
> > 

-- 

- Arnaldo

WARNING: multiple messages have this Message-ID (diff)
From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: Andrew Kilroy <andrew.kilroy@arm.com>,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	Will Deacon <will@kernel.org>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Leo Yan <leo.yan@linaro.org>, Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/4] perf vendor events: Add the Neoverse V1 to arm64 mapfile
Date: Tue, 5 Oct 2021 14:58:21 -0300	[thread overview]
Message-ID: <YVySPe1LRz4bGZFy@kernel.org> (raw)
In-Reply-To: <424d066b-30d5-4512-bd8c-15b700af2864@huawei.com>

Em Tue, Oct 05, 2021 at 10:33:49AM +0100, John Garry escreveu:
> On 04/10/2021 17:00, Andrew Kilroy wrote:
> > This is so that performance counters for the Neoverse V1 appear
> > categorised upon running 'perf list' on the CPU.
> > 
> 
> this really belongs with the previous patch

Waiting for a resolution on this one.

- Arnaldo
 
> Thanks,
> John
> 
> > Signed-off-by: Andrew Kilroy <andrew.kilroy@arm.com>
> > ---
> >   tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
> >   1 file changed, 1 insertion(+)
> > 
> > diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > index c43591d831b8..31d8b57ca9bb 100644
> > --- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
> > @@ -18,6 +18,7 @@
> >   0x00000000410fd080,v1,arm/cortex-a57-a72,core
> >   0x00000000410fd0b0,v1,arm/cortex-a76-n1,core
> >   0x00000000410fd0c0,v1,arm/cortex-a76-n1,core
> > +0x00000000410fd400,v1,arm/neoverse-v1,core
> >   0x00000000420f5160,v1,cavium/thunderx2,core
> >   0x00000000430f0af0,v1,cavium/thunderx2,core
> >   0x00000000460f0010,v1,fujitsu/a64fx,core
> > 

-- 

- Arnaldo

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  reply	other threads:[~2021-10-05 17:58 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-04 16:00 [PATCH 1/4] perf vendor events: Syntax corrections in Neoverse N1 json Andrew Kilroy
2021-10-04 16:00 ` Andrew Kilroy
2021-10-04 16:00 ` [PATCH 2/4] perf vendor events: Add new armv8 pmu events Andrew Kilroy
2021-10-04 16:00   ` Andrew Kilroy
2021-10-05 10:01   ` John Garry
2021-10-05 10:01     ` John Garry
2021-10-04 16:00 ` [PATCH 3/4] perf vendor events: Categorise the Neoverse V1 counters Andrew Kilroy
2021-10-04 16:00   ` Andrew Kilroy
2021-10-04 16:00 ` [PATCH 4/4] perf vendor events: Add the Neoverse V1 to arm64 mapfile Andrew Kilroy
2021-10-04 16:00   ` Andrew Kilroy
2021-10-05  9:33   ` John Garry
2021-10-05  9:33     ` John Garry
2021-10-05 17:58     ` Arnaldo Carvalho de Melo [this message]
2021-10-05 17:58       ` Arnaldo Carvalho de Melo
2021-10-06  8:20       ` Andrew Kilroy
2021-10-06  8:20         ` Andrew Kilroy
2021-10-06  8:29         ` Andrew Kilroy
2021-10-06  8:29           ` Andrew Kilroy
2021-10-05 10:10 ` [PATCH 1/4] perf vendor events: Syntax corrections in Neoverse N1 json John Garry
2021-10-05 10:10   ` John Garry
2021-10-06  8:43   ` James Clark
2021-10-06  8:43     ` James Clark
2021-10-06 16:26     ` John Garry
2021-10-06 16:26       ` John Garry
2021-10-08  0:03       ` Andi Kleen
2021-10-08  0:03         ` Andi Kleen
2021-10-08  2:59         ` Ian Rogers
2021-10-08  2:59           ` Ian Rogers
2021-10-08 10:34           ` James Clark
2021-10-08 10:34             ` James Clark

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