* [PATCH v3 0/3] add initial support for exynosautov9 [not found] <CGME20211010032456epcas2p25241e07ab3ce673bcbb428f1c7c5a787@epcas2p2.samsung.com> @ 2021-10-10 3:22 ` Chanho Park 2021-10-10 3:22 ` [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Chanho Park ` (2 more replies) 0 siblings, 3 replies; 11+ messages in thread From: Chanho Park @ 2021-10-10 3:22 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring, Linus Walleij Cc: Tomasz Figa, Sylwester Nawrocki, linux-samsung-soc, devicetree, Chanho Park This patchset supports minimal set for ExynosAuto v9 SoC and SADK board. This contains serial_0 as uart console and ufs_0 for rootfs storage. Regarding UFS, it depends on UFS patchset[1]. [1]: https://lore.kernel.org/linux-samsung-soc/20211007080934.108804-1-chanho61.park@samsung.com/T/#t Changes since v2: - pinctrl patch has been merged. So, remove it from v3 patchset. - Separate mfd/syscon.yaml dt-binding patch - Use "-pins" suffix for all pinctrl node name but do not follow this for labels. Changes since v1: - add static and __initconst of patch1 - Use pin and pins suffix for pinctrl nodes - Remove non-SoC pins - Move fixed rate clock nodes out of soc@0 - Add cortex-a76 compatibles to cpu and pmu node. - Use lowercase of address representations - Add pmu / syscon compatible. .../bindings/arm/samsung/samsung-boards.yaml | 6 + .../devicetree/bindings/mfd/syscon.yaml | 1 + arch/arm64/boot/dts/exynos/Makefile | 3 +- .../boot/dts/exynos/exynosautov9-pinctrl.dtsi | 1189 +++++++++++++++++ .../boot/dts/exynos/exynosautov9-sadk.dts | 56 + arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 301 +++++ 6 files changed, 1555 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9.dtsi -- 2.33.0 ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible 2021-10-10 3:22 ` [PATCH v3 0/3] add initial support for exynosautov9 Chanho Park @ 2021-10-10 3:22 ` Chanho Park 2021-10-10 7:16 ` Krzysztof Kozlowski 2021-10-21 10:05 ` Lee Jones 2021-10-10 3:22 ` [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Chanho Park 2021-10-10 3:22 ` [PATCH v3 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board Chanho Park 2 siblings, 2 replies; 11+ messages in thread From: Chanho Park @ 2021-10-10 3:22 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring, Linus Walleij Cc: Tomasz Figa, Sylwester Nawrocki, linux-samsung-soc, devicetree, Chanho Park, Lee Jones Add document Samsung's Exynos Auto v9 compatible for system registers. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index abe3fd817e0b..75dcbb741010 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -55,6 +55,7 @@ properties: - samsung,exynos4-sysreg - samsung,exynos5-sysreg - samsung,exynos5433-sysreg + - samsung,exynosautov9-sysreg - const: syscon -- 2.33.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible 2021-10-10 3:22 ` [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Chanho Park @ 2021-10-10 7:16 ` Krzysztof Kozlowski 2021-10-21 10:05 ` Lee Jones 1 sibling, 0 replies; 11+ messages in thread From: Krzysztof Kozlowski @ 2021-10-10 7:16 UTC (permalink / raw) To: Chanho Park, Rob Herring, Linus Walleij Cc: Tomasz Figa, Sylwester Nawrocki, linux-samsung-soc, devicetree, Lee Jones On 10/10/2021 05:22, Chanho Park wrote: > Add document Samsung's Exynos Auto v9 compatible for system registers. > > Cc: Lee Jones <lee.jones@linaro.org> > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible 2021-10-10 3:22 ` [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Chanho Park 2021-10-10 7:16 ` Krzysztof Kozlowski @ 2021-10-21 10:05 ` Lee Jones 1 sibling, 0 replies; 11+ messages in thread From: Lee Jones @ 2021-10-21 10:05 UTC (permalink / raw) To: Chanho Park Cc: Krzysztof Kozlowski, Rob Herring, Linus Walleij, Tomasz Figa, Sylwester Nawrocki, linux-samsung-soc, devicetree On Sun, 10 Oct 2021, Chanho Park wrote: > Add document Samsung's Exynos Auto v9 compatible for system registers. > > Cc: Lee Jones <lee.jones@linaro.org> > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml > index abe3fd817e0b..75dcbb741010 100644 > --- a/Documentation/devicetree/bindings/mfd/syscon.yaml > +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml > @@ -55,6 +55,7 @@ properties: > - samsung,exynos4-sysreg > - samsung,exynos5-sysreg > - samsung,exynos5433-sysreg > + - samsung,exynosautov9-sysreg > > - const: syscon Amended the subject line and applied, thanks. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC 2021-10-10 3:22 ` [PATCH v3 0/3] add initial support for exynosautov9 Chanho Park 2021-10-10 3:22 ` [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Chanho Park @ 2021-10-10 3:22 ` Chanho Park 2021-10-10 7:19 ` Krzysztof Kozlowski 2021-10-10 17:17 ` (subset) " Krzysztof Kozlowski 2021-10-10 3:22 ` [PATCH v3 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board Chanho Park 2 siblings, 2 replies; 11+ messages in thread From: Chanho Park @ 2021-10-10 3:22 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring, Linus Walleij Cc: Tomasz Figa, Sylwester Nawrocki, linux-samsung-soc, devicetree, Chanho Park Add minimal support for ExynosAuto v9 SoC[1]. - Enumarate all pinctrl nodes - UART with exynos850 compatible - UFS0 HCI + Phy Like exynos850, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. [1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/ Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- .../boot/dts/exynos/exynosautov9-pinctrl.dtsi | 1189 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 301 +++++ 2 files changed, 1490 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi new file mode 100644 index 000000000000..bef0942fd75b --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi @@ -0,0 +1,1189 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as + * device tree nodes in this file. + */ + +#include <dt-bindings/pinctrl/samsung.h> + +&pinctrl_alive { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; + }; + + dp0_hpd: dp0-hpd-pins { + samsung,pins = "gpa1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + }; + + dp1_hpd: dp1-hpd-pins { + samsung,pins = "gpa1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + }; + + gpq0: gpq0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + speedy0_bus: speedy0-bus-pins { + samsung,pins = "gpq0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + }; + + speedy1_bus: speedy1-bus-pins { + samsung,pins = "gpa0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + }; +}; + +&pinctrl_aud { + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + aud_codec_mclk: aud-codec-mclk-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_codec_mclk_idle: aud-codec-mclk-idle-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s0_bus: aud-i2s0-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s0_idle: aud-i2s0-idle-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s1_bus: aud-i2s1-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s1_idle: aud-i2s1-idle-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s2_bus: aud-i2s2-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s2_idle: aud-i2s2-idle-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s3_bus: aud-i2s3-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s3_idle: aud-i2s3-idle-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s4_bus: aud-i2s4-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s4_idle: aud-i2s4-idle-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s5_bus: aud-i2s5-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s5_idle: aaud-i2s5-idle-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s6_bus: aud-i2s6-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; + + aud_i2s6_idle: aaud-i2s6-idle-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + }; +}; + +&pinctrl_fsys0 { + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pcie_clkreq0: pcie-clkreq0-pins { + samsung,pins = "gpf0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; + }; + + pcie_perst0_out: pcie-perst0-out-pins { + samsung,pins = "gpf0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_perst0_in: pcie-perst0-in-pins { + samsung,pins = "gpf0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_clkreq1: pcie-clkreq1-pins { + samsung,pins = "gpf0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; + }; + + pcie_perst1_out: pcie-perst1-out-pins { + samsung,pins = "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_perst1_in: pcie-perst1-in-pins { + samsung,pins = "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_clkreq2: pcie-clkreq2-pins { + samsung,pins = "gpf0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; + }; + + pcie_perst2_out: pcie-perst2-out-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_perst2_in: pcie-perst2-in-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_clkreq3: pcie-clkreq3-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; + }; + + pcie_perst3_out: pcie-perst3-out-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_perst3_in: pcie-perst3-in-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_clkreq4: pcie-clkreq4-pins { + samsung,pins = "gpf1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; + }; + + pcie_perst4_out: pcie-perst4-out-pins { + samsung,pins = "gpf1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_perst4_in: pcie-perst4-in-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_clkreq5: pcie-clkreq5-pins { + samsung,pins = "gpf1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; + }; + + pcie_perst5_out: pcie-perst5-out-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + pcie_perst5_in: pcie-perst5-in-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; +}; + +&pinctrl_fsys1 { + gpf8: gpf8 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins = "gpf8-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins = "gpf8-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins = "gpf8-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins = "gpf8-3", "gpf8-4", "gpf8-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; +}; + +&pinctrl_fsys2 { + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf4: gpf4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf5: gpf5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf6: gpf6 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gpf2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gpf2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + ufs_rst_n_1: ufs-rst-n-1-pins { + samsung,pins = "gpf2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + ufs_refclk_out_1: ufs-refclk-out-1-pins { + samsung,pins = "gpf2-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; + }; + + eth0_mdc_mdio: eth0-mdc-mdio-pins { + samsung,pins = "gpf4-5", "gpf4-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + }; + + eth0_rgmii: eth0-rgmii-pins { + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4", + "gpf3-5", "gpf3-6", "gpf3-7", "gpf4-0", + "gpf4-1", "gpf4-2", "gpf4-3", "gpf4-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + }; + + eth0_pps_out: eth0-pps-out-pins { + samsung,pins = "gpf3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + eth1_mdc_mdio: eth1-mdc-mdio-pins { + samsung,pins = "gpf6-5", "gpf6-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + }; + + eth1_rgmii: eth1-rgmii-pins { + samsung,pins = "gpf5-1", "gpf5-2", "gpf5-3", "gpf5-4", + "gpf5-5", "gpf5-6", "gpf5-7", "gpf6-0", + "gpf6-1", "gpf6-2", "gpf6-3", "gpf6-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + }; + + eth1_pps_out: eth1-pps-out-pins { + samsung,pins = "gpf5-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; +}; + +&pinctrl_peric0 { + gpp0: gpp0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp1: gpp1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pwm_tout0: pwm-tout0-pins { + samsung,pins = "gpg0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + pwm_tout1: pwm-tout1-pins { + samsung,pins = "gpg0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + pwm_tout2: pwm-tout2-pins { + samsung,pins = "gpg0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + pwm_tout3: pwm-tout3-pins { + samsung,pins = "gpg0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI00 */ + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI00_I2C */ + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins = "gpp0-2", "gpp0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI01 */ + hsi2c2_bus_pins: hsi2c2-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI01_I2C */ + hsi2c3_bus_pins: hsi2c3-bus-pins { + samsung,pins = "gpp0-6", "gpp0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI02 */ + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI02_I2C */ + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins = "gpp1-2", "gpp1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI03 */ + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI03_I2C */ + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins = "gpp1-6", "gpp1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI04 */ + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI04_I2C */ + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins = "gpp2-2", "gpp2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI05 */ + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI05_I2C */ + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins = "gpp2-6", "gpp2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* SPI USI_PERIC0_USI00_SPI */ + spi0_bus: spi0-bus-pins { + samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI01_SPI */ + spi1_bus: spi1-bus-pins { + samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI02_SPI */ + spi2_bus: spi2-bus-pins { + samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI03_SPI */ + spi3_bus: spi3-bus-pins { + samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI04_SPI */ + spi4_bus: spi4-bus-pins { + samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* PERIC0 USI05_SPI */ + spi5_bus: spi5-bus-pins { + samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC0_USI00_UART */ + uart0_bus: uart0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart0_bus_dual: uart0-bus-dual-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC0_USI01_UART */ + uart1_bus: uart1-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart1_bus_dual: uart1-bus-dual-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC0_USI02_UART */ + uart2_bus: uart2-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC0_USI03_UART */ + uart3_bus: uart3-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC0_USI04_UART */ + uart4_bus: uart4-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC0_USI05_UART */ + uart5_bus: uart5-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; +}; + +&pinctrl_peric1 { + gpp3: gpp3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp4: gpp4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp5: gpp5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* PERIC1 USI06 */ + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI06_I2C */ + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins = "gpp3-2", "gpp3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI07 */ + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI07_I2C */ + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins = "gpp3-6", "gpp3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI08 */ + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI08_I2C */ + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins = "gpp4-2", "gpp4-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI09 */ + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI09_I2C */ + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins = "gpp4-6", "gpp4-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI10 */ + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI10_I2C */ + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins = "gpp5-2", "gpp5-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI11 */ + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI11_I2C */ + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins = "gpp5-6", "gpp5-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI06_SPI */ + spi6_bus: spi6-bus-pins { + samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI07_SPI */ + spi7_bus: spi7-bus-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI08_SPI */ + spi8_bus: spi8-bus-pins { + samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI09_SPI */ + spi9_bus: spi9-bus-pins { + samsung,pins = "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins = "gpp4-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins = "gpp4-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI10_SPI */ + spi10_pins: spi10-pins { + samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi10_cs_func: spi10-cs-func-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* PERIC1 USI11_SPI */ + spi11_pins: spi11-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi11_cs_func: spi11-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* USI_PERIC1_USI06_UART */ + uart6_bus: uart6-bus-pins { + samsung,pins = "gpp3-3", "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC1_USI07_UART */ + uart7_bus: uart7-bus-pins { + samsung,pins = "gpp3-7", "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC1_USI08_UART */ + uart8_bus: uart8-bus-pins { + samsung,pins = "gpp4-3", "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC1_USI09_UART */ + uart9_bus: uart9-bus-pins { + samsung,pins = "gpp4-7", "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC1_USI10_UART */ + uart10_bus: uart10-bus-pins { + samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + /* USI_PERIC1_USI11_UART */ + uart11_bus: uart11-bus-pins { + samsung,pins = "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi new file mode 100644 index 000000000000..d884ae421e12 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAuto v9 SoC device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "samsung,exynosautov9"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_aud; + pinctrl2 = &pinctrl_fsys0; + pinctrl3 = &pinctrl_fsys1; + pinctrl4 = &pinctrl_fsys2; + pinctrl5 = &pinctrl_peric0; + pinctrl6 = &pinctrl_peric1; + }; + + arm-pmu { + compatible = "arm,cortex-a76-pmu"; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, + <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@000000 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@000100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu2: cpu@000200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x200>; + enable-method = "psci"; + }; + + cpu3: cpu@000300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x300>; + enable-method = "psci"; + }; + + cpu4: cpu@10000 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10000>; + enable-method = "psci"; + }; + + cpu5: cpu@10100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10100>; + enable-method = "psci"; + }; + + cpu6: cpu@10200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10200>; + enable-method = "psci"; + }; + + cpu7: cpu@10300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10300>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + }; + + fixed-rate-clocks { + xtcxo: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "oscclk"; + }; + + /* + * Keep the stub clock for serial driver, until proper clock + * driver is implemented. + */ + uart_clock: uart-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133250000>; + clock-output-names = "uart"; + }; + + /* + * Keep the stub clock for ufs driver, until proper clock + * driver is implemented. + */ + ufs_core_clock: uart-core-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <166562500>; + }; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x20000000>; + + gic: interrupt-controller@11001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x10101000 0x1000>, + <0x10102000 0x2000>, + <0x10104000 0x2000>, + <0x10106000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + + pinctrl_alive: pinctrl@10450000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10450000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_aud: pinctrl@19c60000{ + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x19c60000 0x1000>; + }; + + pinctrl_fsys0: pinctrl@17740000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17740000 0x1000>; + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_fsys1: pinctrl@17060000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17060000 0x1000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_fsys2: pinctrl@17c30000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17c30000 0x1000>; + interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_peric0: pinctrl@10230000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10230000 0x1000>; + interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_peric1: pinctrl@10830000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10830000 0x1000>; + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; + }; + + pmu_system_controller: system-controller@10460000 { + compatible = "samsung,exynos7-pmu", "syscon"; + reg = <0x10460000 0x10000>; + }; + + syscon_fsys2: syscon@17c20000 { + compatible = "samsung,exynosautov9-sysreg", "syscon"; + reg = <0x17c20000 0x1000>; + }; + + /* USI: UART */ + serial_0: uart@103000000 { + compatible = "samsung,exynos850-uart"; + reg = <0x10300000 0x100>; + interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus_dual>; + clocks = <&uart_clock>, <&uart_clock>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + ufs_0_phy: ufs0-phy@17e04000 { + compatible = "samsung,exynosautov9-ufs-phy"; + reg = <0x17e04000 0xc00>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + status = "disabled"; + }; + + ufs_0: ufs0@17e00000 { + compatible ="samsung,exynosautov9-ufs"; + + reg = <0x17e00000 0x100>, /* 0: HCI standard */ + <0x17e01100 0x410>, /* 1: Vendor-specific */ + <0x17e80000 0x8000>, /* 2: UNIPRO */ + <0x17dc0000 0x2200>; /* 3: UFS protector */ + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ufs_core_clock>, + <&ufs_core_clock>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + phys = <&ufs_0_phy>; + phy-names = "ufs-phy"; + samsung,sysreg = <&syscon_fsys2>; + samsung,ufs-shareability-reg-offset = <0x710>; + status = "disabled"; + }; + }; +}; + +#include "exynosautov9-pinctrl.dtsi" -- 2.33.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC 2021-10-10 3:22 ` [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Chanho Park @ 2021-10-10 7:19 ` Krzysztof Kozlowski 2021-10-10 17:17 ` (subset) " Krzysztof Kozlowski 1 sibling, 0 replies; 11+ messages in thread From: Krzysztof Kozlowski @ 2021-10-10 7:19 UTC (permalink / raw) To: Chanho Park, Rob Herring, Linus Walleij Cc: Tomasz Figa, Sylwester Nawrocki, linux-samsung-soc, devicetree On 10/10/2021 05:22, Chanho Park wrote: > Add minimal support for ExynosAuto v9 SoC[1]. > > - Enumarate all pinctrl nodes > - UART with exynos850 compatible > - UFS0 HCI + Phy > > Like exynos850, this also uses fixed-rate clock nodes until clock driver > has been supported. The clock nodes are initialized on bootloader stage > thus we don't need to control them so far. > > [1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/ > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../boot/dts/exynos/exynosautov9-pinctrl.dtsi | 1189 +++++++++++++++++ > arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 301 +++++ > 2 files changed, 1490 insertions(+) > create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi > create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9.dtsi > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi > new file mode 100644 > index 000000000000..bef0942fd75b > --- /dev/null > +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi > @@ -0,0 +1,1189 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source > + * > + * Copyright (c) 2021 Samsung Electronics Co., Ltd. > + * > + * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as > + * device tree nodes in this file. > + */ > + > +#include <dt-bindings/pinctrl/samsung.h> > + > +&pinctrl_alive { > + gpa0: gpa0 { > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + gpa1: gpa1 { > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupt-parent = <&gic>; > + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + dp0_hpd: dp0-hpd-pins { > + samsung,pins = "gpa1-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + }; > + > + dp1_hpd: dp1-hpd-pins { > + samsung,pins = "gpa1-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + }; > + > + gpq0: gpq0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + speedy0_bus: speedy0-bus-pins { > + samsung,pins = "gpq0-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + }; > + > + speedy1_bus: speedy1-bus-pins { > + samsung,pins = "gpa0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + }; > +}; > + > +&pinctrl_aud { > + gpb0: gpb0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb1: gpb1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb2: gpb2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb3: gpb3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + aud_codec_mclk: aud-codec-mclk-pins { > + samsung,pins = "gpb0-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_codec_mclk_idle: aud-codec-mclk-idle-pins { > + samsung,pins = "gpb0-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s0_bus: aud-i2s0-pins { > + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s0_idle: aud-i2s0-idle-pins { > + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s1_bus: aud-i2s1-pins { > + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s1_idle: aud-i2s1-idle-pins { > + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s2_bus: aud-i2s2-pins { > + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s2_idle: aud-i2s2-idle-pins { > + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s3_bus: aud-i2s3-pins { > + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s3_idle: aud-i2s3-idle-pins { > + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s4_bus: aud-i2s4-pins { > + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s4_idle: aud-i2s4-idle-pins { > + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s5_bus: aud-i2s5-pins { > + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s5_idle: aaud-i2s5-idle-pins { > + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s6_bus: aud-i2s6-pins { > + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > + > + aud_i2s6_idle: aaud-i2s6-idle-pins { > + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; > + }; > +}; > + > +&pinctrl_fsys0 { > + gpf0: gpf0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf1: gpf1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + pcie_clkreq0: pcie-clkreq0-pins { > + samsung,pins = "gpf0-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; > + }; > + > + pcie_perst0_out: pcie-perst0-out-pins { > + samsung,pins = "gpf0-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_perst0_in: pcie-perst0-in-pins { > + samsung,pins = "gpf0-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_clkreq1: pcie-clkreq1-pins { > + samsung,pins = "gpf0-2"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; > + }; > + > + pcie_perst1_out: pcie-perst1-out-pins { > + samsung,pins = "gpf0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_perst1_in: pcie-perst1-in-pins { > + samsung,pins = "gpf0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_clkreq2: pcie-clkreq2-pins { > + samsung,pins = "gpf0-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; > + }; > + > + pcie_perst2_out: pcie-perst2-out-pins { > + samsung,pins = "gpf0-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_perst2_in: pcie-perst2-in-pins { > + samsung,pins = "gpf0-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_clkreq3: pcie-clkreq3-pins { > + samsung,pins = "gpf1-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; > + }; > + > + pcie_perst3_out: pcie-perst3-out-pins { > + samsung,pins = "gpf1-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_perst3_in: pcie-perst3-in-pins { > + samsung,pins = "gpf1-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_clkreq4: pcie-clkreq4-pins { > + samsung,pins = "gpf1-2"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; > + }; > + > + pcie_perst4_out: pcie-perst4-out-pins { > + samsung,pins = "gpf1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_perst4_in: pcie-perst4-in-pins { > + samsung,pins = "gpf1-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_clkreq5: pcie-clkreq5-pins { > + samsung,pins = "gpf1-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_UP>; > + }; > + > + pcie_perst5_out: pcie-perst5-out-pins { > + samsung,pins = "gpf1-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + pcie_perst5_in: pcie-perst5-in-pins { > + samsung,pins = "gpf1-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > +}; > + > +&pinctrl_fsys1 { > + gpf8: gpf8 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + sd2_clk: sd2-clk-pins { > + samsung,pins = "gpf8-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <2>; /* 2x drive strength */ > + }; > + > + sd2_cmd: sd2-cmd-pins { > + samsung,pins = "gpf8-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <2>; /* 2x drive strength */ > + }; > + > + sd2_bus1: sd2-bus-width1-pins { > + samsung,pins = "gpf8-2"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <2>; /* 2x drive strength */ > + }; > + > + sd2_bus4: sd2-bus-width4-pins { > + samsung,pins = "gpf8-3", "gpf8-4", "gpf8-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <2>; /* 2x drive strength */ > + }; > +}; > + > +&pinctrl_fsys2 { > + gpf2: gpf2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf3: gpf3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf4: gpf4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf5: gpf5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf6: gpf6 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + ufs_rst_n: ufs-rst-n-pins { > + samsung,pins = "gpf2-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + ufs_refclk_out: ufs-refclk-out-pins { > + samsung,pins = "gpf2-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + ufs_rst_n_1: ufs-rst-n-1-pins { > + samsung,pins = "gpf2-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + ufs_refclk_out_1: ufs-refclk-out-1-pins { > + samsung,pins = "gpf2-2"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>; > + }; > + > + eth0_mdc_mdio: eth0-mdc-mdio-pins { > + samsung,pins = "gpf4-5", "gpf4-6"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + }; > + > + eth0_rgmii: eth0-rgmii-pins { > + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4", > + "gpf3-5", "gpf3-6", "gpf3-7", "gpf4-0", > + "gpf4-1", "gpf4-2", "gpf4-3", "gpf4-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + }; > + > + eth0_pps_out: eth0-pps-out-pins { > + samsung,pins = "gpf3-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + eth1_mdc_mdio: eth1-mdc-mdio-pins { > + samsung,pins = "gpf6-5", "gpf6-6"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + }; > + > + eth1_rgmii: eth1-rgmii-pins { > + samsung,pins = "gpf5-1", "gpf5-2", "gpf5-3", "gpf5-4", > + "gpf5-5", "gpf5-6", "gpf5-7", "gpf6-0", > + "gpf6-1", "gpf6-2", "gpf6-3", "gpf6-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + }; > + > + eth1_pps_out: eth1-pps-out-pins { > + samsung,pins = "gpf5-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > +}; > + > +&pinctrl_peric0 { > + gpp0: gpp0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpp1: gpp1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpp2: gpp2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg0: gpg0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + pwm_tout0: pwm-tout0-pins { > + samsung,pins = "gpg0-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + pwm_tout1: pwm-tout1-pins { > + samsung,pins = "gpg0-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + pwm_tout2: pwm-tout2-pins { > + samsung,pins = "gpg0-2"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + pwm_tout3: pwm-tout3-pins { > + samsung,pins = "gpg0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI00 */ > + hsi2c0_bus: hsi2c0-bus-pins { > + samsung,pins = "gpp0-0", "gpp0-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI00_I2C */ > + hsi2c1_bus: hsi2c1-bus-pins { > + samsung,pins = "gpp0-2", "gpp0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI01 */ > + hsi2c2_bus_pins: hsi2c2-bus-pins { Still _pins in the label. > + samsung,pins = "gpp0-4", "gpp0-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI01_I2C */ > + hsi2c3_bus_pins: hsi2c3-bus-pins { Ditto. > + samsung,pins = "gpp0-6", "gpp0-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI02 */ > + hsi2c4_bus: hsi2c4-bus-pins { > + samsung,pins = "gpp1-0", "gpp1-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI02_I2C */ > + hsi2c5_bus: hsi2c5-bus-pins { > + samsung,pins = "gpp1-2", "gpp1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI03 */ > + hsi2c6_bus: hsi2c6-bus-pins { > + samsung,pins = "gpp1-4", "gpp1-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI03_I2C */ > + hsi2c7_bus: hsi2c7-bus-pins { > + samsung,pins = "gpp1-6", "gpp1-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI04 */ > + hsi2c8_bus: hsi2c8-bus-pins { > + samsung,pins = "gpp2-0", "gpp2-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI04_I2C */ > + hsi2c9_bus: hsi2c9-bus-pins { > + samsung,pins = "gpp2-2", "gpp2-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI05 */ > + hsi2c10_bus: hsi2c10-bus-pins { > + samsung,pins = "gpp2-4", "gpp2-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI05_I2C */ > + hsi2c11_bus: hsi2c11-bus-pins { > + samsung,pins = "gpp2-6", "gpp2-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* SPI USI_PERIC0_USI00_SPI */ > + spi0_bus: spi0-bus-pins { > + samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi0_cs: spi0-cs-pins { > + samsung,pins = "gpp0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi0_cs_func: spi0-cs-func-pins { > + samsung,pins = "gpp0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI01_SPI */ > + spi1_bus: spi1-bus-pins { > + samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi1_cs: spi1-cs-pins { > + samsung,pins = "gpp0-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi1_cs_func: spi1-cs-func-pins { > + samsung,pins = "gpp0-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI02_SPI */ > + spi2_bus: spi2-bus-pins { > + samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi2_cs: spi2-cs-pins { > + samsung,pins = "gpp1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi2_cs_func: spi2-cs-func-pins { > + samsung,pins = "gpp1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI03_SPI */ > + spi3_bus: spi3-bus-pins { > + samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi3_cs: spi3-cs-pins { > + samsung,pins = "gpp1-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi3_cs_func: spi3-cs-func-pins { > + samsung,pins = "gpp1-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI04_SPI */ > + spi4_bus: spi4-bus-pins { > + samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi4_cs: spi4-cs-pins { > + samsung,pins = "gpp2-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi4_cs_func: spi4-cs-func-pins { > + samsung,pins = "gpp2-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* PERIC0 USI05_SPI */ > + spi5_bus: spi5-bus-pins { > + samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi5_cs: spi5-cs-pins { > + samsung,pins = "gpp2-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + spi5_cs_func: spi5-cs-func-pins { > + samsung,pins = "gpp2-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* USI_PERIC0_USI00_UART */ > + uart0_bus: uart0-bus-pins { > + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + uart0_bus_dual: uart0-bus-dual-pins { > + samsung,pins = "gpp0-0", "gpp0-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* USI_PERIC0_USI01_UART */ > + uart1_bus: uart1-bus-pins { > + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + uart1_bus_dual: uart1-bus-dual-pins { > + samsung,pins = "gpp0-4", "gpp0-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* USI_PERIC0_USI02_UART */ > + uart2_bus: uart2-bus-pins { > + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + uart2_bus_dual: uart2-bus-dual-pins { > + samsung,pins = "gpp1-0", "gpp1-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* USI_PERIC0_USI03_UART */ > + uart3_bus: uart3-bus-pins { > + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + uart3_bus_dual: uart3-bus-dual-pins { > + samsung,pins = "gpp1-4", "gpp1-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* USI_PERIC0_USI04_UART */ > + uart4_bus: uart4-bus-pins { > + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + uart4_bus_dual: uart4-bus-dual-pins { > + samsung,pins = "gpp2-0", "gpp2-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + /* USI_PERIC0_USI05_UART */ > + uart5_bus: uart5-bus-pins { > + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > + > + uart5_bus_dual: uart5-bus-dual-pins { > + samsung,pins = "gpp2-4", "gpp2-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + }; > +}; > + > +&pinctrl_peric1 { > + gpp3: gpp3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpp4: gpp4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpp5: gpp5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg1: gpg1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg2: gpg2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg3: gpg3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + /* PERIC1 USI06 */ > + hsi2c12_bus: hsi2c12-bus-pins { > + samsung,pins = "gpp3-0", "gpp3-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI06_I2C */ > + hsi2c13_bus: hsi2c13-bus-pins { > + samsung,pins = "gpp3-2", "gpp3-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI07 */ > + hsi2c14_bus: hsi2c14-bus-pins { > + samsung,pins = "gpp3-4", "gpp3-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI07_I2C */ > + hsi2c15_bus: hsi2c15-bus-pins { > + samsung,pins = "gpp3-6", "gpp3-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI08 */ > + hsi2c16_bus: hsi2c16-bus-pins { > + samsung,pins = "gpp4-0", "gpp4-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI08_I2C */ > + hsi2c17_bus: hsi2c17-bus-pins { > + samsung,pins = "gpp4-2", "gpp4-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI09 */ > + hsi2c18_bus: hsi2c18-bus-pins { > + samsung,pins = "gpp4-4", "gpp4-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI09_I2C */ > + hsi2c19_bus: hsi2c19-bus-pins { > + samsung,pins = "gpp4-6", "gpp4-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI10 */ > + hsi2c20_bus: hsi2c20-bus-pins { > + samsung,pins = "gpp5-0", "gpp5-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI10_I2C */ > + hsi2c21_bus: hsi2c21-bus-pins { > + samsung,pins = "gpp5-2", "gpp5-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI11 */ > + hsi2c22_bus: hsi2c22-bus-pins { > + samsung,pins = "gpp5-4", "gpp5-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI11_I2C */ > + hsi2c23_bus: hsi2c23-bus-pins { > + samsung,pins = "gpp5-6", "gpp5-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI06_SPI */ > + spi6_bus: spi6-bus-pins { > + samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi6_cs: spi6-cs-pins { > + samsung,pins = "gpp3-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi6_cs_func: spi6-cs-func-pins { > + samsung,pins = "gpp3-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI07_SPI */ > + spi7_bus: spi7-bus-pins { > + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi7_cs: spi7-cs-pins { > + samsung,pins = "gpp3-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi7_cs_func: spi7-cs-func-pins { > + samsung,pins = "gpp3-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI08_SPI */ > + spi8_bus: spi8-bus-pins { > + samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi8_cs: spi8-cs-pins { > + samsung,pins = "gpp4-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi8_cs_func: spi8-cs-func-pins { > + samsung,pins = "gpp4-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI09_SPI */ > + spi9_bus: spi9-bus-pins { > + samsung,pins = "gpp4-6", "gpp4-5", "gpp4-4"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi9_cs: spi9-cs-pins { > + samsung,pins = "gpp4-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi9_cs_func: spi9-cs-func-pins { > + samsung,pins = "gpp4-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI10_SPI */ > + spi10_pins: spi10-pins { Ditto > + samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi10_cs: spi10-cs-pins { > + samsung,pins = "gpp5-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + spi10_cs_func: spi10-cs-func-pins { > + samsung,pins = "gpp5-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; > + }; > + > + /* PERIC1 USI11_SPI */ > + spi11_pins: spi11-pins { Ditto. Rest looks good, so I can fix it while applying. No need to resend, unless there will be other comments. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: (subset) [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC 2021-10-10 3:22 ` [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Chanho Park 2021-10-10 7:19 ` Krzysztof Kozlowski @ 2021-10-10 17:17 ` Krzysztof Kozlowski 2021-10-10 17:33 ` Krzysztof Kozlowski 1 sibling, 1 reply; 11+ messages in thread From: Krzysztof Kozlowski @ 2021-10-10 17:17 UTC (permalink / raw) To: Linus Walleij, Chanho Park, Rob Herring Cc: Krzysztof Kozlowski, Sylwester Nawrocki, devicetree, linux-samsung-soc, Tomasz Figa On Sun, 10 Oct 2021 12:22:45 +0900, Chanho Park wrote: > Add minimal support for ExynosAuto v9 SoC[1]. > > - Enumarate all pinctrl nodes > - UART with exynos850 compatible > - UFS0 HCI + Phy > > Like exynos850, this also uses fixed-rate clock nodes until clock driver > has been supported. The clock nodes are initialized on bootloader stage > thus we don't need to control them so far. > > [...] Applied, thanks! [2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC commit: f695b3f4c45d0051416fa7315cf553bec70198d8 Best regards, -- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: (subset) [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC 2021-10-10 17:17 ` (subset) " Krzysztof Kozlowski @ 2021-10-10 17:33 ` Krzysztof Kozlowski 2021-10-12 0:24 ` Chanho Park 0 siblings, 1 reply; 11+ messages in thread From: Krzysztof Kozlowski @ 2021-10-10 17:33 UTC (permalink / raw) To: Linus Walleij, Chanho Park, Rob Herring Cc: Sylwester Nawrocki, devicetree, linux-samsung-soc, Tomasz Figa On 10/10/2021 19:17, Krzysztof Kozlowski wrote: > On Sun, 10 Oct 2021 12:22:45 +0900, Chanho Park wrote: >> Add minimal support for ExynosAuto v9 SoC[1]. >> >> - Enumarate all pinctrl nodes >> - UART with exynos850 compatible >> - UFS0 HCI + Phy >> >> Like exynos850, this also uses fixed-rate clock nodes until clock driver >> has been supported. The clock nodes are initialized on bootloader stage >> thus we don't need to control them so far. >> >> [...] > > Applied, thanks! > > [2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC > commit: f695b3f4c45d0051416fa7315cf553bec70198d8 ... and dropped as build system found dtc W=1 warnings: ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:78.20-83.5: Warning (unit_address_format): /cpus/cpu@000000: unit name should not have leading 0s ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:85.20-90.5: Warning (unit_address_format): /cpus/cpu@000100: unit name should not have leading 0s ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:92.20-97.5: Warning (unit_address_format): /cpus/cpu@000200: unit name should not have leading 0s ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:99.20-104.5: Warning (unit_address_format): /cpus/cpu@000300: unit name should not have leading 0s ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:187.38-198.5: Warning (simple_bus_reg): /soc@0/interrupt-controller@11001000: simple-bus unit address format error, expected "10101000" ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:255.28-264.5: Warning (simple_bus_reg): /soc@0/uart@103000000: simple-bus unit address format error, expected "10300000" Please fix them plus these fixes: --- a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi @@ -570,14 +570,14 @@ hsi2c1_bus: hsi2c1-bus-pins { }; /* PERIC0 USI01 */ - hsi2c2_bus_pins: hsi2c2-bus-pins { + hsi2c2_bus: hsi2c2-bus-pins { samsung,pins = "gpp0-4", "gpp0-5"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; }; /* PERIC0 USI01_I2C */ - hsi2c3_bus_pins: hsi2c3-bus-pins { + hsi2c3_bus: hsi2c3-bus-pins { samsung,pins = "gpp0-6", "gpp0-7"; samsung,pin-function = <EXYNOS_PIN_FUNC_3>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -1066,7 +1066,7 @@ spi9_cs_func: spi9-cs-func-pins { }; /* PERIC1 USI10_SPI */ - spi10_pins: spi10-pins { + spi10_bus: spi10-bus-pins { samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -1088,7 +1088,7 @@ spi10_cs_func: spi10-cs-func-pins { }; /* PERIC1 USI11_SPI */ - spi11_pins: spi11-pins { + spi11_bus: spi11-bus-pins { samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; samsung,pin-function = <EXYNOS_PIN_FUNC_2>; samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index d884ae421e12..1dd1d73a52b8 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -171,7 +171,7 @@ uart_clock: uart-clock { * Keep the stub clock for ufs driver, until proper clock * driver is implemented. */ - ufs_core_clock: uart-core-clock { + ufs_core_clock: ufs-core-clock { Best regards, Krzysztof ^ permalink raw reply related [flat|nested] 11+ messages in thread
* RE: (subset) [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC 2021-10-10 17:33 ` Krzysztof Kozlowski @ 2021-10-12 0:24 ` Chanho Park 0 siblings, 0 replies; 11+ messages in thread From: Chanho Park @ 2021-10-12 0:24 UTC (permalink / raw) To: 'Krzysztof Kozlowski', 'Linus Walleij', 'Rob Herring' Cc: 'Sylwester Nawrocki', devicetree, linux-samsung-soc, 'Tomasz Figa' Hi Krzysztof, > -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > Sent: Monday, October 11, 2021 2:34 AM > To: Linus Walleij <linus.walleij@linaro.org>; Chanho Park > <chanho61.park@samsung.com>; Rob Herring <robh+dt@kernel.org> > Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>; > devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; Tomasz Figa > <tomasz.figa@gmail.com> > Subject: Re: (subset) [PATCH v3 2/3] arm64: dts: exynos: add initial > support for exynosautov9 SoC > > On 10/10/2021 19:17, Krzysztof Kozlowski wrote: > > On Sun, 10 Oct 2021 12:22:45 +0900, Chanho Park wrote: > >> Add minimal support for ExynosAuto v9 SoC[1]. > >> > >> - Enumarate all pinctrl nodes > >> - UART with exynos850 compatible > >> - UFS0 HCI + Phy > >> > >> Like exynos850, this also uses fixed-rate clock nodes until clock > >> driver has been supported. The clock nodes are initialized on > >> bootloader stage thus we don't need to control them so far. > >> > >> [...] > > > > Applied, thanks! > > > > [2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC > > commit: f695b3f4c45d0051416fa7315cf553bec70198d8 > > ... and dropped as build system found dtc W=1 warnings: > > ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:78.20-83.5: Warning > (unit_address_format): /cpus/cpu@000000: unit name should not have leading > 0s > ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:85.20-90.5: Warning > (unit_address_format): /cpus/cpu@000100: unit name should not have leading > 0s > ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:92.20-97.5: Warning > (unit_address_format): /cpus/cpu@000200: unit name should not have leading > 0s > ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:99.20-104.5: Warning > (unit_address_format): /cpus/cpu@000300: unit name should not have leading > 0s > ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:187.38-198.5: Warning > (simple_bus_reg): /soc@0/interrupt-controller@11001000: simple-bus unit > address format error, expected "10101000" > ../arch/arm64/boot/dts/exynos/exynosautov9.dtsi:255.28-264.5: Warning > (simple_bus_reg): /soc@0/uart@103000000: simple-bus unit address format > error, expected "10300000" > > Please fix them plus these fixes: Sorry for your inconvenience. I'll fix above and below what you changed as well. > > > --- a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi > @@ -570,14 +570,14 @@ hsi2c1_bus: hsi2c1-bus-pins { > }; > > /* PERIC0 USI01 */ > - hsi2c2_bus_pins: hsi2c2-bus-pins { > + hsi2c2_bus: hsi2c2-bus-pins { > samsung,pins = "gpp0-4", "gpp0-5"; > samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > }; > > /* PERIC0 USI01_I2C */ > - hsi2c3_bus_pins: hsi2c3-bus-pins { > + hsi2c3_bus: hsi2c3-bus-pins { > samsung,pins = "gpp0-6", "gpp0-7"; > samsung,pin-function = <EXYNOS_PIN_FUNC_3>; > samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -1066,7 +1066,7 > @@ spi9_cs_func: spi9-cs-func-pins { > }; > > /* PERIC1 USI10_SPI */ > - spi10_pins: spi10-pins { > + spi10_bus: spi10-bus-pins { > samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; > samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; @@ -1088,7 +1088,7 > @@ spi10_cs_func: spi10-cs-func-pins { > }; > > /* PERIC1 USI11_SPI */ > - spi11_pins: spi11-pins { > + spi11_bus: spi11-bus-pins { > samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; > samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; diff --git > a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > index d884ae421e12..1dd1d73a52b8 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi > @@ -171,7 +171,7 @@ uart_clock: uart-clock { > * Keep the stub clock for ufs driver, until proper clock > * driver is implemented. > */ > - ufs_core_clock: uart-core-clock { > + ufs_core_clock: ufs-core-clock { > Thanks. Best Regards, Chanho Park ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board 2021-10-10 3:22 ` [PATCH v3 0/3] add initial support for exynosautov9 Chanho Park 2021-10-10 3:22 ` [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Chanho Park 2021-10-10 3:22 ` [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Chanho Park @ 2021-10-10 3:22 ` Chanho Park 2021-10-10 17:17 ` (subset) " Krzysztof Kozlowski 2 siblings, 1 reply; 11+ messages in thread From: Chanho Park @ 2021-10-10 3:22 UTC (permalink / raw) To: Krzysztof Kozlowski, Rob Herring, Linus Walleij Cc: Tomasz Figa, Sylwester Nawrocki, linux-samsung-soc, devicetree, Chanho Park SADK(Samsung Automotive Development Kit) is the development kit to evaluate Exynos Auto v9 SoC. It has 16GB LPDDR4 DRAM and two 256GB Samsung UFS. This patch enables only serial console and ufs0 device. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- .../bindings/arm/samsung/samsung-boards.yaml | 6 ++ arch/arm64/boot/dts/exynos/Makefile | 3 +- .../boot/dts/exynos/exynosautov9-sadk.dts | 56 +++++++++++++++++++ 3 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 0796f0c87727..ef6dc14be4b5 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -199,6 +199,12 @@ properties: - samsung,exynos7-espresso # Samsung Exynos7 Espresso - const: samsung,exynos7 + - description: Exynos Auto v9 based boards + items: + - enum: + - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK + - const: samsung,exynosautov9 + required: - compatible diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index e0a2facde6a2..b41e86df0a84 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -2,4 +2,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos5433-tm2.dtb \ exynos5433-tm2e.dtb \ - exynos7-espresso.dtb + exynos7-espresso.dtb \ + exynosautov9-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts new file mode 100644 index 000000000000..ef46d7aa6e28 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung ExynosAutov9 SADK board device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +/dts-v1/; +#include "exynosautov9.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Samsung ExynosAuto v9 SADK board"; + compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9"; + + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial_0; + }; + + chosen { + stdout-path = &serial_0; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x77000000>, + <0x8 0x80000000 0x1 0x7ba00000>, + <0xa 0x00000000 0x2 0x00000000>; + }; + + ufs_0_fixed_vcc_reg: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "ufs-vcc"; + gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + }; +}; + +&serial_0 { + status = "okay"; +}; + +&ufs_0_phy { + status = "okay"; +}; + +&ufs_0 { + status = "okay"; + vcc-supply = <&ufs_0_fixed_vcc_reg>; + vcc-fixed-regulator; +}; -- 2.33.0 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: (subset) [PATCH v3 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board 2021-10-10 3:22 ` [PATCH v3 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board Chanho Park @ 2021-10-10 17:17 ` Krzysztof Kozlowski 0 siblings, 0 replies; 11+ messages in thread From: Krzysztof Kozlowski @ 2021-10-10 17:17 UTC (permalink / raw) To: Linus Walleij, Chanho Park, Rob Herring Cc: Krzysztof Kozlowski, Tomasz Figa, devicetree, linux-samsung-soc, Sylwester Nawrocki On Sun, 10 Oct 2021 12:22:46 +0900, Chanho Park wrote: > SADK(Samsung Automotive Development Kit) is the development kit to > evaluate Exynos Auto v9 SoC. It has 16GB LPDDR4 DRAM and two > 256GB Samsung UFS. This patch enables only serial console and ufs0 > device. > > Applied, thanks! [3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board commit: a89d8b5ce9af2128db074a5f0f5096b2716085aa Best regards, -- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> ^ permalink raw reply [flat|nested] 11+ messages in thread
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2021-10-10 3:22 ` [PATCH v3 0/3] add initial support for exynosautov9 Chanho Park
2021-10-10 3:22 ` [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Chanho Park
2021-10-10 7:16 ` Krzysztof Kozlowski
2021-10-21 10:05 ` Lee Jones
2021-10-10 3:22 ` [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Chanho Park
2021-10-10 7:19 ` Krzysztof Kozlowski
2021-10-10 17:17 ` (subset) " Krzysztof Kozlowski
2021-10-10 17:33 ` Krzysztof Kozlowski
2021-10-12 0:24 ` Chanho Park
2021-10-10 3:22 ` [PATCH v3 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board Chanho Park
2021-10-10 17:17 ` (subset) " Krzysztof Kozlowski
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