From: Catalin Marinas <catalin.marinas@arm.com>
To: Guanghui Feng <guanghuifeng@linux.alibaba.com>
Cc: will@kernel.org, maz@kernel.org, qperret@google.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, baolin.wang@linux.alibaba.com,
zhuo.song@linux.alibaba.com, zhangliguang@linux.alibaba.com
Subject: Re: [PATCH] arm64: clear_page: use stnp non-temporal instruction for performance optimizing
Date: Tue, 16 Nov 2021 18:17:12 +0000 [thread overview]
Message-ID: <YZP1qMj4dWCbDrN6@arm.com> (raw)
In-Reply-To: <1637075294-30747-1-git-send-email-guanghuifeng@linux.alibaba.com>
On Tue, Nov 16, 2021 at 11:08:14PM +0800, Guanghui Feng wrote:
> When clear page mem, there is no need to alloc cache for storing these
> mem value.
I theory, DC ZVA is supposed to trigger write streaming mode and all
writes go directly to memory avoiding cache allocation.
> And the copy_page.S have used stnp instruction for optimizing.
> So I rewrite the clear_page.S with stnp. At the same time, I have tested it
> with stnp instruction which will get about twice the performance improvement.
On which CPU implementation? Is the same improvement seen on a wider
range of CPUs?
--
Catalin
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WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Guanghui Feng <guanghuifeng@linux.alibaba.com>
Cc: will@kernel.org, maz@kernel.org, qperret@google.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, baolin.wang@linux.alibaba.com,
zhuo.song@linux.alibaba.com, zhangliguang@linux.alibaba.com
Subject: Re: [PATCH] arm64: clear_page: use stnp non-temporal instruction for performance optimizing
Date: Tue, 16 Nov 2021 18:17:12 +0000 [thread overview]
Message-ID: <YZP1qMj4dWCbDrN6@arm.com> (raw)
In-Reply-To: <1637075294-30747-1-git-send-email-guanghuifeng@linux.alibaba.com>
On Tue, Nov 16, 2021 at 11:08:14PM +0800, Guanghui Feng wrote:
> When clear page mem, there is no need to alloc cache for storing these
> mem value.
I theory, DC ZVA is supposed to trigger write streaming mode and all
writes go directly to memory avoiding cache allocation.
> And the copy_page.S have used stnp instruction for optimizing.
> So I rewrite the clear_page.S with stnp. At the same time, I have tested it
> with stnp instruction which will get about twice the performance improvement.
On which CPU implementation? Is the same improvement seen on a wider
range of CPUs?
--
Catalin
next prev parent reply other threads:[~2021-11-16 18:18 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-16 15:08 [PATCH] arm64: clear_page: use stnp non-temporal instruction for performance optimizing Guanghui Feng
2021-11-16 15:08 ` Guanghui Feng
2021-11-16 18:17 ` Catalin Marinas [this message]
2021-11-16 18:17 ` Catalin Marinas
2021-11-16 23:12 ` Robin Murphy
2021-11-16 23:12 ` Robin Murphy
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