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From: Rob Herring <robh@kernel.org>
To: Harsha <harsha.harsha@xilinx.com>
Cc: herbert@gondor.apana.org.au, davem@davemloft.net,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, saratcha@xilinx.com,
	harshj@xilinx.com
Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver
Date: Tue, 7 Dec 2021 15:30:10 -0600	[thread overview]
Message-ID: <Ya/SYqbVTPRdch5x@robh.at.kernel.org> (raw)
In-Reply-To: <1638262465-10790-4-git-send-email-harsha.harsha@xilinx.com>

On Tue, Nov 30, 2021 at 02:24:22PM +0530, Harsha wrote:
> This patch adds documentation to describe Xilinx ZynqMP SHA3 driver
> bindings.
> 
> Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> ---
>  .../bindings/crypto/xlnx,zynqmp-sha3.yaml          | 30 ++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> new file mode 100644
> index 0000000..45a8022
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> @@ -0,0 +1,30 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-sha3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx ZynqMP SHA3 Hardware Accelerator Device Tree Bindings
> +
> +maintainers:
> +  - Harsha Harsha<harsha.harsha@xilinx.com>

space               ^

> +
> +description: |

Don't need '|' if no formatting to preserve.

> +  The ZynqMP SHA3 hardened cryptographic accelerator is used to
> +  calculate the SHA3 hash for the given user data.
> +
> +properties:
> +  compatible:
> +    const: xlnx,zynqmp-sha3-384
> +
> +required:
> +  - compatible
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    xlnx_sha3_384: sha3-384 {

crypto {

> +      compatible = "xlnx,zynqmp-sha3-384";

You need some way to access this h/w.

> +    };
> +...
> -- 
> 1.8.2.1
> 
> 

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Harsha <harsha.harsha@xilinx.com>
Cc: herbert@gondor.apana.org.au, davem@davemloft.net,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, saratcha@xilinx.com,
	harshj@xilinx.com
Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver
Date: Tue, 7 Dec 2021 15:30:10 -0600	[thread overview]
Message-ID: <Ya/SYqbVTPRdch5x@robh.at.kernel.org> (raw)
In-Reply-To: <1638262465-10790-4-git-send-email-harsha.harsha@xilinx.com>

On Tue, Nov 30, 2021 at 02:24:22PM +0530, Harsha wrote:
> This patch adds documentation to describe Xilinx ZynqMP SHA3 driver
> bindings.
> 
> Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> ---
>  .../bindings/crypto/xlnx,zynqmp-sha3.yaml          | 30 ++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> new file mode 100644
> index 0000000..45a8022
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> @@ -0,0 +1,30 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-sha3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx ZynqMP SHA3 Hardware Accelerator Device Tree Bindings
> +
> +maintainers:
> +  - Harsha Harsha<harsha.harsha@xilinx.com>

space               ^

> +
> +description: |

Don't need '|' if no formatting to preserve.

> +  The ZynqMP SHA3 hardened cryptographic accelerator is used to
> +  calculate the SHA3 hash for the given user data.
> +
> +properties:
> +  compatible:
> +    const: xlnx,zynqmp-sha3-384
> +
> +required:
> +  - compatible
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    xlnx_sha3_384: sha3-384 {

crypto {

> +      compatible = "xlnx,zynqmp-sha3-384";

You need some way to access this h/w.

> +    };
> +...
> -- 
> 1.8.2.1
> 
> 

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  reply	other threads:[~2021-12-07 21:30 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-30  8:54 [RFC PATCH 0/6] crypto: Add Xilinx ZynqMP SHA3 driver support Harsha
2021-11-30  8:54 ` Harsha
2021-11-30  8:54 ` [RFC PATCH 1/6] drivers: crypto: Updated Makefile for xilinx subdirectory Harsha
2021-11-30  8:54   ` Harsha
2021-11-30  8:54 ` [RFC PATCH 2/6] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality Harsha
2021-11-30  8:54   ` Harsha
2021-11-30  8:54 ` [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver Harsha
2021-11-30  8:54   ` Harsha
2021-12-07 21:30   ` Rob Herring [this message]
2021-12-07 21:30     ` Rob Herring
2021-12-08  4:17     ` Harsha Harsha
2021-12-08  4:17       ` Harsha Harsha
2021-12-08 17:12       ` Rob Herring
2021-12-08 17:12         ` Rob Herring
2021-12-09  7:20         ` Harsha Harsha
2021-12-09  7:20           ` Harsha Harsha
2021-11-30  8:54 ` [RFC PATCH 4/6] arm64: dts: zynqmp: Add Xilinx SHA3 node Harsha
2021-11-30  8:54   ` Harsha
2021-11-30  8:54 ` [RFC PATCH 5/6] crypto: xilinx: Add Xilinx SHA3 driver Harsha
2021-11-30  8:54   ` Harsha
2021-11-30 14:14   ` Randy Dunlap
2021-11-30 14:14     ` Randy Dunlap
2021-11-30 16:38     ` Harsha Harsha
2021-11-30 16:38       ` Harsha Harsha
2021-11-30 18:07   ` kernel test robot
2021-11-30  8:54 ` [RFC PATCH 6/6] MAINTAINERS: Add maintainer for Xilinx ZynqMP " Harsha
2021-11-30  8:54   ` Harsha

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