From: Rob Herring <robh@kernel.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: devicetree@vger.kernel.org, Will Deacon <will@kernel.org>,
Jon Hunter <jonathanh@nvidia.com>,
iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org,
Robin Murphy <robin.murphy@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/4] dt-bindings: arm-smmu: Document nvidia,memory-controller property
Date: Mon, 29 Nov 2021 15:03:24 -0600 [thread overview]
Message-ID: <YaVAHNXpQS8gG+l0@robh.at.kernel.org> (raw)
In-Reply-To: <20211112131231.3683098-2-thierry.reding@gmail.com>
On Fri, Nov 12, 2021 at 02:12:28PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> On NVIDIA SoC's the ARM SMMU needs to interact with the memory
> controller in order to map memory clients to the corresponding stream
> IDs. Document how the nvidia,memory-controller property can be used to
> achieve this.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index f66a3effba73..cf32a7955475 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -155,6 +155,12 @@ properties:
> power-domains:
> maxItems: 1
>
> + nvidia,memory-controller:
> + description: A phandle to the memory controller on NVIDIA Tegra186
> + and later SoCs. The memory controller needs to be programmed with
> + a mapping of memory client IDs to ARM SMMU stream IDs.
> + $ref: /schemas/types.yaml#/definitions/phandle
> +
> required:
> - compatible
> - reg
> @@ -177,6 +183,9 @@ allOf:
> reg:
> minItems: 1
> maxItems: 2
> +
> + required:
> + - nvidia,memory-controller
That's not a compatible change. Document why it is necessary if that's
intended.
> else:
> properties:
> reg:
> --
> 2.33.1
>
>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jon Hunter <jonathanh@nvidia.com>,
iommu@lists.linux-foundation.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/4] dt-bindings: arm-smmu: Document nvidia,memory-controller property
Date: Mon, 29 Nov 2021 15:03:24 -0600 [thread overview]
Message-ID: <YaVAHNXpQS8gG+l0@robh.at.kernel.org> (raw)
In-Reply-To: <20211112131231.3683098-2-thierry.reding@gmail.com>
On Fri, Nov 12, 2021 at 02:12:28PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> On NVIDIA SoC's the ARM SMMU needs to interact with the memory
> controller in order to map memory clients to the corresponding stream
> IDs. Document how the nvidia,memory-controller property can be used to
> achieve this.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index f66a3effba73..cf32a7955475 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -155,6 +155,12 @@ properties:
> power-domains:
> maxItems: 1
>
> + nvidia,memory-controller:
> + description: A phandle to the memory controller on NVIDIA Tegra186
> + and later SoCs. The memory controller needs to be programmed with
> + a mapping of memory client IDs to ARM SMMU stream IDs.
> + $ref: /schemas/types.yaml#/definitions/phandle
> +
> required:
> - compatible
> - reg
> @@ -177,6 +183,9 @@ allOf:
> reg:
> minItems: 1
> maxItems: 2
> +
> + required:
> + - nvidia,memory-controller
That's not a compatible change. Document why it is necessary if that's
intended.
> else:
> properties:
> reg:
> --
> 2.33.1
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jon Hunter <jonathanh@nvidia.com>,
iommu@lists.linux-foundation.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/4] dt-bindings: arm-smmu: Document nvidia,memory-controller property
Date: Mon, 29 Nov 2021 15:03:24 -0600 [thread overview]
Message-ID: <YaVAHNXpQS8gG+l0@robh.at.kernel.org> (raw)
In-Reply-To: <20211112131231.3683098-2-thierry.reding@gmail.com>
On Fri, Nov 12, 2021 at 02:12:28PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> On NVIDIA SoC's the ARM SMMU needs to interact with the memory
> controller in order to map memory clients to the corresponding stream
> IDs. Document how the nvidia,memory-controller property can be used to
> achieve this.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index f66a3effba73..cf32a7955475 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -155,6 +155,12 @@ properties:
> power-domains:
> maxItems: 1
>
> + nvidia,memory-controller:
> + description: A phandle to the memory controller on NVIDIA Tegra186
> + and later SoCs. The memory controller needs to be programmed with
> + a mapping of memory client IDs to ARM SMMU stream IDs.
> + $ref: /schemas/types.yaml#/definitions/phandle
> +
> required:
> - compatible
> - reg
> @@ -177,6 +183,9 @@ allOf:
> reg:
> minItems: 1
> maxItems: 2
> +
> + required:
> + - nvidia,memory-controller
That's not a compatible change. Document why it is necessary if that's
intended.
> else:
> properties:
> reg:
> --
> 2.33.1
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-11-29 21:03 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-12 13:12 [PATCH 0/4] iommu/arm-smmu: Support Tegra234 SMMU Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:12 ` [PATCH 1/4] dt-bindings: arm-smmu: Document nvidia, memory-controller property Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:12 ` [PATCH 1/4] dt-bindings: arm-smmu: Document nvidia,memory-controller property Thierry Reding
2021-11-29 21:03 ` Rob Herring [this message]
2021-11-29 21:03 ` Rob Herring
2021-11-29 21:03 ` Rob Herring
2021-11-12 13:12 ` [PATCH 2/4] dt-bindings: arm-smmu: Add compatible for Tegra234 SOC Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-29 21:03 ` Rob Herring
2021-11-29 21:03 ` Rob Herring
2021-11-29 21:03 ` Rob Herring
2021-11-12 13:12 ` [PATCH 3/4] iommu/arm-smmu: Support Tegra234 SMMU Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:12 ` [PATCH 4/4] arm64: tegra: Add Tegra234 IOMMUs Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:12 ` Thierry Reding
2021-11-12 13:43 ` [PATCH 0/4] iommu/arm-smmu: Support Tegra234 SMMU Robin Murphy
2021-11-12 13:43 ` Robin Murphy
2021-11-12 13:43 ` Robin Murphy
2021-11-12 14:56 ` Thierry Reding
2021-11-12 14:56 ` Thierry Reding
2021-11-12 14:56 ` Thierry Reding
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