From: Rob Herring <robh@kernel.org>
To: Sumit Gupta <sumitg@nvidia.com>
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, thierry.reding@gmail.com,
jonathanh@nvidia.com, kbuild-all@lists.01.org, bbasu@nvidia.com,
vsethi@nvidia.com, jsequeira@nvidia.com,
Thierry Reding <treding@nvidia.com>
Subject: Re: [Patch v3 3/9] dt-bindings: arm: tegra: Add NVIDIA Tegra194 axi2apb binding
Date: Wed, 22 Dec 2021 14:35:27 -0400 [thread overview]
Message-ID: <YcNv7xm19sFTlfjW@robh.at.kernel.org> (raw)
In-Reply-To: <20211221125117.6545-4-sumitg@nvidia.com>
On Tue, Dec 21, 2021 at 06:21:11PM +0530, Sumit Gupta wrote:
> Add device-tree binding documentation to represent the axi2apb bridges
> used by Control Backbone (CBB) 1.0 in Tegra194 SOC. All errors for APB
> slaves are reported as slave error because APB bas single bit to report
> error. So, CBB driver needs to further check error status registers of
> all the axi2apb bridges to find error type.
>
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> .../arm/tegra/nvidia,tegra194-axi2apb.yaml | 40 +++++++++++++++++++
> 1 file changed, 40 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
> new file mode 100644
> index 000000000000..788a13f8aa93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: NVIDIA Tegra194 AXI2APB bridge
> +
> +maintainers:
> + - Sumit Gupta <sumitg@nvidia.com>
> +
> +properties:
> + $nodename:
> + pattern: "^axi2apb@([0-9a-f]+)$"
> +
> + compatible:
> + enum:
> + - nvidia,tegra194-axi2apb
> +
> + reg:
> + maxItems: 6
> + description: Physical base address and length of registers for all bridges
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + axi2apb: axi2apb@2390000 {
As axi2apb appears to be a bus, then all the child nodes (APB devices)
should be under this node.
Is NVidia still putting all the devices at the root level rather than
under a bus node which is preferred?
> + compatible = "nvidia,tegra194-axi2apb";
> + reg = <0x02390000 0x1000>,
> + <0x023a0000 0x1000>,
> + <0x023b0000 0x1000>,
> + <0x023c0000 0x1000>,
> + <0x023d0000 0x1000>,
> + <0x023e0000 0x1000>;
> + };
> --
> 2.17.1
>
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: kbuild-all@lists.01.org
Subject: Re: [Patch v3 3/9] dt-bindings: arm: tegra: Add NVIDIA Tegra194 axi2apb binding
Date: Wed, 22 Dec 2021 14:35:27 -0400 [thread overview]
Message-ID: <YcNv7xm19sFTlfjW@robh.at.kernel.org> (raw)
In-Reply-To: <20211221125117.6545-4-sumitg@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 2358 bytes --]
On Tue, Dec 21, 2021 at 06:21:11PM +0530, Sumit Gupta wrote:
> Add device-tree binding documentation to represent the axi2apb bridges
> used by Control Backbone (CBB) 1.0 in Tegra194 SOC. All errors for APB
> slaves are reported as slave error because APB bas single bit to report
> error. So, CBB driver needs to further check error status registers of
> all the axi2apb bridges to find error type.
>
> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> .../arm/tegra/nvidia,tegra194-axi2apb.yaml | 40 +++++++++++++++++++
> 1 file changed, 40 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
> new file mode 100644
> index 000000000000..788a13f8aa93
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: NVIDIA Tegra194 AXI2APB bridge
> +
> +maintainers:
> + - Sumit Gupta <sumitg@nvidia.com>
> +
> +properties:
> + $nodename:
> + pattern: "^axi2apb@([0-9a-f]+)$"
> +
> + compatible:
> + enum:
> + - nvidia,tegra194-axi2apb
> +
> + reg:
> + maxItems: 6
> + description: Physical base address and length of registers for all bridges
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + axi2apb: axi2apb(a)2390000 {
As axi2apb appears to be a bus, then all the child nodes (APB devices)
should be under this node.
Is NVidia still putting all the devices at the root level rather than
under a bus node which is preferred?
> + compatible = "nvidia,tegra194-axi2apb";
> + reg = <0x02390000 0x1000>,
> + <0x023a0000 0x1000>,
> + <0x023b0000 0x1000>,
> + <0x023c0000 0x1000>,
> + <0x023d0000 0x1000>,
> + <0x023e0000 0x1000>;
> + };
> --
> 2.17.1
>
>
next prev parent reply other threads:[~2021-12-22 18:35 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-21 12:51 [Patch v3 0/9] CBB driver for Tegra194, Tegra234 & Tegra-Grace Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 1/9] soc: tegra: set ERD bit to mask inband errors Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 2/9] dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB1.0 binding Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 3/9] dt-bindings: arm: tegra: Add NVIDIA Tegra194 axi2apb binding Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-22 18:35 ` Rob Herring [this message]
2021-12-22 18:35 ` Rob Herring
2021-12-23 8:24 ` Sumit Gupta
2021-12-23 8:24 ` Sumit Gupta
2021-12-27 15:41 ` Rob Herring
2021-12-27 15:41 ` Rob Herring
2022-02-23 13:22 ` Thierry Reding
2022-02-23 13:22 ` Thierry Reding
2022-03-16 7:45 ` Sumit Gupta
2022-03-16 7:45 ` Sumit Gupta
2022-04-07 6:24 ` Sumit Gupta
2022-04-07 6:24 ` Sumit Gupta
2022-05-05 14:04 ` Rob Herring
2022-05-05 14:04 ` Rob Herring
2022-05-05 17:19 ` Sumit Gupta
2022-05-05 17:19 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 4/9] arm64: tegra: Add node for CBB1.0 in Tegra194 SOC Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 5/9] soc: tegra: cbb: Add CBB1.0 driver for Tegra194 Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 6/9] dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB2.0 binding Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 7/9] arm64: tegra: Add node for CBB2.0 in Tegra234 SOC Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 8/9] soc: tegra: cbb: Add driver for Tegra234 CBB2.0 Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
2021-12-21 12:51 ` [Patch v3 9/9] soc: tegra: cbb: Add support for tegra-grace SOC Sumit Gupta
2021-12-21 12:51 ` Sumit Gupta
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