From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip for DG2
Date: Mon, 24 Jan 2022 09:42:20 +0200 [thread overview]
Message-ID: <Ye5YXNKZjgLSK3dx@intel.com> (raw)
In-Reply-To: <20220123203417.GA27532@intel.com>
On Sun, Jan 23, 2022 at 10:34:17PM +0200, Lisovskiy, Stanislav wrote:
> On Fri, Jan 21, 2022 at 02:06:12PM +0200, Ville Syrjälä wrote:
> > On Fri, Jan 21, 2022 at 10:06:15AM +0200, Stanislav Lisovskiy wrote:
> > > In terms of async flip optimization we don't to allocate
> > > extra ddb space, so lets skip it.
> > >
> > > v2: - Extracted min ddb async flip check to separate function
> > > (Ville Syrjälä)
> > > - Used this function to prevent false positive WARN
> > > to be triggered(Ville Syrjälä)
> > >
> > > v3: - Renamed dg2_need_min_ddb to need_min_ddb thus making
> > > it more universal.
> > > - Also used DISPLAY_VER instead of IS_DG2(Ville Syrjälä)
> > > - Use rate = 0 instead of just setting extra = 0, thus
> > > letting other planes to use extra ddb and avoiding WARN
> > > (Ville Syrjälä)
> > >
> > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_pm.c | 17 +++++++++++++++++
> > > 1 file changed, 17 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 5fb022a2a4d7..18fb35c480ef 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -5118,6 +5118,12 @@ static bool icl_need_wm1_wa(struct drm_i915_private *i915,
> > > (IS_DISPLAY_VER(i915, 12, 13) && plane_id == PLANE_CURSOR);
> > > }
> > >
> > > +static bool needs_min_ddb(struct drm_i915_private *i915,
> > > + struct intel_crtc_state *crtc_state)
> >
> > s/needs/use/ to match the wm0 counterpart?
> >
> > Could use a comment as well perhaps, or maybe just put this right
> > next to the wm0 counterpart so the reader can see both together and
> > make the connection.
> >
> > Hmm. Actually I think this would also need the plane->async_flip
> > check here too or else we'll drop all the planes to min ddb
> > instead of just the plane doing async flips.
> >
> > Oh, and I think we need this same thing when calculating the
> > total_data_rate or else the numbers won't match.
>
> Yes, there seems to be a problem with that approach, we use ratio
> from data plane_data_rate/total_data_rate to determine how we split
> extra ddb blocks, however if plane data rate can be just set as 0
> here localle, total_data_rate is obtained from crtc_state->plane_data_rate,
> which is being calculated first.
> So if we trick icl_get_total_relative_data_rate function to calculate
> total_data_rate corresponding to rate = 0, we will then have
> crtc_state->plane_data_rate[plane_id] set to 0, which is probably
> not what we want.
These are just the relative data rates so they're not actually used for
anything else. So I guess we could even set them to 0. Though I don't
even recall if the current code really works or not. I think there
might have been some problem with calculating these that I perhaps fixed
with my latest ddb series (or maybe I already fixed it with some earlier
series, can't remember anymore).
>
> Or should I just edit icl_get_total_relative_data_rate so that it
> still calculates crtc_state->plane_data_rate properly however, the
> doesn't add those to total_data_rate, if use_min_ddb(plane) is set?
This should work too. Can't immediately think why one approach would
be strictly better than the other.
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2022-01-24 7:42 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-21 8:06 [Intel-gfx] [PATCH 0/4] Async flip optimization for DG2 Stanislav Lisovskiy
2022-01-21 8:06 ` [Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions Stanislav Lisovskiy
2022-01-21 11:47 ` Ville Syrjälä
2022-01-21 8:06 ` [Intel-gfx] [PATCH 2/4] drm/i915: Introduce do_async_flip flag to intel_plane_state Stanislav Lisovskiy
2022-01-21 11:48 ` Ville Syrjälä
2022-01-21 8:06 ` [Intel-gfx] [PATCH 3/4] drm/i915: Use wm0 only during async flips for DG2 Stanislav Lisovskiy
2022-01-21 11:59 ` Ville Syrjälä
2022-01-21 8:06 ` [Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip " Stanislav Lisovskiy
2022-01-21 12:06 ` Ville Syrjälä
2022-01-23 20:34 ` Lisovskiy, Stanislav
2022-01-24 7:42 ` Ville Syrjälä [this message]
2022-01-21 8:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Async flip optimization for DG2 (rev3) Patchwork
2022-01-21 8:52 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-01-21 11:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Async flip optimization for DG2 (rev4) Patchwork
2022-01-21 11:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-21 13:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-01-24 9:06 [Intel-gfx] [PATCH 0/4] Async flip optimization for DG2 Stanislav Lisovskiy
2022-01-24 9:06 ` [Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip " Stanislav Lisovskiy
2022-01-24 9:16 ` Ville Syrjälä
2022-01-24 9:29 ` Lisovskiy, Stanislav
2022-01-24 9:51 ` Stanislav Lisovskiy
2022-01-24 10:32 ` Ville Syrjälä
2022-01-24 13:52 ` Stanislav Lisovskiy
2022-01-24 18:55 ` Ville Syrjälä
2022-01-25 11:36 ` Lisovskiy, Stanislav
2022-01-18 10:48 [Intel-gfx] [PATCH 0/4] Async flip optimization " Stanislav Lisovskiy
2022-01-18 10:48 ` [Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip " Stanislav Lisovskiy
2022-01-19 11:59 ` Ville Syrjälä
2021-12-07 11:07 [Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions Stanislav Lisovskiy
2021-12-07 11:07 ` [Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip for DG2 Stanislav Lisovskiy
2021-12-03 9:40 [Intel-gfx] [PATCH 1/4] drm/i915: Pass plane id to watermark calculation functions Stanislav Lisovskiy
2021-12-03 9:40 ` [Intel-gfx] [PATCH 4/4] drm/i915: Don't allocate extra ddb during async flip for DG2 Stanislav Lisovskiy
2021-12-03 10:03 ` Ville Syrjälä
2021-12-03 10:17 ` Lisovskiy, Stanislav
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Ye5YXNKZjgLSK3dx@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=stanislav.lisovskiy@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.