From: Catalin Marinas <catalin.marinas@arm.com>
To: cgel.zte@gmail.com
Cc: pasha.tatashin@soleen.com, si.hao@zte.com.cn,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, will@kernel.org,
james.morse@arm.com
Subject: Re: [PATCH linux-next] arm64: kexec: Support the case of VA_BITS=39 in trans_pgd_idmap_page()
Date: Fri, 21 Jan 2022 17:07:35 +0000 [thread overview]
Message-ID: <YeroVxXEcUz8RTgv@arm.com> (raw)
In-Reply-To: <20220121065216.1001021-1-si.hao@zte.com.cn>
On Fri, Jan 21, 2022 at 06:52:16AM +0000, cgel.zte@gmail.com wrote:
> From: sihao <si.hao@zte.com.cn>
>
> When the values of CONFIG_ARM64_VA_BITS and CONFIG_ARM64_PA_BITS are not
> equal, the following panic occurs when kexec is executed.
>
> This happens because trans_pgd_idmap_page() does not support VA_BITS=39.
> So the patch supports the case of VA_BITS=39.
[...]
> diff --git a/arch/arm64/mm/trans_pgd.c b/arch/arm64/mm/trans_pgd.c
> index d7da8ca40d2e..3d88185adcf5 100644
> --- a/arch/arm64/mm/trans_pgd.c
> +++ b/arch/arm64/mm/trans_pgd.c
> @@ -232,7 +232,7 @@ int trans_pgd_idmap_page(struct trans_pgd_info *info, phys_addr_t *trans_ttbr0,
> {
> phys_addr_t dst_addr = virt_to_phys(page);
> unsigned long pfn = __phys_to_pfn(dst_addr);
> - int max_msb = (dst_addr & GENMASK(52, 48)) ? 51 : 47;
This should have been GENMASK(51, 48), though it doesn't make any
difference and may work better with the change below:
> + int max_msb = (dst_addr & GENMASK(52, VA_BITS)) ? 51 : (VA_BITS - 1);
So when VA_BITS == 52, the mask is 0 and we set max_msb to 51.
I wonder, could we use fls64() instead here?
--
Catalin
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WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: cgel.zte@gmail.com
Cc: pasha.tatashin@soleen.com, si.hao@zte.com.cn,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, will@kernel.org,
james.morse@arm.com
Subject: Re: [PATCH linux-next] arm64: kexec: Support the case of VA_BITS=39 in trans_pgd_idmap_page()
Date: Fri, 21 Jan 2022 17:07:35 +0000 [thread overview]
Message-ID: <YeroVxXEcUz8RTgv@arm.com> (raw)
In-Reply-To: <20220121065216.1001021-1-si.hao@zte.com.cn>
On Fri, Jan 21, 2022 at 06:52:16AM +0000, cgel.zte@gmail.com wrote:
> From: sihao <si.hao@zte.com.cn>
>
> When the values of CONFIG_ARM64_VA_BITS and CONFIG_ARM64_PA_BITS are not
> equal, the following panic occurs when kexec is executed.
>
> This happens because trans_pgd_idmap_page() does not support VA_BITS=39.
> So the patch supports the case of VA_BITS=39.
[...]
> diff --git a/arch/arm64/mm/trans_pgd.c b/arch/arm64/mm/trans_pgd.c
> index d7da8ca40d2e..3d88185adcf5 100644
> --- a/arch/arm64/mm/trans_pgd.c
> +++ b/arch/arm64/mm/trans_pgd.c
> @@ -232,7 +232,7 @@ int trans_pgd_idmap_page(struct trans_pgd_info *info, phys_addr_t *trans_ttbr0,
> {
> phys_addr_t dst_addr = virt_to_phys(page);
> unsigned long pfn = __phys_to_pfn(dst_addr);
> - int max_msb = (dst_addr & GENMASK(52, 48)) ? 51 : 47;
This should have been GENMASK(51, 48), though it doesn't make any
difference and may work better with the change below:
> + int max_msb = (dst_addr & GENMASK(52, VA_BITS)) ? 51 : (VA_BITS - 1);
So when VA_BITS == 52, the mask is 0 and we set max_msb to 51.
I wonder, could we use fls64() instead here?
--
Catalin
next prev parent reply other threads:[~2022-01-21 17:09 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-21 6:52 [PATCH linux-next] arm64: kexec: Support the case of VA_BITS=39 in trans_pgd_idmap_page() cgel.zte
2022-01-21 6:52 ` cgel.zte
2022-01-21 17:07 ` Catalin Marinas [this message]
2022-01-21 17:07 ` Catalin Marinas
2022-02-15 18:28 ` Will Deacon
2022-02-15 18:28 ` Will Deacon
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