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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Oleksandr Andrushchenko <Oleksandr_Andrushchenko@epam.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	"julien@xen.org" <julien@xen.org>,
	"sstabellini@kernel.org" <sstabellini@kernel.org>,
	Oleksandr Tyshchenko <Oleksandr_Tyshchenko@epam.com>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	Artem Mygaiev <Artem_Mygaiev@epam.com>,
	"jbeulich@suse.com" <jbeulich@suse.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"george.dunlap@citrix.com" <george.dunlap@citrix.com>,
	"paul@xen.org" <paul@xen.org>,
	Bertrand Marquis <bertrand.marquis@arm.com>,
	Rahul Singh <rahul.singh@arm.com>
Subject: Re: [PATCH v5 06/14] vpci/header: implement guest BAR register handlers
Date: Mon, 31 Jan 2022 12:04:56 +0100	[thread overview]
Message-ID: <YffCWGuP9ny8zG2p@Air-de-Roger> (raw)
In-Reply-To: <77c00154-646c-a2a3-98cb-be4324003446@epam.com>

On Mon, Jan 31, 2022 at 09:47:07AM +0000, Oleksandr Andrushchenko wrote:
> Hi, Roger!
> 
> On 12.01.22 14:35, Roger Pau Monné wrote:
> > On Thu, Nov 25, 2021 at 01:02:43PM +0200, Oleksandr Andrushchenko wrote:
> >> From: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
> >> +static void guest_rom_write(const struct pci_dev *pdev, unsigned int reg,
> >> +                            uint32_t val, void *data)
> >> +{
> >> +}
> >> +
> >> +static uint32_t guest_rom_read(const struct pci_dev *pdev, unsigned int reg,
> >> +                               void *data)
> >> +{
> >> +    return 0xffffffff;
> >> +}
> > There should be no need for those handlers. As said elsewhere: for
> > guests registers not explicitly handled should return ~0 for reads and
> > drop writes, which is what you are proposing here.
> Yes, you are right: I can see in vpci_read that we end up reading ~0 if no
> handler exists (which is what I do here with guest_rom_read). But I am not that
> sure about the dropped writes:
> 
> void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
>                  uint32_t data)
> {
>      unsigned int data_offset = 0;
> 
> [snip]
> 
>      if ( data_offset < size )
>          /* Tailing gap, write the remaining. */
>          vpci_write_hw(sbdf, reg + data_offset, size - data_offset,
>                        data >> (data_offset * 8));
> 
> so it looks like for the un-handled writes we still reach the HW register.
> Could you please tell if the code above needs improvement (like checking
> if the write was handled) or I still need to provide a write handler, e.g.
> guest_rom_write here?

Right now (given the current code) unhandled reads and writes will all
end up being forwarded to the hardware. This is intended for dom0, but
this is not how it's going to work for domUs, where accesses will be
discarded based on an accept list. IOW the handlers that you are
adding here should be the default behavior for registers not
explicitly handled in the domU case, and shouldn't require explicit
handling.

> >> +
> >>   static int init_bars(struct pci_dev *pdev)
> >>   {
> >>       uint16_t cmd;
> >> @@ -489,6 +542,7 @@ static int init_bars(struct pci_dev *pdev)
> >>       struct vpci_header *header = &pdev->vpci->header;
> >>       struct vpci_bar *bars = header->bars;
> >>       int rc;
> >> +    bool is_hwdom = is_hardware_domain(pdev->domain);
> >>   
> >>       switch ( pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f )
> >>       {
> >> @@ -528,8 +582,10 @@ static int init_bars(struct pci_dev *pdev)
> >>           if ( i && bars[i - 1].type == VPCI_BAR_MEM64_LO )
> >>           {
> >>               bars[i].type = VPCI_BAR_MEM64_HI;
> >> -            rc = vpci_add_register(pdev->vpci, vpci_hw_read32, bar_write, reg,
> >> -                                   4, &bars[i]);
> >> +            rc = vpci_add_register(pdev->vpci,
> >> +                                   is_hwdom ? vpci_hw_read32 : guest_bar_read,
> >> +                                   is_hwdom ? bar_write : guest_bar_write,
> >> +                                   reg, 4, &bars[i]);
> >>               if ( rc )
> >>               {
> >>                   pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd);
> >> @@ -569,8 +625,10 @@ static int init_bars(struct pci_dev *pdev)
> >>           bars[i].size = size;
> >>           bars[i].prefetchable = val & PCI_BASE_ADDRESS_MEM_PREFETCH;
> >>   
> >> -        rc = vpci_add_register(pdev->vpci, vpci_hw_read32, bar_write, reg, 4,
> >> -                               &bars[i]);
> >> +        rc = vpci_add_register(pdev->vpci,
> >> +                               is_hwdom ? vpci_hw_read32 : guest_bar_read,
> >> +                               is_hwdom ? bar_write : guest_bar_write,
> >> +                               reg, 4, &bars[i]);
> >>           if ( rc )
> >>           {
> >>               pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd);
> >> @@ -590,8 +648,10 @@ static int init_bars(struct pci_dev *pdev)
> >>           header->rom_enabled = pci_conf_read32(pdev->sbdf, rom_reg) &
> >>                                 PCI_ROM_ADDRESS_ENABLE;
> >>   
> >> -        rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rom_write, rom_reg,
> >> -                               4, rom);
> >> +        rc = vpci_add_register(pdev->vpci,
> >> +                               is_hwdom ? vpci_hw_read32 : guest_rom_read,
> >> +                               is_hwdom ? rom_write : guest_rom_write,
> >> +                               rom_reg, 4, rom);
> > This whole call should be made conditional to is_hwdom, as said above
> > there's no need for the guest_rom handlers.
> Yes, if writes are indeed dropped, please see question above
> >
> > Likewise I assume you expect IO BARs to simply return ~0 and drop
> > writes, as there's no explicit handler added for those?
> Yes, but that was not my intention: I simply didn't handle IO BARs
> and now we do need that handling: either with the default behavior
> for the unhandled read/write (drop writes, read ~0) or by introducing
> the handlers. I hope we can rely on the "unhandled read/write" and
> get what we want

Indeed, the default behavior should be changed for domUs to drop
writes, return ~0 for unhandled reads, then you won't need to add
dummy handlers for the registers you don't want to expose.

> >
> >>           if ( rc )
> >>               rom->type = VPCI_BAR_EMPTY;
> >>       }
> >> diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
> >> index ed127a08a953..0a73b14a92dc 100644
> >> --- a/xen/include/xen/vpci.h
> >> +++ b/xen/include/xen/vpci.h
> >> @@ -68,7 +68,10 @@ struct vpci {
> >>       struct vpci_header {
> >>           /* Information about the PCI BARs of this device. */
> >>           struct vpci_bar {
> >> +            /* Physical view of the BAR. */
> > No, that's not the physical view, it's the physical (host) address.
> Ok
> >
> >>               uint64_t addr;
> >> +            /* Guest view of the BAR: address and lower bits. */
> >> +            uint64_t guest_reg;
> > I continue to think it would be clearer if you store the guest address
> > here (gaddr, without the low bits) and add those in guest_bar_read
> > based on bar->{type,prefetchable}. Then it would be equivalent to the
> > existing 'addr' field.
> Ok, I'll re-work the code with this approach in mind: s/guest_reg/gaddr +
> required code to handle that
> >
> > I wonder whether we need to protect the added code with
> > CONFIG_HAS_VPCI_GUEST_SUPPORT, this would effectively be dead code
> > otherwise. Long term I don't think we wish to differentiate between
> > dom0 and domU vPCI support at build time, so I'm unsure whether it's
> > helpful to pollute the code with CONFIG_HAS_VPCI_GUEST_SUPPORT when
> > the plan is to remove those long term.
> I would have it without CONFIG_HAS_VPCI_GUEST_SUPPORT if you
> don't mind

Well, I guess if it's not too intrusive it's fine to add the defines,
removing them afterwards should be easy.

Thanks, Roger.


  parent reply	other threads:[~2022-01-31 11:05 UTC|newest]

Thread overview: 130+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-25 11:02 [PATCH v5 00/14] PCI devices passthrough on Arm, part 3 Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 01/14] rangeset: add RANGESETF_no_print flag Oleksandr Andrushchenko
2021-11-25 11:06   ` Jan Beulich
2021-11-25 11:08     ` Oleksandr Andrushchenko
2021-12-15  3:20   ` Volodymyr Babchuk
2021-12-15  5:53     ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 02/14] vpci: fix function attributes for vpci_process_pending Oleksandr Andrushchenko
2021-12-10 17:55   ` Julien Grall
2021-12-11  8:20     ` Roger Pau Monné
2021-12-11  8:57       ` Oleksandr Andrushchenko
2022-01-26  8:31         ` Oleksandr Andrushchenko
2022-01-26 10:54           ` Jan Beulich
2021-11-25 11:02 ` [PATCH v5 03/14] vpci: move lock outside of struct vpci Oleksandr Andrushchenko
2022-01-11 15:17   ` Roger Pau Monné
2022-01-12 14:42     ` Jan Beulich
2022-01-26  8:40       ` Oleksandr Andrushchenko
2022-01-26 11:13         ` Roger Pau Monné
2022-01-31  7:41           ` Oleksandr Andrushchenko
2022-01-12 14:57   ` Jan Beulich
2022-01-12 15:42     ` Roger Pau Monné
2022-01-12 15:52       ` Jan Beulich
2022-01-13  8:58         ` Roger Pau Monné
2022-01-28 14:15           ` Oleksandr Andrushchenko
2022-01-31  8:56             ` Roger Pau Monné
2022-01-31  9:00               ` Oleksandr Andrushchenko
2022-01-28 14:12     ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 04/14] vpci: cancel pending map/unmap on vpci removal Oleksandr Andrushchenko
2022-01-11 16:57   ` Roger Pau Monné
2022-01-12 15:27   ` Jan Beulich
2022-01-28 12:21     ` Oleksandr Andrushchenko
2022-01-31  7:53   ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 05/14] vpci: add hooks for PCI device assign/de-assign Oleksandr Andrushchenko
2022-01-12 12:12   ` Roger Pau Monné
2022-01-31  8:43     ` Oleksandr Andrushchenko
2022-01-13 11:40   ` Roger Pau Monné
2022-01-31  8:45     ` Oleksandr Andrushchenko
2022-02-01  8:56       ` Oleksandr Andrushchenko
2022-02-01 10:23         ` Roger Pau Monné
2021-11-25 11:02 ` [PATCH v5 06/14] vpci/header: implement guest BAR register handlers Oleksandr Andrushchenko
2021-11-25 16:28   ` Bertrand Marquis
2021-11-26 12:19     ` Oleksandr Andrushchenko
2022-02-03 12:36       ` Oleksandr Andrushchenko
2022-02-03 12:44         ` Jan Beulich
2022-02-03 12:48           ` Oleksandr Andrushchenko
2022-02-03 12:50             ` Jan Beulich
2022-02-03 12:53               ` Oleksandr Andrushchenko
2022-01-12 12:35   ` Roger Pau Monné
2022-01-31  9:47     ` Oleksandr Andrushchenko
2022-01-31 10:40       ` Oleksandr Andrushchenko
2022-01-31 10:54         ` Jan Beulich
2022-01-31 11:04           ` Oleksandr Andrushchenko
2022-01-31 11:27             ` Roger Pau Monné
2022-01-31 11:30               ` Oleksandr Andrushchenko
2022-01-31 11:10         ` Roger Pau Monné
2022-01-31 11:23           ` Oleksandr Andrushchenko
2022-01-31 11:31             ` Roger Pau Monné
2022-01-31 11:39             ` Jan Beulich
2022-01-31 13:30               ` Oleksandr Andrushchenko
2022-01-31 13:36                 ` Jan Beulich
2022-01-31 13:41                   ` Oleksandr Andrushchenko
2022-01-31 13:51                     ` Jan Beulich
2022-01-31 13:58                       ` Oleksandr Andrushchenko
2022-01-31 11:04       ` Roger Pau Monné [this message]
2022-01-31 14:51         ` Oleksandr Andrushchenko
2022-01-31 15:06     ` Oleksandr Andrushchenko
2022-01-31 15:50       ` Jan Beulich
2022-02-01  7:31         ` Oleksandr Andrushchenko
2022-02-01 10:10           ` Roger Pau Monné
2022-02-01 10:41             ` Oleksandr Andrushchenko
2022-01-12 17:34   ` Roger Pau Monné
2022-01-31  9:53     ` Oleksandr Andrushchenko
2022-01-31 10:56       ` Roger Pau Monné
2022-02-03 12:45       ` Oleksandr Andrushchenko
2022-02-03 12:54         ` Jan Beulich
2022-02-03 13:30           ` Oleksandr Andrushchenko
2022-02-03 14:04             ` Jan Beulich
2022-02-03 14:19               ` Oleksandr Andrushchenko
2022-02-03 14:05             ` Roger Pau Monné
2022-02-03 14:26               ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 07/14] vpci/header: handle p2m range sets per BAR Oleksandr Andrushchenko
2022-01-12 15:15   ` Roger Pau Monné
2022-01-12 15:18     ` Jan Beulich
2022-02-02  6:44     ` Oleksandr Andrushchenko
2022-02-02  9:56       ` Roger Pau Monné
2022-02-02 10:02         ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 08/14] vpci/header: program p2m with guest BAR view Oleksandr Andrushchenko
2022-01-13 10:22   ` Roger Pau Monné
2022-02-02  8:23     ` Oleksandr Andrushchenko
2022-02-02  9:46       ` Oleksandr Andrushchenko
2022-02-02 10:34         ` Roger Pau Monné
2022-02-02 10:44           ` Oleksandr Andrushchenko
2022-02-02 11:11             ` Jan Beulich
2022-02-02 11:14               ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 09/14] vpci/header: emulate PCI_COMMAND register for guests Oleksandr Andrushchenko
2022-01-13 10:50   ` Roger Pau Monné
2022-02-02 12:49     ` Oleksandr Andrushchenko
2022-02-02 13:32       ` Jan Beulich
2022-02-02 13:47         ` Oleksandr Andrushchenko
2022-02-02 14:18           ` Jan Beulich
2022-02-02 14:26             ` Oleksandr Andrushchenko
2022-02-02 14:31               ` Jan Beulich
2022-02-02 15:04                 ` Oleksandr Andrushchenko
2022-02-02 15:08                   ` Jan Beulich
2022-02-02 15:12                     ` Oleksandr Andrushchenko
2022-02-02 15:31                       ` Jan Beulich
2021-11-25 11:02 ` [PATCH v5 10/14] vpci/header: reset the command register when adding devices Oleksandr Andrushchenko
2022-01-13 11:07   ` Roger Pau Monné
2022-02-02 12:58     ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 11/14] vpci: add initial support for virtual PCI bus topology Oleksandr Andrushchenko
2022-01-12 15:39   ` Jan Beulich
2022-02-02 13:15     ` Oleksandr Andrushchenko
2022-01-13 11:35   ` Roger Pau Monné
2022-02-02 13:17     ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 12/14] xen/arm: translate virtual PCI bus topology for guests Oleksandr Andrushchenko
2022-01-13 12:18   ` Roger Pau Monné
2022-02-02 13:58     ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 13/14] xen/arm: account IO handlers for emulated PCI MSI-X Oleksandr Andrushchenko
2022-01-13 13:23   ` Roger Pau Monné
2022-02-02 14:08     ` Oleksandr Andrushchenko
2021-11-25 11:02 ` [PATCH v5 14/14] vpci: add TODO for the registers not explicitly handled Oleksandr Andrushchenko
2021-11-25 11:17   ` Jan Beulich
2021-11-25 11:20     ` Oleksandr Andrushchenko
2022-01-13 13:27     ` Roger Pau Monné
2022-01-13 13:38       ` Jan Beulich
2022-01-28 13:03         ` Oleksandr Andrushchenko
2021-12-15 11:56 ` [PATCH v5 00/14] PCI devices passthrough on Arm, part 3 Oleksandr Andrushchenko
2021-12-15 12:07   ` Jan Beulich
2021-12-15 12:22     ` Oleksandr Andrushchenko
2021-12-15 14:51       ` Roger Pau Monné
2021-12-15 15:02         ` Oleksandr Andrushchenko

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