From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Akhil P Oommen <quic_akhilpo@quicinc.com>
Cc: freedreno <freedreno@lists.freedesktop.org>,
dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
Rob Clark <robdclark@gmail.com>,
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
<devicetree@vger.kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Andy Gross <agross@kernel.org>, Rob Herring <robh+dt@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/4] arm64: dts: qcom: sc7280: Support gpu speedbin
Date: Mon, 31 Jan 2022 16:57:32 -0600 [thread overview]
Message-ID: <YfhpXFNcl4L+1rah@builder.lan> (raw)
In-Reply-To: <20220119205012.v2.2.I4c2cb95f06f0c37038c80cc1ad20563fdf0618e2@changeid>
On Wed 19 Jan 09:21 CST 2022, Akhil P Oommen wrote:
> Add the speedbin fuse and the required opps to support gpu sku.
>
> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
> ---
>
> (no changes since v1)
>
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 46 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 365a2e0..f8fc8b8 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -605,6 +605,11 @@
> power-domains = <&rpmhpd SC7280_MX>;
> #address-cells = <1>;
> #size-cells = <1>;
> +
> + gpu_speed_bin: gpu_speed_bin@1e9 {
No underscores in node names please.
Regards,
Bjorn
> + reg = <0x1e9 0x2>;
> + bits = <5 8>;
> + };
> };
>
> sdhc_1: sdhci@7c4000 {
> @@ -1762,6 +1767,9 @@
> interconnect-names = "gfx-mem";
> #cooling-cells = <2>;
>
> + nvmem-cells = <&gpu_speed_bin>;
> + nvmem-cell-names = "speed_bin";
> +
> gpu_opp_table: opp-table {
> compatible = "operating-points-v2";
>
> @@ -1769,18 +1777,56 @@
> opp-hz = /bits/ 64 <315000000>;
> opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
> opp-peak-kBps = <1804000>;
> + opp-supported-hw = <0x03>;
> };
>
> opp-450000000 {
> opp-hz = /bits/ 64 <450000000>;
> opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
> opp-peak-kBps = <4068000>;
> + opp-supported-hw = <0x03>;
> };
>
> opp-550000000 {
> opp-hz = /bits/ 64 <550000000>;
> opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
> opp-peak-kBps = <6832000>;
> + opp-supported-hw = <0x03>;
> + };
> +
> + opp-608000000 {
> + opp-hz = /bits/ 64 <608000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
> + opp-peak-kBps = <8368000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-700000000 {
> + opp-hz = /bits/ 64 <700000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-812000000 {
> + opp-hz = /bits/ 64 <812000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-840000000 {
> + opp-hz = /bits/ 64 <840000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-900000000 {
> + opp-hz = /bits/ 64 <900000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> };
> };
> };
> --
> 2.7.4
>
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Akhil P Oommen <quic_akhilpo@quicinc.com>
Cc: OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
<devicetree@vger.kernel.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, Rob Herring <robh+dt@kernel.org>,
Andy Gross <agross@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
freedreno <freedreno@lists.freedesktop.org>
Subject: Re: [PATCH v2 2/4] arm64: dts: qcom: sc7280: Support gpu speedbin
Date: Mon, 31 Jan 2022 16:57:32 -0600 [thread overview]
Message-ID: <YfhpXFNcl4L+1rah@builder.lan> (raw)
In-Reply-To: <20220119205012.v2.2.I4c2cb95f06f0c37038c80cc1ad20563fdf0618e2@changeid>
On Wed 19 Jan 09:21 CST 2022, Akhil P Oommen wrote:
> Add the speedbin fuse and the required opps to support gpu sku.
>
> Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
> ---
>
> (no changes since v1)
>
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 46 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 365a2e0..f8fc8b8 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -605,6 +605,11 @@
> power-domains = <&rpmhpd SC7280_MX>;
> #address-cells = <1>;
> #size-cells = <1>;
> +
> + gpu_speed_bin: gpu_speed_bin@1e9 {
No underscores in node names please.
Regards,
Bjorn
> + reg = <0x1e9 0x2>;
> + bits = <5 8>;
> + };
> };
>
> sdhc_1: sdhci@7c4000 {
> @@ -1762,6 +1767,9 @@
> interconnect-names = "gfx-mem";
> #cooling-cells = <2>;
>
> + nvmem-cells = <&gpu_speed_bin>;
> + nvmem-cell-names = "speed_bin";
> +
> gpu_opp_table: opp-table {
> compatible = "operating-points-v2";
>
> @@ -1769,18 +1777,56 @@
> opp-hz = /bits/ 64 <315000000>;
> opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
> opp-peak-kBps = <1804000>;
> + opp-supported-hw = <0x03>;
> };
>
> opp-450000000 {
> opp-hz = /bits/ 64 <450000000>;
> opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
> opp-peak-kBps = <4068000>;
> + opp-supported-hw = <0x03>;
> };
>
> opp-550000000 {
> opp-hz = /bits/ 64 <550000000>;
> opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
> opp-peak-kBps = <6832000>;
> + opp-supported-hw = <0x03>;
> + };
> +
> + opp-608000000 {
> + opp-hz = /bits/ 64 <608000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
> + opp-peak-kBps = <8368000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-700000000 {
> + opp-hz = /bits/ 64 <700000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-812000000 {
> + opp-hz = /bits/ 64 <812000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-840000000 {
> + opp-hz = /bits/ 64 <840000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> + };
> +
> + opp-900000000 {
> + opp-hz = /bits/ 64 <900000000>;
> + opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
> + opp-peak-kBps = <8532000>;
> + opp-supported-hw = <0x02>;
> };
> };
> };
> --
> 2.7.4
>
next prev parent reply other threads:[~2022-01-31 22:57 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-19 15:21 [PATCH v2 1/4] drm/msm/adreno: Add support for Adreno 8c Gen 3 Akhil P Oommen
2022-01-19 15:21 ` Akhil P Oommen
2022-01-19 15:21 ` [PATCH v2 2/4] arm64: dts: qcom: sc7280: Support gpu speedbin Akhil P Oommen
2022-01-19 15:21 ` Akhil P Oommen
2022-01-31 22:57 ` Bjorn Andersson [this message]
2022-01-31 22:57 ` Bjorn Andersson
2022-01-19 15:21 ` [PATCH v2 3/4] drm/msm/adreno: Expose speedbin to userspace Akhil P Oommen
2022-01-19 15:21 ` Akhil P Oommen
2022-01-19 15:21 ` [PATCH v2 4/4] drm/msm/adreno: Update the name of 7c3 gpu Akhil P Oommen
2022-01-19 15:21 ` Akhil P Oommen
2022-01-31 23:01 ` Bjorn Andersson
2022-01-31 23:01 ` Bjorn Andersson
2022-01-31 22:57 ` [PATCH v2 1/4] drm/msm/adreno: Add support for Adreno 8c Gen 3 Bjorn Andersson
2022-01-31 22:57 ` Bjorn Andersson
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