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From: Rob Herring <robh@kernel.org>
To: Chester Lin <clin@suse.com>
Cc: "Andreas Färber" <afaerber@suse.de>,
	"Matthias Brugger" <mbrugger@suse.com>,
	s32@nxp.com, "Ghennadi Procopciuc" <Ghennadi.Procopciuc@nxp.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	"Radu Nicolae Pirea" <radu-nicolae.pirea@oss.nxp.com>,
	"Ivan T . Ivanov" <iivanov@suse.de>,
	"Lee, Chun-Yi" <jlee@suse.com>
Subject: Re: [RFC PATCH 1/3] dt-bindings: clock: Add s32g2 clock binding
Date: Fri, 11 Feb 2022 10:25:31 -0600	[thread overview]
Message-ID: <YgaN+0KJTi0be++F@robh.at.kernel.org> (raw)
In-Reply-To: <20220207132444.3653-2-clin@suse.com>

On Mon, Feb 07, 2022 at 09:24:42PM +0800, Chester Lin wrote:
> Add clock binding for S32G based on SCMI Clock Management Protocol (0x14)
> 
> Signed-off-by: Chester Lin <clin@suse.com>
> ---
>  include/dt-bindings/clock/s32g2-clock.h | 28 +++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>  create mode 100644 include/dt-bindings/clock/s32g2-clock.h
> 
> diff --git a/include/dt-bindings/clock/s32g2-clock.h b/include/dt-bindings/clock/s32g2-clock.h
> new file mode 100644
> index 000000000000..6d8606293865
> --- /dev/null
> +++ b/include/dt-bindings/clock/s32g2-clock.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: BSD-3-Clause */

Dual license please.

> +/*
> + * Copyright 2020-2022 NXP
> + */
> +#ifndef __DT_BINDINGS_SCMI_CLOCK_S32G2_H
> +#define __DT_BINDINGS_SCMI_CLOCK_S32G2_H
> +
> +#define S32G2_SCMI_CLK_BASE_ID		0U
> +#define S32G2_SCMI_CLK(N)		((N) + S32G2_SCMI_CLK_BASE_ID)
> +
> +/* GMAC0 - SGMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_SGMII	S32G2_SCMI_CLK(16)
> +#define S32G2_SCMI_CLK_GMAC0_TX_SGMII	S32G2_SCMI_CLK(17)
> +/* GMAC0 - RGMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_RGMII	S32G2_SCMI_CLK(19)
> +#define S32G2_SCMI_CLK_GMAC0_TX_RGMII	S32G2_SCMI_CLK(20)
> +/* GMAC0 - RMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_RMII	S32G2_SCMI_CLK(22)
> +#define S32G2_SCMI_CLK_GMAC0_TX_RMII	S32G2_SCMI_CLK(23)
> +/* GMAC0 - MII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_MII	S32G2_SCMI_CLK(25)
> +#define S32G2_SCMI_CLK_GMAC0_TX_MII	S32G2_SCMI_CLK(26)
> +#define S32G2_SCMI_CLK_GMAC0_AXI	S32G2_SCMI_CLK(28)
> +/* uSDHC */
> +#define S32G2_SCMI_CLK_USDHC_AHB	S32G2_SCMI_CLK(35)
> +#define S32G2_SCMI_CLK_USDHC_MODULE	S32G2_SCMI_CLK(36)
> +#define S32G2_SCMI_CLK_USDHC_CORE	S32G2_SCMI_CLK(37)
> +#endif
> -- 
> 2.33.1
> 
> 

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Chester Lin <clin@suse.com>
Cc: "Andreas Färber" <afaerber@suse.de>,
	"Matthias Brugger" <mbrugger@suse.com>,
	s32@nxp.com, "Ghennadi Procopciuc" <Ghennadi.Procopciuc@nxp.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	"Radu Nicolae Pirea" <radu-nicolae.pirea@oss.nxp.com>,
	"Ivan T . Ivanov" <iivanov@suse.de>,
	"Lee, Chun-Yi" <jlee@suse.com>
Subject: Re: [RFC PATCH 1/3] dt-bindings: clock: Add s32g2 clock binding
Date: Fri, 11 Feb 2022 10:25:31 -0600	[thread overview]
Message-ID: <YgaN+0KJTi0be++F@robh.at.kernel.org> (raw)
In-Reply-To: <20220207132444.3653-2-clin@suse.com>

On Mon, Feb 07, 2022 at 09:24:42PM +0800, Chester Lin wrote:
> Add clock binding for S32G based on SCMI Clock Management Protocol (0x14)
> 
> Signed-off-by: Chester Lin <clin@suse.com>
> ---
>  include/dt-bindings/clock/s32g2-clock.h | 28 +++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>  create mode 100644 include/dt-bindings/clock/s32g2-clock.h
> 
> diff --git a/include/dt-bindings/clock/s32g2-clock.h b/include/dt-bindings/clock/s32g2-clock.h
> new file mode 100644
> index 000000000000..6d8606293865
> --- /dev/null
> +++ b/include/dt-bindings/clock/s32g2-clock.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: BSD-3-Clause */

Dual license please.

> +/*
> + * Copyright 2020-2022 NXP
> + */
> +#ifndef __DT_BINDINGS_SCMI_CLOCK_S32G2_H
> +#define __DT_BINDINGS_SCMI_CLOCK_S32G2_H
> +
> +#define S32G2_SCMI_CLK_BASE_ID		0U
> +#define S32G2_SCMI_CLK(N)		((N) + S32G2_SCMI_CLK_BASE_ID)
> +
> +/* GMAC0 - SGMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_SGMII	S32G2_SCMI_CLK(16)
> +#define S32G2_SCMI_CLK_GMAC0_TX_SGMII	S32G2_SCMI_CLK(17)
> +/* GMAC0 - RGMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_RGMII	S32G2_SCMI_CLK(19)
> +#define S32G2_SCMI_CLK_GMAC0_TX_RGMII	S32G2_SCMI_CLK(20)
> +/* GMAC0 - RMII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_RMII	S32G2_SCMI_CLK(22)
> +#define S32G2_SCMI_CLK_GMAC0_TX_RMII	S32G2_SCMI_CLK(23)
> +/* GMAC0 - MII */
> +#define S32G2_SCMI_CLK_GMAC0_RX_MII	S32G2_SCMI_CLK(25)
> +#define S32G2_SCMI_CLK_GMAC0_TX_MII	S32G2_SCMI_CLK(26)
> +#define S32G2_SCMI_CLK_GMAC0_AXI	S32G2_SCMI_CLK(28)
> +/* uSDHC */
> +#define S32G2_SCMI_CLK_USDHC_AHB	S32G2_SCMI_CLK(35)
> +#define S32G2_SCMI_CLK_USDHC_MODULE	S32G2_SCMI_CLK(36)
> +#define S32G2_SCMI_CLK_USDHC_CORE	S32G2_SCMI_CLK(37)
> +#endif
> -- 
> 2.33.1
> 
> 

  reply	other threads:[~2022-02-11 16:26 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-07 13:24 [RFC PATCH 0/3] Add SCMI clk support for NXP S32G2 Chester Lin
2022-02-07 13:24 ` Chester Lin
2022-02-07 13:24 ` [RFC PATCH 1/3] dt-bindings: clock: Add s32g2 clock binding Chester Lin
2022-02-07 13:24   ` Chester Lin
2022-02-11 16:25   ` Rob Herring [this message]
2022-02-11 16:25     ` Rob Herring
2022-02-07 13:24 ` [RFC PATCH 2/3] arm64: dts: s32g2: add SCMI support Chester Lin
2022-02-07 13:24   ` Chester Lin
2022-02-07 13:24 ` [RFC PATCH 3/3] arm64: dts: s32g2: add USDHC support Chester Lin
2022-02-07 13:24   ` Chester Lin

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