Re: [PATCH V2 2/4] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality

[Corentin Labbe <clabbe.montjoie@gmail.com>]

Le Mon, Feb 21, 2022 at 12:17:02PM +0000, Harsha Harsha a écrit :
> 
> 
> > -----Original Message-----
> > From: Corentin Labbe <clabbe.montjoie@gmail.com>
> > Sent: Friday, February 18, 2022 3:13 PM
> > To: Harsha Harsha <harshah@xilinx.com>
> > Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> > kernel@lists.infradead.org; Michal Simek <michals@xilinx.com>; Sarat Chand Savitala <saratcha@xilinx.com>; Harsh Jain
> > <harshj@xilinx.com>; git <git@xilinx.com>
> > Subject: Re: [PATCH V2 2/4] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality
> > 
> > Le Fri, Feb 18, 2022 at 12:44:22AM +0530, Harsha a écrit :
> > > This patch adds zynqmp_pm_sha_hash API in the ZynqMP firmware to compute
> > > SHA3 hash of given data.
> > >
> > > Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> > > Acked-by: Michal Simek <michal.simek@xilinx.com>
> > > ---
> > 
> > Hello
> > 
> > Your signed-off should contain your real name.
> 
> My complete name is Harsha which I have mentioned in the signed-off section.

I am sorry, I believed it was your pseudo. If it is your real name, no change are needed.

> 
> > Furthermore why did you drop copyright from previous poster ?
> > See https://patchwork.kernel.org/project/linux-crypto/cover/1556793282-17346-1-git-send-email-kalyani.akula@xilinx.com/ for
> > reference.
> 
> I did not understand the comment. Do you want me to add Kalyani's name also in the Signed of section?
> 
> > 
> > Furthermore, the previous poster didnt answered my questions about parallel processing and tests.
> 
> Since SHA3 HW engine in ZynqMPSoC does not support parallel processing of 2 hash requests, so we have changed our approach. 
> Now  to support parallel processing of 2 hash requests, software fallback is being used for init, update, final, export and import in the ZynqMP SHA driver.
> For digest, the calculation of SHA3 hash is done by the hardened SHA3 accelerator in Xilinx ZynqMP SoC.
> 

I asked for parallel processing since I didnt see any locking or way to prevent hardware to be used in the same time.
But the final work is done by a firmware call, so my knowledge stop here.

> Following tests have been done for the driver:
> - Enabled kernel self tests and extra run-time crypto self tests
> - Tested SHA hash computation for different sizes of data using userspace application
> - Tested SHA hash computation using multiple updates of data using userspace application
> - Tested parallel hash computation
> - Tested using the tcrypt module
> 

This should be in the cover letter.

Regards