* [PATCH 0/1] perf jitdump: Add riscv64 support
@ 2022-04-06 14:26 ` Eric Lin
0 siblings, 0 replies; 8+ messages in thread
From: Eric Lin @ 2022-04-06 14:26 UTC (permalink / raw)
To: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
namhyung, palmer, aou, iii, linux-perf-users, linux-kernel,
linux-riscv
Cc: paul.walmsley, greentime.hu, Eric Lin
This patch enable perf jitdump for riscv64 and it tested with v8 on qemu rv64.
Qemu rv64:
# perf record -e cpu-clock -c 1000 -g -k mono ./d8_rv64 --perf-prof --no-wr
ite-protect-code-memory test.js
# perf inject -j -i perf.data -o perf.data.jitted
# perf report -i perf.data.jitted
Output:
# To display the perf.data header info, please use --header/--header-only option
s.
#
#
# Total Lost Samples: 0
#
# Samples: 87K of event 'cpu-clock'
# Event count (approx.): 87974000
#
# Children Self Command Shared Object Symbol
....
0.28% 0.06% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal6WasmJs7InstallEPNS0_7IsolateEb
0.28% 0.00% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal10ParserBaseINS0_6ParserEE22ParseLogicalExpressionEv
0.28% 0.03% d8_rv64 jitted-112-76.so [.] Builtin:
InterpreterEntryTrampoline
0.12% 0.00% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal19ContextDeserializer11DeserializeEPNS0_7IsolateENS0_6HandleINS0_13JSGlob
alProxyEEENS_33DeserializeInternalFieldsCallbackE
0.12% 0.01% d8_rv64 jitted-112-651.so [.] Builtin:
CEntry_Return1_DontSaveFPRegs_ArgvOnStack_NoBuiltinExit
....
Eric Lin (1):
perf jitdump: Add riscv64 support.
tools/perf/arch/riscv/Makefile | 1 +
tools/perf/util/genelf.h | 3 +++
2 files changed, 4 insertions(+)
--
2.35.1
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 0/1] perf jitdump: Add riscv64 support
@ 2022-04-06 14:26 ` Eric Lin
0 siblings, 0 replies; 8+ messages in thread
From: Eric Lin @ 2022-04-06 14:26 UTC (permalink / raw)
To: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
namhyung, palmer, aou, iii, linux-perf-users, linux-kernel,
linux-riscv
Cc: paul.walmsley, greentime.hu, Eric Lin
This patch enable perf jitdump for riscv64 and it tested with v8 on qemu rv64.
Qemu rv64:
# perf record -e cpu-clock -c 1000 -g -k mono ./d8_rv64 --perf-prof --no-wr
ite-protect-code-memory test.js
# perf inject -j -i perf.data -o perf.data.jitted
# perf report -i perf.data.jitted
Output:
# To display the perf.data header info, please use --header/--header-only option
s.
#
#
# Total Lost Samples: 0
#
# Samples: 87K of event 'cpu-clock'
# Event count (approx.): 87974000
#
# Children Self Command Shared Object Symbol
....
0.28% 0.06% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal6WasmJs7InstallEPNS0_7IsolateEb
0.28% 0.00% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal10ParserBaseINS0_6ParserEE22ParseLogicalExpressionEv
0.28% 0.03% d8_rv64 jitted-112-76.so [.] Builtin:
InterpreterEntryTrampoline
0.12% 0.00% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal19ContextDeserializer11DeserializeEPNS0_7IsolateENS0_6HandleINS0_13JSGlob
alProxyEEENS_33DeserializeInternalFieldsCallbackE
0.12% 0.01% d8_rv64 jitted-112-651.so [.] Builtin:
CEntry_Return1_DontSaveFPRegs_ArgvOnStack_NoBuiltinExit
....
Eric Lin (1):
perf jitdump: Add riscv64 support.
tools/perf/arch/riscv/Makefile | 1 +
tools/perf/util/genelf.h | 3 +++
2 files changed, 4 insertions(+)
--
2.35.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/1] perf jitdump: Add riscv64 support.
2022-04-06 14:26 ` Eric Lin
@ 2022-04-06 14:26 ` Eric Lin
-1 siblings, 0 replies; 8+ messages in thread
From: Eric Lin @ 2022-04-06 14:26 UTC (permalink / raw)
To: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
namhyung, palmer, aou, iii, linux-perf-users, linux-kernel,
linux-riscv
Cc: paul.walmsley, greentime.hu, Eric Lin
Signed-off-by: Eric Lin <eric.lin@sifive.com>
---
tools/perf/arch/riscv/Makefile | 1 +
tools/perf/util/genelf.h | 3 +++
2 files changed, 4 insertions(+)
diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
index 1aa9dd772489..a8d25d005207 100644
--- a/tools/perf/arch/riscv/Makefile
+++ b/tools/perf/arch/riscv/Makefile
@@ -2,3 +2,4 @@ ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
endif
PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
+PERF_HAVE_JITDUMP := 1
diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
index 3db3293213a9..ae138afe6c56 100644
--- a/tools/perf/util/genelf.h
+++ b/tools/perf/util/genelf.h
@@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
#elif defined(__s390x__)
#define GEN_ELF_ARCH EM_S390
#define GEN_ELF_CLASS ELFCLASS64
+#elif defined(__riscv) && __riscv_xlen == 64
+#define GEN_ELF_ARCH EM_RISCV
+#define GEN_ELF_CLASS ELFCLASS64
#else
#error "unsupported architecture"
#endif
--
2.35.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/1] perf jitdump: Add riscv64 support.
@ 2022-04-06 14:26 ` Eric Lin
0 siblings, 0 replies; 8+ messages in thread
From: Eric Lin @ 2022-04-06 14:26 UTC (permalink / raw)
To: peterz, mingo, acme, mark.rutland, alexander.shishkin, jolsa,
namhyung, palmer, aou, iii, linux-perf-users, linux-kernel,
linux-riscv
Cc: paul.walmsley, greentime.hu, Eric Lin
Signed-off-by: Eric Lin <eric.lin@sifive.com>
---
tools/perf/arch/riscv/Makefile | 1 +
tools/perf/util/genelf.h | 3 +++
2 files changed, 4 insertions(+)
diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
index 1aa9dd772489..a8d25d005207 100644
--- a/tools/perf/arch/riscv/Makefile
+++ b/tools/perf/arch/riscv/Makefile
@@ -2,3 +2,4 @@ ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
endif
PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
+PERF_HAVE_JITDUMP := 1
diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
index 3db3293213a9..ae138afe6c56 100644
--- a/tools/perf/util/genelf.h
+++ b/tools/perf/util/genelf.h
@@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
#elif defined(__s390x__)
#define GEN_ELF_ARCH EM_S390
#define GEN_ELF_CLASS ELFCLASS64
+#elif defined(__riscv) && __riscv_xlen == 64
+#define GEN_ELF_ARCH EM_RISCV
+#define GEN_ELF_CLASS ELFCLASS64
#else
#error "unsupported architecture"
#endif
--
2.35.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/1] perf jitdump: Add riscv64 support.
2022-04-06 14:26 ` Eric Lin
@ 2022-04-09 15:05 ` Arnaldo Carvalho de Melo
-1 siblings, 0 replies; 8+ messages in thread
From: Arnaldo Carvalho de Melo @ 2022-04-09 15:05 UTC (permalink / raw)
To: Eric Lin
Cc: peterz, mingo, mark.rutland, alexander.shishkin, jolsa, namhyung,
palmer, aou, iii, linux-perf-users, linux-kernel, linux-riscv,
paul.walmsley, greentime.hu
Em Wed, Apr 06, 2022 at 10:26:06PM +0800, Eric Lin escreveu:
> Signed-off-by: Eric Lin <eric.lin@sifive.com>
Can you plese provide some series of commands demonstrating the usage of
this functionality on riscv?
A dump, for instance.
- Arnaldo
> ---
> tools/perf/arch/riscv/Makefile | 1 +
> tools/perf/util/genelf.h | 3 +++
> 2 files changed, 4 insertions(+)
>
> diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> index 1aa9dd772489..a8d25d005207 100644
> --- a/tools/perf/arch/riscv/Makefile
> +++ b/tools/perf/arch/riscv/Makefile
> @@ -2,3 +2,4 @@ ifndef NO_DWARF
> PERF_HAVE_DWARF_REGS := 1
> endif
> PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> +PERF_HAVE_JITDUMP := 1
> diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
> index 3db3293213a9..ae138afe6c56 100644
> --- a/tools/perf/util/genelf.h
> +++ b/tools/perf/util/genelf.h
> @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
> #elif defined(__s390x__)
> #define GEN_ELF_ARCH EM_S390
> #define GEN_ELF_CLASS ELFCLASS64
> +#elif defined(__riscv) && __riscv_xlen == 64
> +#define GEN_ELF_ARCH EM_RISCV
> +#define GEN_ELF_CLASS ELFCLASS64
> #else
> #error "unsupported architecture"
> #endif
> --
> 2.35.1
--
- Arnaldo
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/1] perf jitdump: Add riscv64 support.
@ 2022-04-09 15:05 ` Arnaldo Carvalho de Melo
0 siblings, 0 replies; 8+ messages in thread
From: Arnaldo Carvalho de Melo @ 2022-04-09 15:05 UTC (permalink / raw)
To: Eric Lin
Cc: peterz, mingo, mark.rutland, alexander.shishkin, jolsa, namhyung,
palmer, aou, iii, linux-perf-users, linux-kernel, linux-riscv,
paul.walmsley, greentime.hu
Em Wed, Apr 06, 2022 at 10:26:06PM +0800, Eric Lin escreveu:
> Signed-off-by: Eric Lin <eric.lin@sifive.com>
Can you plese provide some series of commands demonstrating the usage of
this functionality on riscv?
A dump, for instance.
- Arnaldo
> ---
> tools/perf/arch/riscv/Makefile | 1 +
> tools/perf/util/genelf.h | 3 +++
> 2 files changed, 4 insertions(+)
>
> diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> index 1aa9dd772489..a8d25d005207 100644
> --- a/tools/perf/arch/riscv/Makefile
> +++ b/tools/perf/arch/riscv/Makefile
> @@ -2,3 +2,4 @@ ifndef NO_DWARF
> PERF_HAVE_DWARF_REGS := 1
> endif
> PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> +PERF_HAVE_JITDUMP := 1
> diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
> index 3db3293213a9..ae138afe6c56 100644
> --- a/tools/perf/util/genelf.h
> +++ b/tools/perf/util/genelf.h
> @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
> #elif defined(__s390x__)
> #define GEN_ELF_ARCH EM_S390
> #define GEN_ELF_CLASS ELFCLASS64
> +#elif defined(__riscv) && __riscv_xlen == 64
> +#define GEN_ELF_ARCH EM_RISCV
> +#define GEN_ELF_CLASS ELFCLASS64
> #else
> #error "unsupported architecture"
> #endif
> --
> 2.35.1
--
- Arnaldo
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/1] perf jitdump: Add riscv64 support.
2022-04-09 15:05 ` Arnaldo Carvalho de Melo
@ 2022-04-10 15:15 ` Eric Lin
-1 siblings, 0 replies; 8+ messages in thread
From: Eric Lin @ 2022-04-10 15:15 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo
Cc: Peter Zijlstra, Ingo Molnar, Mark Rutland, Alexander Shishkin,
jolsa, Namhyung Kim, Palmer Dabbelt, aou, iii, linux-perf-users,
linux-kernel, linux-riscv, Paul Walmsley, Greentime Hu
Hi Arnaldo,
On Sat, Apr 9, 2022 at 11:05 PM Arnaldo Carvalho de Melo
<acme@kernel.org> wrote:
>
> Em Wed, Apr 06, 2022 at 10:26:06PM +0800, Eric Lin escreveu:
> > Signed-off-by: Eric Lin <eric.lin@sifive.com>
>
> Can you plese provide some series of commands demonstrating the usage of
> this functionality on riscv?
>
> A dump, for instance.
>
> - Arnaldo
>
OK, I got it. I'll show the series of commands in the commit message
in v2 patch.
Thanks.
> > ---
> > tools/perf/arch/riscv/Makefile | 1 +
> > tools/perf/util/genelf.h | 3 +++
> > 2 files changed, 4 insertions(+)
> >
> > diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> > index 1aa9dd772489..a8d25d005207 100644
> > --- a/tools/perf/arch/riscv/Makefile
> > +++ b/tools/perf/arch/riscv/Makefile
> > @@ -2,3 +2,4 @@ ifndef NO_DWARF
> > PERF_HAVE_DWARF_REGS := 1
> > endif
> > PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> > +PERF_HAVE_JITDUMP := 1
> > diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
> > index 3db3293213a9..ae138afe6c56 100644
> > --- a/tools/perf/util/genelf.h
> > +++ b/tools/perf/util/genelf.h
> > @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
> > #elif defined(__s390x__)
> > #define GEN_ELF_ARCH EM_S390
> > #define GEN_ELF_CLASS ELFCLASS64
> > +#elif defined(__riscv) && __riscv_xlen == 64
> > +#define GEN_ELF_ARCH EM_RISCV
> > +#define GEN_ELF_CLASS ELFCLASS64
> > #else
> > #error "unsupported architecture"
> > #endif
> > --
> > 2.35.1
>
> --
>
> - Arnaldo
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/1] perf jitdump: Add riscv64 support.
@ 2022-04-10 15:15 ` Eric Lin
0 siblings, 0 replies; 8+ messages in thread
From: Eric Lin @ 2022-04-10 15:15 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo
Cc: Peter Zijlstra, Ingo Molnar, Mark Rutland, Alexander Shishkin,
jolsa, Namhyung Kim, Palmer Dabbelt, aou, iii, linux-perf-users,
linux-kernel, linux-riscv, Paul Walmsley, Greentime Hu
Hi Arnaldo,
On Sat, Apr 9, 2022 at 11:05 PM Arnaldo Carvalho de Melo
<acme@kernel.org> wrote:
>
> Em Wed, Apr 06, 2022 at 10:26:06PM +0800, Eric Lin escreveu:
> > Signed-off-by: Eric Lin <eric.lin@sifive.com>
>
> Can you plese provide some series of commands demonstrating the usage of
> this functionality on riscv?
>
> A dump, for instance.
>
> - Arnaldo
>
OK, I got it. I'll show the series of commands in the commit message
in v2 patch.
Thanks.
> > ---
> > tools/perf/arch/riscv/Makefile | 1 +
> > tools/perf/util/genelf.h | 3 +++
> > 2 files changed, 4 insertions(+)
> >
> > diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> > index 1aa9dd772489..a8d25d005207 100644
> > --- a/tools/perf/arch/riscv/Makefile
> > +++ b/tools/perf/arch/riscv/Makefile
> > @@ -2,3 +2,4 @@ ifndef NO_DWARF
> > PERF_HAVE_DWARF_REGS := 1
> > endif
> > PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> > +PERF_HAVE_JITDUMP := 1
> > diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
> > index 3db3293213a9..ae138afe6c56 100644
> > --- a/tools/perf/util/genelf.h
> > +++ b/tools/perf/util/genelf.h
> > @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
> > #elif defined(__s390x__)
> > #define GEN_ELF_ARCH EM_S390
> > #define GEN_ELF_CLASS ELFCLASS64
> > +#elif defined(__riscv) && __riscv_xlen == 64
> > +#define GEN_ELF_ARCH EM_RISCV
> > +#define GEN_ELF_CLASS ELFCLASS64
> > #else
> > #error "unsupported architecture"
> > #endif
> > --
> > 2.35.1
>
> --
>
> - Arnaldo
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-04-10 15:15 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2022-04-06 14:26 [PATCH 0/1] perf jitdump: Add riscv64 support Eric Lin
2022-04-06 14:26 ` Eric Lin
2022-04-06 14:26 ` [PATCH 1/1] " Eric Lin
2022-04-06 14:26 ` Eric Lin
2022-04-09 15:05 ` Arnaldo Carvalho de Melo
2022-04-09 15:05 ` Arnaldo Carvalho de Melo
2022-04-10 15:15 ` Eric Lin
2022-04-10 15:15 ` Eric Lin
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