All of lore.kernel.org
 help / color / mirror / Atom feed
From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: Eric Lin <eric.lin@sifive.com>
Cc: peterz@infradead.org, mingo@redhat.com, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, jolsa@kernel.org,
	namhyung@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	iii@linux.ibm.com, linux-perf-users@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	paul.walmsley@sifive.com
Subject: Re: [PATCH v2 1/1] perf jitdump: Add riscv64 support.
Date: Mon, 11 Apr 2022 16:40:50 -0300	[thread overview]
Message-ID: <YlSEQrbnbwNt7hNv@kernel.org> (raw)
In-Reply-To: <20220411105438.21366-2-eric.lin@sifive.com>

Em Mon, Apr 11, 2022 at 06:54:38PM +0800, Eric Lin escreveu:
> This patch enable perf jitdump for riscv64 and it tested with V8 on qemu rv64.
> 
> Qemu rv64:
> $ perf record -e cpu-clock -c 1000 -g -k mono ./d8_rv64 --perf-prof --no-write-protect-code-memory test.js
> $ perf inject -j -i perf.data -o perf.data.jitted
> $ perf report -i perf.data.jitted

Thanks, applied.

- Arnaldo

 
> Output:
>  To display the perf.data header info, please use --header/--header-only options.
> 
>  Total Lost Samples: 0
> 
>  Samples: 87K of event 'cpu-clock'
>  Event count (approx.): 87974000
> 
>  Children      Self  Command          Shared Object                Symbol
> 
> ....
>      0.28%     0.06%  d8_rv64          d8_rv64                      [.] _ZN2v88i
> nternal6WasmJs7InstallEPNS0_7IsolateEb
>      0.28%     0.00%  d8_rv64          d8_rv64                      [.] _ZN2v88i
> nternal10ParserBaseINS0_6ParserEE22ParseLogicalExpressionEv
>      0.28%     0.03%  d8_rv64          jitted-112-76.so             [.] Builtin:
> InterpreterEntryTrampoline
>      0.12%     0.00%  d8_rv64          d8_rv64                      [.] _ZN2v88i
> nternal19ContextDeserializer11DeserializeEPNS0_7IsolateENS0_6HandleINS0_13JSGlob
> alProxyEEENS_33DeserializeInternalFieldsCallbackE
>      0.12%     0.01%  d8_rv64          jitted-112-651.so            [.] Builtin:
> CEntry_Return1_DontSaveFPRegs_ArgvOnStack_NoBuiltinExit
> ....
> 
> Signed-off-by: Eric Lin <eric.lin@sifive.com>
> ---
>  tools/perf/arch/riscv/Makefile | 1 +
>  tools/perf/util/genelf.h       | 3 +++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> index 1aa9dd772489..a8d25d005207 100644
> --- a/tools/perf/arch/riscv/Makefile
> +++ b/tools/perf/arch/riscv/Makefile
> @@ -2,3 +2,4 @@ ifndef NO_DWARF
>  PERF_HAVE_DWARF_REGS := 1
>  endif
>  PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> +PERF_HAVE_JITDUMP := 1
> diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
> index 3db3293213a9..ae138afe6c56 100644
> --- a/tools/perf/util/genelf.h
> +++ b/tools/perf/util/genelf.h
> @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
>  #elif defined(__s390x__)
>  #define GEN_ELF_ARCH	EM_S390
>  #define GEN_ELF_CLASS	ELFCLASS64
> +#elif defined(__riscv) && __riscv_xlen == 64
> +#define GEN_ELF_ARCH	EM_RISCV
> +#define GEN_ELF_CLASS	ELFCLASS64
>  #else
>  #error "unsupported architecture"
>  #endif
> -- 
> 2.35.1

-- 

- Arnaldo

WARNING: multiple messages have this Message-ID (diff)
From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: Eric Lin <eric.lin@sifive.com>
Cc: peterz@infradead.org, mingo@redhat.com, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, jolsa@kernel.org,
	namhyung@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	iii@linux.ibm.com, linux-perf-users@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	paul.walmsley@sifive.com
Subject: Re: [PATCH v2 1/1] perf jitdump: Add riscv64 support.
Date: Mon, 11 Apr 2022 16:40:50 -0300	[thread overview]
Message-ID: <YlSEQrbnbwNt7hNv@kernel.org> (raw)
In-Reply-To: <20220411105438.21366-2-eric.lin@sifive.com>

Em Mon, Apr 11, 2022 at 06:54:38PM +0800, Eric Lin escreveu:
> This patch enable perf jitdump for riscv64 and it tested with V8 on qemu rv64.
> 
> Qemu rv64:
> $ perf record -e cpu-clock -c 1000 -g -k mono ./d8_rv64 --perf-prof --no-write-protect-code-memory test.js
> $ perf inject -j -i perf.data -o perf.data.jitted
> $ perf report -i perf.data.jitted

Thanks, applied.

- Arnaldo

 
> Output:
>  To display the perf.data header info, please use --header/--header-only options.
> 
>  Total Lost Samples: 0
> 
>  Samples: 87K of event 'cpu-clock'
>  Event count (approx.): 87974000
> 
>  Children      Self  Command          Shared Object                Symbol
> 
> ....
>      0.28%     0.06%  d8_rv64          d8_rv64                      [.] _ZN2v88i
> nternal6WasmJs7InstallEPNS0_7IsolateEb
>      0.28%     0.00%  d8_rv64          d8_rv64                      [.] _ZN2v88i
> nternal10ParserBaseINS0_6ParserEE22ParseLogicalExpressionEv
>      0.28%     0.03%  d8_rv64          jitted-112-76.so             [.] Builtin:
> InterpreterEntryTrampoline
>      0.12%     0.00%  d8_rv64          d8_rv64                      [.] _ZN2v88i
> nternal19ContextDeserializer11DeserializeEPNS0_7IsolateENS0_6HandleINS0_13JSGlob
> alProxyEEENS_33DeserializeInternalFieldsCallbackE
>      0.12%     0.01%  d8_rv64          jitted-112-651.so            [.] Builtin:
> CEntry_Return1_DontSaveFPRegs_ArgvOnStack_NoBuiltinExit
> ....
> 
> Signed-off-by: Eric Lin <eric.lin@sifive.com>
> ---
>  tools/perf/arch/riscv/Makefile | 1 +
>  tools/perf/util/genelf.h       | 3 +++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
> index 1aa9dd772489..a8d25d005207 100644
> --- a/tools/perf/arch/riscv/Makefile
> +++ b/tools/perf/arch/riscv/Makefile
> @@ -2,3 +2,4 @@ ifndef NO_DWARF
>  PERF_HAVE_DWARF_REGS := 1
>  endif
>  PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
> +PERF_HAVE_JITDUMP := 1
> diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
> index 3db3293213a9..ae138afe6c56 100644
> --- a/tools/perf/util/genelf.h
> +++ b/tools/perf/util/genelf.h
> @@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
>  #elif defined(__s390x__)
>  #define GEN_ELF_ARCH	EM_S390
>  #define GEN_ELF_CLASS	ELFCLASS64
> +#elif defined(__riscv) && __riscv_xlen == 64
> +#define GEN_ELF_ARCH	EM_RISCV
> +#define GEN_ELF_CLASS	ELFCLASS64
>  #else
>  #error "unsupported architecture"
>  #endif
> -- 
> 2.35.1

-- 

- Arnaldo

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2022-04-11 19:40 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-11 10:54 [PATCH v2 0/1] perf jitdump: Add riscv64 support Eric Lin
2022-04-11 10:54 ` Eric Lin
2022-04-11 10:54 ` [PATCH v2 1/1] " Eric Lin
2022-04-11 10:54   ` Eric Lin
2022-04-11 19:40   ` Arnaldo Carvalho de Melo [this message]
2022-04-11 19:40     ` Arnaldo Carvalho de Melo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YlSEQrbnbwNt7hNv@kernel.org \
    --to=acme@kernel.org \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=eric.lin@sifive.com \
    --cc=iii@linux.ibm.com \
    --cc=jolsa@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=mark.rutland@arm.com \
    --cc=mingo@redhat.com \
    --cc=namhyung@kernel.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=peterz@infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.