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From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Peter Collingbourne <pcc@google.com>,
	Will Deacon <will@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: document the boot requirements for MTE
Date: Fri, 22 Apr 2022 14:42:06 +0100	[thread overview]
Message-ID: <YmKwrs3dJ09ybBJa@arm.com> (raw)
In-Reply-To: <Ykv39KMpKXb2Mr6p@sirena.org.uk>

On Tue, Apr 05, 2022 at 09:04:04AM +0100, Mark Brown wrote:
> On Mon, Apr 04, 2022 at 02:18:58PM -0700, Peter Collingbourne wrote:
> 
> > +  For CPUs with the Memory Tagging Extension feature:
> > +
> > +  - If EL3 is present:
> > +
> > +    - SCR_EL3.ATA (bit 26) must be initialised to 0b1.
> > +
> > +  - If the kernel is entered at EL1 and EL2 is present:
> > +
> > +    - HCR_EL2.ATA (bit 56) must be initialised to 0b1.
> 
> Very nitpicky but this is only required for FEAT_MTE2 and above, plain
> FEAT_MTE doesn't have these traps.  I don't know that this is a thing
> that anyone's actually implemented

I think that's a valid point. CPUs may implement FEAT_MTE2 but downgrade
it to FEAT_MTE if the SoC does not provide allocation tag storage. So we
should make it clear here that only from FEAT_MTE2 we should set those
bits (ID_AA64PFR1_EL1.MTE >= 2), otherwise they should be 0 or
hyp/firmware risks the OS triggering random external aborts.

> and from v8.7 on it's not permitted but the above isn't strictly true
> if someone did for some reason have the most basic version.

The wording is tricky: "This feature is mandatory from Armv8.7 when
FEAT_MTE2 is implemented". So one can still implement FEAT_MTE (or none
at all).

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Peter Collingbourne <pcc@google.com>,
	Will Deacon <will@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
	linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: document the boot requirements for MTE
Date: Fri, 22 Apr 2022 14:42:06 +0100	[thread overview]
Message-ID: <YmKwrs3dJ09ybBJa@arm.com> (raw)
In-Reply-To: <Ykv39KMpKXb2Mr6p@sirena.org.uk>

On Tue, Apr 05, 2022 at 09:04:04AM +0100, Mark Brown wrote:
> On Mon, Apr 04, 2022 at 02:18:58PM -0700, Peter Collingbourne wrote:
> 
> > +  For CPUs with the Memory Tagging Extension feature:
> > +
> > +  - If EL3 is present:
> > +
> > +    - SCR_EL3.ATA (bit 26) must be initialised to 0b1.
> > +
> > +  - If the kernel is entered at EL1 and EL2 is present:
> > +
> > +    - HCR_EL2.ATA (bit 56) must be initialised to 0b1.
> 
> Very nitpicky but this is only required for FEAT_MTE2 and above, plain
> FEAT_MTE doesn't have these traps.  I don't know that this is a thing
> that anyone's actually implemented

I think that's a valid point. CPUs may implement FEAT_MTE2 but downgrade
it to FEAT_MTE if the SoC does not provide allocation tag storage. So we
should make it clear here that only from FEAT_MTE2 we should set those
bits (ID_AA64PFR1_EL1.MTE >= 2), otherwise they should be 0 or
hyp/firmware risks the OS triggering random external aborts.

> and from v8.7 on it's not permitted but the above isn't strictly true
> if someone did for some reason have the most basic version.

The wording is tricky: "This feature is mandatory from Armv8.7 when
FEAT_MTE2 is implemented". So one can still implement FEAT_MTE (or none
at all).

-- 
Catalin

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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-04-22 13:42 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-04 21:18 [PATCH] arm64: document the boot requirements for MTE Peter Collingbourne
2022-04-04 21:18 ` Peter Collingbourne
2022-04-05  8:04 ` Mark Brown
2022-04-05  8:04   ` Mark Brown
2022-04-22 13:42   ` Catalin Marinas [this message]
2022-04-22 13:42     ` Catalin Marinas
2022-04-22 20:29     ` Peter Collingbourne
2022-04-22 20:29       ` Peter Collingbourne

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