From: Mark Rutland <mark.rutland@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx
Date: Fri, 20 May 2022 17:30:27 +0100 [thread overview]
Message-ID: <YofCI60CFWagd5iN@FVFF77S0Q05N> (raw)
In-Reply-To: <20220520161639.324236-4-broonie@kernel.org>
On Fri, May 20, 2022 at 05:16:35PM +0100, Mark Brown wrote:
> Convert the CPACR system register definitions to be automatically generated
> using the definitions in DDI0487H.a. The kernel does have some additional
> definitions for subfields of SMEN, FPEN and ZEN which are not identified as
> distinct subfields in the architecture so the definitions are not updated
> as part of this patch.
>
> No functional change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
I do think that in future we may want to define enumerated values for the
FPEN/ZEN/SMEN fields, but with that aside, all the values appear to be correct,
so for this as-as:
Reviewed-by: Mark Rutland Mark.rutland@arm.com>
Mark.
> ---
> arch/arm64/include/asm/sysreg.h | 2 --
> arch/arm64/tools/sysreg | 20 ++++++++++++++++++++
> 2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 4fd64e6ec407..7603c3344697 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -209,7 +209,6 @@
> #define SYS_ID_AA64MMFR2_EL1 sys_reg(3, 0, 0, 7, 2)
>
> #define SYS_ACTLR_EL1 sys_reg(3, 0, 1, 0, 1)
> -#define SYS_CPACR_EL1 sys_reg(3, 0, 1, 0, 2)
> #define SYS_RGSR_EL1 sys_reg(3, 0, 1, 0, 5)
> #define SYS_GCR_EL1 sys_reg(3, 0, 1, 0, 6)
>
> @@ -614,7 +613,6 @@
>
> /* VHE encodings for architectural EL0/1 system registers */
> #define SYS_SCTLR_EL12 sys_reg(3, 5, 1, 0, 0)
> -#define SYS_CPACR_EL12 sys_reg(3, 5, 1, 0, 2)
> #define SYS_TTBR0_EL12 sys_reg(3, 5, 2, 0, 0)
> #define SYS_TTBR1_EL12 sys_reg(3, 5, 2, 0, 1)
> #define SYS_TCR_EL12 sys_reg(3, 5, 2, 0, 2)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index b2e01e108b8e..4bf413770b65 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -185,6 +185,22 @@ Field 1 A
> Field 0 M
> EndSysreg
>
> +SysregFields CPACR_ELx
> +Res0 63:29
> +Field 28 TTA
> +Res0 27:26
> +Field 25:24 SMEN
> +Res0 23:22
> +Field 21:20 FPEN
> +Res0 19:18
> +Field 17:16 ZEN
> +Res0 15:0
> +EndSysregFields
> +
> +Sysreg CPACR_EL1 3 0 1 0 2
> +Fields CPACR_ELx
> +EndSysreg
> +
> Sysreg SMPRI_EL1 3 0 1 2 4
> Res0 63:4
> Field 3:0 PRIORITY
> @@ -283,6 +299,10 @@ Sysreg CONTEXTIDR_EL2 3 4 13 0 1
> Fields CONTEXTIDR_ELx
> EndSysreg
>
> +Sysreg CPACR_EL12 3 5 1 0 2
> +Fields CPACR_ELx
> +EndSysreg
> +
> Sysreg ZCR_EL12 3 5 1 2 0
> Fields ZCR_ELx
> EndSysreg
> --
> 2.30.2
>
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next prev parent reply other threads:[~2022-05-20 16:31 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
2022-05-20 16:16 ` [PATCH v2 1/6] arm64/sysreg: Generate definitions for CLIDR_EL1 Mark Brown
2022-05-20 16:16 ` [PATCH v2 2/6] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx Mark Brown
2022-05-20 16:16 ` [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx Mark Brown
2022-05-20 16:30 ` Mark Rutland [this message]
2022-05-20 16:16 ` [PATCH v2 4/6] arm64/sysreg: Generate definitions for CSSELR_EL1 Mark Brown
2022-05-20 16:16 ` [PATCH v2 5/6] arm64/sysreg: Generate definitions for DACR32_EL2 Mark Brown
2022-05-20 16:16 ` [PATCH v2 6/6] arm64/sysreg: Generate definitions for FAR_ELx Mark Brown
2022-05-20 17:56 ` [PATCH v2 0/6] arm64/sysreg: More system register generation Catalin Marinas
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