[PATCH 0/3] r8a779f0: add SDHI support

[PATCH 0/3] r8a779f0: add SDHI support

[Wolfram Sang]

These are the remaining patches to enable basic eMMC support on the
Renesas Spider board with a R-Car S4-8 SoC. The patches are based on
mmc/next.

Some comments:

- For reasons, I have not understood yet, the performance is a bit lower
  than our BSP when checksumming a 250MB file (BSP: 2.7s, this: 3.4s).
  I was investigating clock handling differences between BSP and upstream
  for a while because the values of the clock trees differed quite a
  lot. The patch "clk: renesas: rcar-gen4: implement SDSRC properly" was
  rejected which is fine with me. I meanwhile found out that the BSP had
  PLL4 entries missing which made the values all bogus. The newest
  version of the BSP fixed that. So, it doesn't seem to be the clocks.
  Back to the drawing board, let's handle this incrementally.

- I made prototypes to support the microSD slot despite it is hardly
  accessible because the Ethernet subboard is blocking the way. After
  further discussions with Shimoda-san, we agreed to not support it
  upstream because the voltage switching in hardware or CPLD is only
  for specific testing. I added a comment to describe that.

Other than that, eMMC works fine so far.

All the best,

   Wolfram


Wolfram Sang (3):
  clk: renesas: r8a779f0: Add sdh0 clock
  arm64: dts: renesas: r8a779f0: Add SDHI0 support
  arm64: dts: renesas: spider-cpu: enable eMMC0

 .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 45 +++++++++++++++++++
 arch/arm64/boot/dts/renesas/r8a779f0.dtsi     | 13 ++++++
 drivers/clk/renesas/r8a779f0-cpg-mssr.c       |  3 +-
 3 files changed, 60 insertions(+), 1 deletion(-)

-- 
2.35.1

[PATCH 1/3] clk: renesas: r8a779f0: Add sdh0 clock

[Wolfram Sang]

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 drivers/clk/renesas/r8a779f0-cpg-mssr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
index ea7affa3d47b..0ce1ac978efd 100644
--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
@@ -106,7 +106,8 @@ static const struct cpg_core_clk r8a779f0_core_clks[] __initconst = {
 	DEF_FIXED("cbfusa",	R8A779F0_CLK_CBFUSA,	CLK_EXTAL,	2, 1),
 	DEF_FIXED("cpex",	R8A779F0_CLK_CPEX,	CLK_EXTAL,	2, 1),
 
-	DEF_GEN4_SD("sd0",	R8A779F0_CLK_SD0,	CLK_SDSRC,	0x870),
+	DEF_GEN4_SDH("sdh0",	R8A779F0_CLK_SD0H,	CLK_SDSRC,	   0x870),
+	DEF_GEN4_SD("sd0",	R8A779F0_CLK_SD0,	R8A779F0_CLK_SD0H, 0x870),
 
 	DEF_BASE("rpc",		R8A779F0_CLK_RPC,	CLK_TYPE_GEN4_RPC, CLK_RPCSRC),
 	DEF_BASE("rpcd2",	R8A779F0_CLK_RPCD2,	CLK_TYPE_GEN4_RPCD2, R8A779F0_CLK_RPC),
-- 
2.35.1

Re: [PATCH 1/3] clk: renesas: r8a779f0: Add sdh0 clock

[Geert Uytterhoeven]

On Mon, Jul 11, 2022 at 3:53 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v5.21.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SDHI0 support

[Wolfram Sang]

Extracted from a larger BSP patch made by Linh Phung.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index df46fb87cffc..68e4d835c812 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -343,6 +343,19 @@ dmac1: dma-controller@e7351000 {
 			dma-channels = <16>;
 		};
 
+		mmc0: mmc@ee140000 {
+			compatible = "renesas,sdhi-r8a779f0",
+				     "renesas,rcar-gen4-sdhi";
+			reg = <0 0xee140000 0 0x2000>;
+			interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779F0_CLK_SD0H>;
+			clock-names = "core", "clkh";
+			power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+			resets = <&cpg 706>;
+			max-frequency = <200000000>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@f1000000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
-- 
2.35.1

Re: [PATCH 2/3] arm64: dts: renesas: r8a779f0: Add SDHI0 support

[Geert Uytterhoeven]

On Mon, Jul 11, 2022 at 3:52 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Extracted from a larger BSP patch made by Linh Phung.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.21.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH 3/3] arm64: dts: renesas: spider-cpu: enable eMMC0

[Wolfram Sang]

From: Wolfram Sang <wsa@kernel.org>

This enables the on-board eMMC on the Spider board. Switch SW3 has to be
in the default (neutral) position. Other settings will not be supported
upstream!

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
 .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
index 41aa8591b3b1..7ef9f7cfe10f 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
@@ -21,6 +21,24 @@ memory@480000000 {
 		device_type = "memory";
 		reg = <0x4 0x80000000 0x0 0x80000000>;
 	};
+
+	reg_1p8v: regulator-1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
 };
 
 &extal_clk {
@@ -46,6 +64,27 @@ eeprom@50 {
 	};
 };
 
+/*
+ * This board also has a microSD slot which we will not support upstream
+ * because we cannot directly switch voltages in software.
+ */
+&mmc0 {
+	pinctrl-0 = <&mmc_pins>;
+	pinctrl-1 = <&mmc_pins>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_1p8v>;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+	bus-width = <8>;
+	no-sd;
+	no-sdio;
+	non-removable;
+	full-pwr-cycle-in-suspend;
+	status = "okay";
+};
+
 &pfc {
 	pinctrl-0 = <&scif_clk_pins>;
 	pinctrl-names = "default";
@@ -55,6 +94,12 @@ i2c4_pins: i2c4 {
 		function = "i2c4";
 	};
 
+	mmc_pins: mmc {
+		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+		function = "mmc";
+		power-source = <1800>;
+	};
+
 	scif3_pins: scif3 {
 		groups = "scif3_data", "scif3_ctrl";
 		function = "scif3";
-- 
2.35.1

Re: [PATCH 3/3] arm64: dts: renesas: spider-cpu: enable eMMC0

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 208 bytes --]

On Mon, Jul 11, 2022 at 03:46:56PM +0200, Wolfram Sang wrote:
> From: Wolfram Sang <wsa@kernel.org>

Eeks, the author should be, of course:

 Wolfram Sang <wsa+renesas@sang-engineering.com>

Shall I resend?


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 3/3] arm64: dts: renesas: spider-cpu: enable eMMC0

[Geert Uytterhoeven]

Hi Wolfram,

On Mon, Jul 11, 2022 at 3:56 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Wolfram Sang <wsa@kernel.org>
>
> This enables the on-board eMMC on the Spider board. Switch SW3 has to be
> in the default (neutral) position. Other settings will not be supported
> upstream!
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thanks for your patch!

I guess you don't need "fixed-emmc-driver-type = <1>;"?

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.21, with the authorship fixed.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

RE: [PATCH 0/3] r8a779f0: add SDHI support

[Yoshihiro Shimoda]

Hi Wolfram-san,

> From: Wolfram Sang, Sent: Monday, July 11, 2022 10:47 PM
> 
> These are the remaining patches to enable basic eMMC support on the
> Renesas Spider board with a R-Car S4-8 SoC. The patches are based on
> mmc/next.
> 
> Some comments:
> 
> - For reasons, I have not understood yet, the performance is a bit lower
>   than our BSP when checksumming a 250MB file (BSP: 2.7s, this: 3.4s).
>   I was investigating clock handling differences between BSP and upstream
>   for a while because the values of the clock trees differed quite a
>   lot. The patch "clk: renesas: rcar-gen4: implement SDSRC properly" was
>   rejected which is fine with me. I meanwhile found out that the BSP had
>   PLL4 entries missing which made the values all bogus. The newest
>   version of the BSP fixed that. So, it doesn't seem to be the clocks.
>   Back to the drawing board, let's handle this incrementally.

As we talked locally, the latest renesas-driver the issue doesn't exist.

> - I made prototypes to support the microSD slot despite it is hardly
>   accessible because the Ethernet subboard is blocking the way. After
>   further discussions with Shimoda-san, we agreed to not support it
>   upstream because the voltage switching in hardware or CPLD is only
>   for specific testing. I added a comment to describe that.

OK.

I reviewed the patches and looks good to me. And, I tested on my Spider board.
So,

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

> Other than that, eMMC works fine so far.
> 
> All the best,
> 
>    Wolfram
> 
> 
> Wolfram Sang (3):
>   clk: renesas: r8a779f0: Add sdh0 clock
>   arm64: dts: renesas: r8a779f0: Add SDHI0 support
>   arm64: dts: renesas: spider-cpu: enable eMMC0
> 
>  .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 45 +++++++++++++++++++
>  arch/arm64/boot/dts/renesas/r8a779f0.dtsi     | 13 ++++++
>  drivers/clk/renesas/r8a779f0-cpg-mssr.c       |  3 +-
>  3 files changed, 60 insertions(+), 1 deletion(-)
> 
> --
> 2.35.1