From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: x86@kernel.org, eranian@google.com, ravi.bangoria@amd.com,
linux-kernel@vger.kernel.org, acme@kernel.org,
mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
jolsa@kernel.org, namhyung@kernel.org
Subject: Re: [PATCH v2 8/9] perf/x86/intel: Shadow MSR_ARCH_PERFMON_FIXED_CTR_CTRL
Date: Thu, 1 Sep 2022 11:10:49 +0200 [thread overview]
Message-ID: <YxB3GWVCNHg5RutQ@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <0b8477e2-6e85-b349-0e92-e6a298531c18@linux.intel.com>
On Wed, Aug 31, 2022 at 09:52:19AM -0400, Liang, Kan wrote:
>
>
> On 2022-08-29 6:10 a.m., Peter Zijlstra wrote:
> > Less RDMSR is more better.
>
> I had an RFC patch which does a further step to move the fixed
> control register write to right before the entire PMU re-enabling, which
> could also save some writes if there are several fixed counters enabled.
> https://lore.kernel.org/lkml/20220804140729.2951259-1-kan.liang@linux.intel.com/
>
> Do you have any comments for the RFC patch?
>
Oh, I like that better, let me just replace my patch with that.
next prev parent reply other threads:[~2022-09-01 9:11 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-29 10:09 [PATCH v2 0/9] perf/x86: Some cleanups Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 1/9] perf/x86: Add two more x86_pmu methods Peter Zijlstra
2022-09-09 8:52 ` [tip: perf/core] " tip-bot2 for Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 2/9] perf/x86/intel: Move the topdown stuff into the intel driver Peter Zijlstra
2022-08-31 13:41 ` Liang, Kan
2022-09-01 9:06 ` Peter Zijlstra
2022-09-09 8:52 ` [tip: perf/core] " tip-bot2 for Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 3/9] perf/x86: Change x86_pmu::limit_period signature Peter Zijlstra
2022-09-09 8:52 ` [tip: perf/core] " tip-bot2 for Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 4/9] perf/x86: Add a x86_pmu::limit_period static_call Peter Zijlstra
2022-09-09 8:52 ` [tip: perf/core] " tip-bot2 for Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 5/9] perf/x86/intel: Remove x86_pmu::set_topdown_event_period Peter Zijlstra
2022-09-09 8:52 ` [tip: perf/core] " tip-bot2 for Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 6/9] perf/x86/intel: Remove x86_pmu::update_topdown_event Peter Zijlstra
2022-09-09 8:52 ` [tip: perf/core] " tip-bot2 for Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 7/9] perf/x86/p4: Remove perfctr_second_write quirk Peter Zijlstra
2022-09-09 8:52 ` [tip: perf/core] " tip-bot2 for Peter Zijlstra
2022-08-29 10:10 ` [PATCH v2 8/9] perf/x86/intel: Shadow MSR_ARCH_PERFMON_FIXED_CTR_CTRL Peter Zijlstra
2022-08-31 13:52 ` Liang, Kan
2022-09-01 9:10 ` Peter Zijlstra [this message]
2022-09-01 10:04 ` Peter Zijlstra
2022-09-01 11:37 ` Liang, Kan
2022-08-29 10:10 ` [PATCH v2 9/9] perf/x86/intel: Optimize short PEBS counters Peter Zijlstra
2022-08-29 15:55 ` Liang, Kan
2022-08-29 21:12 ` Peter Zijlstra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YxB3GWVCNHg5RutQ@hirez.programming.kicks-ass.net \
--to=peterz@infradead.org \
--cc=acme@kernel.org \
--cc=alexander.shishkin@linux.intel.com \
--cc=eranian@google.com \
--cc=jolsa@kernel.org \
--cc=kan.liang@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=namhyung@kernel.org \
--cc=ravi.bangoria@amd.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.