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From: Jisheng Zhang <jszhang@kernel.org>
To: Liao Chang <liaochang1@huawei.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, mhiramat@kernel.org, rostedt@goodmis.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv/kprobe: Optimize the performance of patching instruction slot
Date: Thu, 8 Sep 2022 01:21:27 +0800	[thread overview]
Message-ID: <YxjTF2FlIJbbKq0p@xhacker> (raw)
In-Reply-To: <20220907023327.85630-1-liaochang1@huawei.com>

On Wed, Sep 07, 2022 at 10:33:27AM +0800, Liao Chang wrote:
> Since no race condition occurs on each instruction slot, hence it is
> safe to patch instruction slot without stopping machine.

hmm, IMHO there's race when arming kprobe under SMP, so stopping
machine is necessary here. Maybe I misundertand something.

> 
> Signed-off-by: Liao Chang <liaochang1@huawei.com>
> ---
>  arch/riscv/kernel/probes/kprobes.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c
> index e6e950b7cf32..eff7d7fab535 100644
> --- a/arch/riscv/kernel/probes/kprobes.c
> +++ b/arch/riscv/kernel/probes/kprobes.c
> @@ -24,12 +24,14 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);
>  static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
>  {
>  	unsigned long offset = GET_INSN_LENGTH(p->opcode);
> +	const kprobe_opcode_t brk_insn = __BUG_INSN_32;
> +	kprobe_opcode_t slot[MAX_INSN_SIZE];
>  
>  	p->ainsn.api.restore = (unsigned long)p->addr + offset;
>  
> -	patch_text(p->ainsn.api.insn, p->opcode);
> -	patch_text((void *)((unsigned long)(p->ainsn.api.insn) + offset),
> -		   __BUG_INSN_32);
> +	memcpy(slot, &p->opcode, offset);
> +	memcpy((void *)((unsigned long)slot + offset), &brk_insn, 4);
> +	patch_text_nosync(p->ainsn.api.insn, slot, offset + 4);
>  }
>  
>  static void __kprobes arch_prepare_simulate(struct kprobe *p)
> -- 
> 2.17.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang@kernel.org>
To: Liao Chang <liaochang1@huawei.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, mhiramat@kernel.org, rostedt@goodmis.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv/kprobe: Optimize the performance of patching instruction slot
Date: Thu, 8 Sep 2022 01:21:27 +0800	[thread overview]
Message-ID: <YxjTF2FlIJbbKq0p@xhacker> (raw)
In-Reply-To: <20220907023327.85630-1-liaochang1@huawei.com>

On Wed, Sep 07, 2022 at 10:33:27AM +0800, Liao Chang wrote:
> Since no race condition occurs on each instruction slot, hence it is
> safe to patch instruction slot without stopping machine.

hmm, IMHO there's race when arming kprobe under SMP, so stopping
machine is necessary here. Maybe I misundertand something.

> 
> Signed-off-by: Liao Chang <liaochang1@huawei.com>
> ---
>  arch/riscv/kernel/probes/kprobes.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/kprobes.c
> index e6e950b7cf32..eff7d7fab535 100644
> --- a/arch/riscv/kernel/probes/kprobes.c
> +++ b/arch/riscv/kernel/probes/kprobes.c
> @@ -24,12 +24,14 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);
>  static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
>  {
>  	unsigned long offset = GET_INSN_LENGTH(p->opcode);
> +	const kprobe_opcode_t brk_insn = __BUG_INSN_32;
> +	kprobe_opcode_t slot[MAX_INSN_SIZE];
>  
>  	p->ainsn.api.restore = (unsigned long)p->addr + offset;
>  
> -	patch_text(p->ainsn.api.insn, p->opcode);
> -	patch_text((void *)((unsigned long)(p->ainsn.api.insn) + offset),
> -		   __BUG_INSN_32);
> +	memcpy(slot, &p->opcode, offset);
> +	memcpy((void *)((unsigned long)slot + offset), &brk_insn, 4);
> +	patch_text_nosync(p->ainsn.api.insn, slot, offset + 4);
>  }
>  
>  static void __kprobes arch_prepare_simulate(struct kprobe *p)
> -- 
> 2.17.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2022-09-07 17:31 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-07  2:33 [PATCH] riscv/kprobe: Optimize the performance of patching instruction slot Liao Chang
2022-09-07  2:33 ` Liao Chang
2022-09-07 17:21 ` Jisheng Zhang [this message]
2022-09-07 17:21   ` Jisheng Zhang
2022-09-07 22:28   ` Masami Hiramatsu
2022-09-07 22:28     ` Masami Hiramatsu
2022-09-08  1:43   ` liaochang (A)
2022-09-08  1:43     ` liaochang (A)
2022-09-08 12:49     ` Masami Hiramatsu
2022-09-08 12:49       ` Masami Hiramatsu
2022-09-09  1:55       ` liaochang (A)
2022-09-09  1:55         ` liaochang (A)
2022-09-10  2:24         ` Masami Hiramatsu
2022-09-10  2:24           ` Masami Hiramatsu

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