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From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: Nick Forrington <nick.forrington@arm.com>,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	Will Deacon <will@kernel.org>, James Clark <james.clark@arm.com>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] perf vendor events: Update events for Neoverse E1
Date: Thu, 8 Sep 2022 15:35:11 -0300	[thread overview]
Message-ID: <Yxo130Bh3Y2ZUl95@kernel.org> (raw)
In-Reply-To: <e77a66f2-f572-0960-3f6a-68ca9773a719@huawei.com>

Em Thu, Sep 08, 2022 at 09:34:00AM +0100, John Garry escreveu:
> On 07/09/2022 16:49, Nick Forrington wrote:
> > These CPUs contain the same PMU events (as per the Arm Technical
> > Reference manuals for Cortex A65 and Neoverse E1)
> > 
> > This de-duplicates event data, and avoids issues in previous E1 event
> > data (not present in A65 data)
> > * Missing implementation defined events
> > * Inclusion of events that are not implemented:
> >    - L1D_CACHE_ALLOCATE
> >    - SAMPLE_POP
> >    - SAMPLE_FEED
> >    - SAMPLE_FILTRATE
> >    - SAMPLE_COLLISION
> > 
> > Signed-off-by: Nick Forrington <nick.forrington@arm.com>
> 
> Reviewed-by: John Garry <john.garry@huawei.com>

Thanks, applied.

- Arnaldo


WARNING: multiple messages have this Message-ID (diff)
From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: John Garry <john.garry@huawei.com>
Cc: Nick Forrington <nick.forrington@arm.com>,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	Will Deacon <will@kernel.org>, James Clark <james.clark@arm.com>,
	Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] perf vendor events: Update events for Neoverse E1
Date: Thu, 8 Sep 2022 15:35:11 -0300	[thread overview]
Message-ID: <Yxo130Bh3Y2ZUl95@kernel.org> (raw)
In-Reply-To: <e77a66f2-f572-0960-3f6a-68ca9773a719@huawei.com>

Em Thu, Sep 08, 2022 at 09:34:00AM +0100, John Garry escreveu:
> On 07/09/2022 16:49, Nick Forrington wrote:
> > These CPUs contain the same PMU events (as per the Arm Technical
> > Reference manuals for Cortex A65 and Neoverse E1)
> > 
> > This de-duplicates event data, and avoids issues in previous E1 event
> > data (not present in A65 data)
> > * Missing implementation defined events
> > * Inclusion of events that are not implemented:
> >    - L1D_CACHE_ALLOCATE
> >    - SAMPLE_POP
> >    - SAMPLE_FEED
> >    - SAMPLE_FILTRATE
> >    - SAMPLE_COLLISION
> > 
> > Signed-off-by: Nick Forrington <nick.forrington@arm.com>
> 
> Reviewed-by: John Garry <john.garry@huawei.com>

Thanks, applied.

- Arnaldo


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  reply	other threads:[~2022-09-08 18:35 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-07 15:49 [PATCH v2] perf vendor events: Update events for Neoverse E1 Nick Forrington
2022-09-07 15:49 ` Nick Forrington
2022-09-08  8:34 ` John Garry
2022-09-08  8:34   ` John Garry
2022-09-08 18:35   ` Arnaldo Carvalho de Melo [this message]
2022-09-08 18:35     ` Arnaldo Carvalho de Melo

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