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From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: James Clark <james.clark@arm.com>,
	suzuki.poulose@arm.com, coresight@lists.linaro.org,
	mathieu.poirier@linaro.org, mike.leach@linaro.org,
	leo.yan@linaro.org,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] coresight: Use new autogenerated sysreg definitions
Date: Tue, 20 Sep 2022 19:08:16 +0100	[thread overview]
Message-ID: <YyoBkDGtS+nAWp+Q@arm.com> (raw)
In-Reply-To: <Yyn+68Nv2OYKId11@sirena.org.uk>

On Tue, Sep 20, 2022 at 06:56:59PM +0100, Mark Brown wrote:
> On Tue, Sep 20, 2022 at 06:07:34PM +0100, Catalin Marinas wrote:
> > On Tue, Sep 20, 2022 at 05:42:38PM +0100, Catalin Marinas wrote:
> > > BTW, for some reason we don't have CoreSight enabled in defconfig, not
> > > even as a module. Would you mind sending a patch for this and enable (as
> > > modules) all the relevant drivers? We miss any test coverage here.
> > 
> > The PMU counters are in the same camp. Enabling them breaks the kernel
> > build. I wonder whether we should go for changing the default in Kconfig
> > directly rather than defconfig.
> 
> I sent a patch for the PMU counters defconfig yesterday.

The defconfig patches tend to fall through the cracks. I'll try to pick
some of them up.

BTW, do you plan to send a patch for the arm_spe_pmu build failures
(unless you did already and I missed it):

linux/drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmsevfr_res0':
linux/drivers/perf/arm_spe_pmu.c:677:14: error: 'ID_AA64DFR0_PMSVER_8_2' undeclared (first use in this function); did you mean 'ID_AA64DFR0_EL1_PMSVer_IMP'?
  677 |         case ID_AA64DFR0_PMSVER_8_2:
      |              ^~~~~~~~~~~~~~~~~~~~~~
      |              ID_AA64DFR0_EL1_PMSVer_IMP
linux/drivers/perf/arm_spe_pmu.c:677:14: note: each undeclared identifier is reported only once for each function it appears in
linux/drivers/perf/arm_spe_pmu.c:679:14: error: 'ID_AA64DFR0_PMSVER_8_3' undeclared (first use in this function); did you mean 'ID_AA64DFR0_EL1_PMSVer_IMP'?
  679 |         case ID_AA64DFR0_PMSVER_8_3:
      |              ^~~~~~~~~~~~~~~~~~~~~~
      |              ID_AA64DFR0_EL1_PMSVer_IMP
linux/drivers/perf/arm_spe_pmu.c: In function '__arm_spe_pmu_dev_probe':
linux/drivers/perf/arm_spe_pmu.c:961:52: error: 'ID_AA64DFR0_PMSVER_SHIFT' undeclared (first use in this function); did you mean 'ID_AA64DFR0_EL1_PMSVer_SHIFT'?
  961 |                                                    ID_AA64DFR0_PMSVER_SHIFT);
      |                                                    ^~~~~~~~~~~~~~~~~~~~~~~~
      |                                                    ID_AA64DFR0_EL1_PMSVer_SHIFT

-- 
Catalin

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WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Brown <broonie@kernel.org>
Cc: James Clark <james.clark@arm.com>,
	suzuki.poulose@arm.com, coresight@lists.linaro.org,
	mathieu.poirier@linaro.org, mike.leach@linaro.org,
	leo.yan@linaro.org,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] coresight: Use new autogenerated sysreg definitions
Date: Tue, 20 Sep 2022 19:08:16 +0100	[thread overview]
Message-ID: <YyoBkDGtS+nAWp+Q@arm.com> (raw)
In-Reply-To: <Yyn+68Nv2OYKId11@sirena.org.uk>

On Tue, Sep 20, 2022 at 06:56:59PM +0100, Mark Brown wrote:
> On Tue, Sep 20, 2022 at 06:07:34PM +0100, Catalin Marinas wrote:
> > On Tue, Sep 20, 2022 at 05:42:38PM +0100, Catalin Marinas wrote:
> > > BTW, for some reason we don't have CoreSight enabled in defconfig, not
> > > even as a module. Would you mind sending a patch for this and enable (as
> > > modules) all the relevant drivers? We miss any test coverage here.
> > 
> > The PMU counters are in the same camp. Enabling them breaks the kernel
> > build. I wonder whether we should go for changing the default in Kconfig
> > directly rather than defconfig.
> 
> I sent a patch for the PMU counters defconfig yesterday.

The defconfig patches tend to fall through the cracks. I'll try to pick
some of them up.

BTW, do you plan to send a patch for the arm_spe_pmu build failures
(unless you did already and I missed it):

linux/drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmsevfr_res0':
linux/drivers/perf/arm_spe_pmu.c:677:14: error: 'ID_AA64DFR0_PMSVER_8_2' undeclared (first use in this function); did you mean 'ID_AA64DFR0_EL1_PMSVer_IMP'?
  677 |         case ID_AA64DFR0_PMSVER_8_2:
      |              ^~~~~~~~~~~~~~~~~~~~~~
      |              ID_AA64DFR0_EL1_PMSVer_IMP
linux/drivers/perf/arm_spe_pmu.c:677:14: note: each undeclared identifier is reported only once for each function it appears in
linux/drivers/perf/arm_spe_pmu.c:679:14: error: 'ID_AA64DFR0_PMSVER_8_3' undeclared (first use in this function); did you mean 'ID_AA64DFR0_EL1_PMSVer_IMP'?
  679 |         case ID_AA64DFR0_PMSVER_8_3:
      |              ^~~~~~~~~~~~~~~~~~~~~~
      |              ID_AA64DFR0_EL1_PMSVer_IMP
linux/drivers/perf/arm_spe_pmu.c: In function '__arm_spe_pmu_dev_probe':
linux/drivers/perf/arm_spe_pmu.c:961:52: error: 'ID_AA64DFR0_PMSVER_SHIFT' undeclared (first use in this function); did you mean 'ID_AA64DFR0_EL1_PMSVer_SHIFT'?
  961 |                                                    ID_AA64DFR0_PMSVER_SHIFT);
      |                                                    ^~~~~~~~~~~~~~~~~~~~~~~~
      |                                                    ID_AA64DFR0_EL1_PMSVer_SHIFT

-- 
Catalin

  reply	other threads:[~2022-09-20 18:09 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-20 13:48 [PATCH] coresight: Use new autogenerated sysreg definitions James Clark
2022-09-20 13:48 ` James Clark
2022-09-20 16:42 ` Catalin Marinas
2022-09-20 16:42   ` Catalin Marinas
2022-09-20 17:07   ` Catalin Marinas
2022-09-20 17:07     ` Catalin Marinas
2022-09-20 17:56     ` Mark Brown
2022-09-20 17:56       ` Mark Brown
2022-09-20 18:08       ` Catalin Marinas [this message]
2022-09-20 18:08         ` Catalin Marinas
2022-09-20 18:48         ` Mark Brown
2022-09-20 18:48           ` Mark Brown
2022-09-20 19:11           ` Mark Brown
2022-09-20 19:11             ` Mark Brown
2022-09-21  8:21             ` Catalin Marinas
2022-09-21  8:21               ` Catalin Marinas
2022-09-20 18:34 ` Mark Brown
2022-09-20 18:34   ` Mark Brown

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