Re: [RFC PATCH v2 15/20] hw/arm/smmuv3: Forward invalidation commands to hw

[Nicolin Chen <nicolinc@nvidia.com>]

On Wed, Mar 26, 2025 at 03:16:18PM +0100, Eric Auger wrote:
> > @@ -1395,6 +1403,13 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
> >  
> >              trace_smmuv3_cmdq_cfgi_cd(sid);
> >              smmuv3_flush_config(sdev);
> > +
> > +            if (smmuv3_accel_batch_cmds(sdev->smmu, sdev, &batch, &cmd,
> > +                                        &q->cons, true)) {
> > +                cmd_error = SMMU_CERROR_ILL;
> I understand you collect all batchable commands all together (those
> sharing the same dev_cache prop) and the batch is executed either when
> the cache target changes or at the very end of the queue consumption.
> Since you don't batch all kinds of commands don't you have a risk to
> send commands out of order?

Yes, that could happen. But would it have some real risk?

This practice has an assumption that the guest OS would group
each batch with a proper CMD_SYNC like Linux does. So it could
reduce the amount of ioctls. If we can think of some real risk
when the guest OS doesn't, yes, I think we would have to flush
the batch if any non-accel command appear in-between.

Thanks
Nicolin