From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
To: Pavel Machek <pavel@denx.de>
Cc: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
Biju Das <biju.das.jz@bp.renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
tomm.merciai@gmail.com
Subject: Re: [PATCH 6.1.y-cip 00/21] Add support for Renesas RZ/G3E SoC and SMARC-EVK platform
Date: Wed, 26 Mar 2025 14:43:13 +0100 [thread overview]
Message-ID: <Z-QEcdrAz23PkN7h@tom-desktop> (raw)
In-Reply-To: <Z+P5EcmP5S5leD9O@duo.ucw.cz>
Hi Pavel,
On Wed, Mar 26, 2025 at 01:54:41PM +0100, Pavel Machek wrote:
> Hi!
>
> > This patch series adds initial support for the Renesas RZ/G3E SoC and
> > RZ/G3E SMARC EVK platform to linux-6.1.y-cip kernel. The RZ/G3E device is a
> > general-purpose microprocessor with a quad-core CA-55, single core CM-33,
> > Ethos-U55 NPU, Mali-G52 3-D Graphics and other peripherals.
> >
> > All patches are cherry-picked from mainline kernel.
>
> Thank you, applied.
Thanks for the update! :)
Next step will be: pinctrl support
This for 6.1.y-cip will be a patchset from:
[6.1.y-cip,23/85] dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H
..
to
[6.1.y-cip,64/85] arm64: dts: renesas: r9a09g047: Add pincontrol node
+
[6.1.y-cip,77/85] arm64: dts: renesas: r9a09g047e57-smarc: Add SCIF pincontrol
What do you think?
Thanks in advance.
----
I've tested the same on 6.12.y-cip. I can share that a smaller patchset
is required to bring up the pinctrl support + SCIF pincontrol on RZ/G3E.
21eaffd338902 arm64: dts: renesas: r9a09g047e57-smarc: Add SCIF pincontrol
60e58e522d319 arm64: dts: renesas: r9a09g047: Add pincontrol node
e3acc80c6ba8f pinctrl: renesas: rzg2l: Add support for RZ/G3E SoC
92421d6d2daf2 pinctrl: renesas: rzg2l: Update r9a09g057_variable_pin_cfg table
ad84e8733dfb2 pinctrl: renesas: rzg2l: Use gpiochip_populate_parent_fwspec_twocell helper
729b42260235e pinctrl: renesas: rzg2l: Add support for configuring schmitt-trigger
ec01f77780384 pinctrl: renesas: rzg2l: Add support for enabling/disabling open-drain outputs
d29a0e1f3a42f pinctrl: renesas: rzg2l: Remove RZG2L_TINT_IRQ_START_INDEX
64772cc20274c pinctrl: renesas: rzg2l: Move RZG2L_SINGLE_PIN definition to top of the file
da0cd8ac391d8 dt-bindings: pinctrl: renesas: Document RZ/G3E SoC
4cbfebe8e22d1 dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow schmitt and open drain properties
63f78eb380bd8 dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC
35cfeaff9607d dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H
I will send the series.
>
> Best regards,
> Pavel
> --
> DENX Software Engineering GmbH, Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Thanks & Regards,
Tommmaso
next prev parent reply other threads:[~2025-03-26 13:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-21 11:00 [PATCH 6.1.y-cip 00/21] Add support for Renesas RZ/G3E SoC and SMARC-EVK platform Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 01/21] dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 02/21] dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 03/21] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 04/21] dt-bindings: clock: renesas: Document RZ/G3E " Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 05/21] clk: renesas: Add family-specific clock driver for RZ/V2H(P) Tommaso Merciai
2025-03-21 20:08 ` Pavel Machek
2025-03-21 11:00 ` [PATCH 6.1.y-cip 06/21] clk: renesas: Add RZ/V2H(P) CPG driver Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 07/21] clk: renesas: rzv2h: Add support for dynamic switching divider clocks Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 08/21] clk: renesas: rzv2h: Add selective Runtime PM support for clocks Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 09/21] clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 10/21] clk: renesas: r9a09g057: Add CA55 core clocks Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 11/21] clk: renesas: r9a09g057: Add clock and reset entries for ICU Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 12/21] clk: renesas: r9a09g057: Add support for PLLVDO, CRU clocks, and resets Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 13/21] clk: renesas: rzv2h: Add MSTOP support Tommaso Merciai
2025-03-21 20:10 ` Pavel Machek
2025-03-21 11:00 ` [PATCH 6.1.y-cip 14/21] clk: renesas: rzv2h: Add support for RZ/G3E SoC Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 15/21] clk: renesas: r9a09g047: Add CA55 core clocks Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 16/21] arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 17/21] arm64: dts: renesas: r9a09g047: Add OPP table Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 18/21] arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 19/21] arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 20/21] soc: renesas: Add RZ/G3E (R9A09G047) config option Tommaso Merciai
2025-03-21 11:00 ` [PATCH 6.1.y-cip 21/21] arm64: defconfig: Enable R9A09G047 SoC Tommaso Merciai
2025-03-21 20:12 ` [PATCH 6.1.y-cip 00/21] Add support for Renesas RZ/G3E SoC and SMARC-EVK platform Pavel Machek
2025-03-24 9:03 ` Tommaso Merciai
2025-03-24 9:15 ` Pavel Machek
2025-03-26 12:54 ` Pavel Machek
2025-03-26 13:43 ` Tommaso Merciai [this message]
2025-03-31 9:07 ` Pavel Machek
2025-03-31 9:54 ` Tommaso Merciai
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