Re: Reset on Beaglebone Black has become unreliable/broken

[Konstantin Kletschke <konstantin.kletschke@inside-m2m.de>]

On Mon, Dec 02, 2024 at 01:41:26PM +0100, Ahmad Fatoum wrote:
> Hello Konstantin,

Hello Ahmad,

> > Changed CONFIG_BAREBOX_MAX_IMAGE_SIZE from 0x1b400 to 0x2b400
> 
> Why do you do this step? 0x1b400 == 109KiB, which is chosen, because the MLO
> needs to fit into the On-Chip SRAM of the AM335x.

Well, the current master of barebox does not fit actually, if I do "make
am335x_mlo_defconfig" and "make" I end up with Error

images/start_am33xx_afi_gf_sram.pblb size 112288 > maximum size 111616

I read some information about too much features and if I read correctly
there was today traffic on this mailing lit about dealing with this
problem. I read in the internet somewhere about some guy increasing this
size and going well...

> Increasing the size won't magically increase RAM size, but it may result
> in a truncated MLO being loaded into memory or worse: barebox overwriting
> memory and MMIO that it shouldn't be touching.

... which was not a good idea for me adapting this, I was not aware this
is physically tied to internal SRAM. Oops.

> Do you also change this when compiling your normal image?

No way! Only changes in environment in a production version 2022.04.0.
To deal with debugging and code changes and faster deployment I have
additionally downloaded current master git. In the latter one I do "make
am335x_mlo_defconfig" but after that I enter "make menuconfig" and
disable "CONFIG_MTD" resulting in a successful compile.

Both versions, the production 2022.04.0 and the current master
(defconfig, disabling MTD) behave
the same: On most BBB devices resetting at barebox prompt via "reset" or
pressing S1 works reliable any time, on some (one digit percentage)
never.

I thought about the PMIC handling. I see barebox does not do anything
with it, relies on reset default and sets CPU speed to 500MHz in
lowlevel.c:

am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_400);

Which is totally reasonable, the voltage is 1,1V then in this mode after
powerup.

u-boot seems (I am not 100% sure) to set 1,3V but goes 1000MHz, which is
reasonable too. So there is a difference but not a fatal one.

May I kindly aask how to properly enable the LL debugging?

I do "make am335x_mlo_defconfig", disable CONFIG_MTD and set 

CONFIG_DEBUG_LL=y
CONFIG_DEBUG_OMAP_UART=y
CONFIG_DEBUG_AM33XX_UART=y
CONFIG_DEBUG_OMAP_UART_PORT=0

and compile a new MLO and copy it over. Does the other part barebox.bin
need to be handled the same?
The normal serial console I use is attached to UART0, is it save to use
UART_PORT 0 here also?

This starts well on cold boot, I get some additional non readable chars
at startup, like this:

2~�W-�,-H]
          ���k׋�ҫ�.LWC�C�C��arebox 2024.10.0-00152-g53c99b9f550b-dirty #15 Mon Dec 2 15:07:37 CET 2024

On "reset" or S1 I get no output at all, like without LL debug.

I will try to move the 4 lines in lowlevel.c like you suggested...

Regards
Konstantin


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