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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: "Chen, Jiqian" <Jiqian.Chen@amd.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Jan Beulich <jbeulich@suse.com>, Julien Grall <julien@xen.org>,
	Stefano Stabellini <sstabellini@kernel.org>
Subject: Re: [PATCH] vpci: Add resizable bar support
Date: Fri, 22 Nov 2024 08:58:32 +0100	[thread overview]
Message-ID: <Z0A5qHd2AqrsuRFr@macbook> (raw)
In-Reply-To: <BL1PR12MB5849786A66C48A85202F40C5E7232@BL1PR12MB5849.namprd12.prod.outlook.com>

On Fri, Nov 22, 2024 at 04:04:05AM +0000, Chen, Jiqian wrote:
> On 2024/11/21 17:52, Roger Pau Monné wrote:
> > On Thu, Nov 21, 2024 at 03:05:14AM +0000, Chen, Jiqian wrote:
> >> On 2024/11/20 17:01, Roger Pau Monné wrote:
> >>> On Wed, Nov 20, 2024 at 03:01:57AM +0000, Chen, Jiqian wrote:
> >>>> The only difference between our methods is the timing of updating the size.
> >>>> Yours is later than mine because you updated the size when the driver re-enabled memory decoding, while I updated the size in time when driver resize it.
> >>>
> >>> Indeed, my last guess is the stale cached size is somehow used in my
> >>> approach, and that leads to the failures.  One last (possibly dummy?)
> >>> thing to try might be to use your patch to detect writes to the resize
> >>> control register, but update the BAR sizes in modify_bars(), while
> >>> keeping the traces of when the operations happen.
> >>>
> >> This can work, combine our method, use my patch to detect and write the size into hardware register, and use your patch to update bar[i].size in modify_bars().
> >> Attached the combined patch and the xl dmesg.
> > 
> > This is even weirder, so the attached patch works fine? 
> Yes, it works fine.
> And I will double check.
> 
> > The only difference with my proposal is that you trap the CTRL registers, but
> > the sizing is still done in modify_bars().
> > 
> > What happens if (based on the attached patch) you change
> > rebar_ctrl_write() to:
> > 
> > static void cf_check rebar_ctrl_write(const struct pci_dev *pdev,
> >                                       unsigned int reg,
> >                                       uint32_t val,
> >                                       void *data)
> > {
> >     pci_conf_write32(pdev->sbdf, reg, val);
> > }
> Will try.
> 
> > 
> > And if you don't trap any PCI_REBAR_CTRL at all?
> What do you mean? If I don't trap any rebar_ctrl, how can I call rebar_ctrl_write?

Well, that's part of the question, is just trapping PCI_REBAR_CTRL
enough to make this work?

At the moment it's unclear to me what makes your approach work and not
mine.  And I would like to understand why your code works, otherwise
I fear I'm not understanding how the capability works, and hence our
support for it might not be reliable.

Thanks, Roger.


  reply	other threads:[~2024-11-22  7:58 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-13  8:00 [PATCH] vpci: Add resizable bar support Jiqian Chen
2024-11-13  9:30 ` Roger Pau Monné
2024-11-13 10:00   ` Chen, Jiqian
2024-11-13 10:30     ` Roger Pau Monné
2024-11-13 10:36       ` Jan Beulich
2024-11-13 10:56         ` Roger Pau Monné
2024-11-13 11:01           ` Jan Beulich
2024-11-13 11:24             ` Roger Pau Monné
2024-11-13 11:29               ` Jan Beulich
2024-11-13 12:13                 ` Roger Pau Monné
2024-11-14  6:11       ` Chen, Jiqian
2024-11-14 15:52         ` Roger Pau Monné
2024-11-14 17:36           ` Roger Pau Monné
2024-11-15  3:04             ` Chen, Jiqian
2024-11-15 11:42               ` Roger Pau Monné
2024-11-18  6:06                 ` Chen, Jiqian
2024-11-19 12:46                   ` Roger Pau Monné
2024-11-20  3:01                     ` Chen, Jiqian
2024-11-20  9:01                       ` Roger Pau Monné
2024-11-20 10:06                         ` Jan Beulich
2024-11-20 10:25                         ` Chen, Jiqian
2024-11-21  3:05                         ` Chen, Jiqian
2024-11-21  9:52                           ` Roger Pau Monné
2024-11-22  4:04                             ` Chen, Jiqian
2024-11-22  7:58                               ` Roger Pau Monné [this message]
2024-11-25  3:44                             ` Chen, Jiqian
2024-11-25 12:47                               ` Roger Pau Monné
2024-11-26  6:02                                 ` Chen, Jiqian
2024-11-26  9:47                                   ` Jan Beulich
2024-11-27  9:07                                     ` Chen, Jiqian
2024-11-15  2:16           ` Chen, Jiqian
2024-11-14 17:58         ` Roger Pau Monné
2024-11-18 10:17 ` Roger Pau Monné
2024-11-18 10:26   ` Jan Beulich
2024-11-18 16:41   ` Stefano Stabellini
2024-11-19  7:31   ` Chen, Jiqian
2024-11-19  7:44     ` Jan Beulich
2024-11-20  2:26       ` Chen, Jiqian
2024-11-20  8:06         ` Roger Pau Monné
2024-11-19 12:51 ` Roger Pau Monné
2024-11-20  2:30   ` Chen, Jiqian
2024-11-20  8:09     ` Roger Pau Monné

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