* [PATCH v2 0/1] iommu/riscv: Add platform msi support
@ 2024-11-12 13:35 ` Andrew Jones
0 siblings, 0 replies; 8+ messages in thread
From: Andrew Jones @ 2024-11-12 13:35 UTC (permalink / raw)
To: iommu, linux-riscv, linux-kernel
Cc: tjeznach, samuel.holland, joro, will, robin.murphy, paul.walmsley,
palmer, aou
Add MSI support for a platform IOMMU. May be tested with QEMU when
including [1].
Based on linux-next commit 28955f4fa282 ("Add linux-next specific files for 20241112")
[1] https://lore.kernel.org/all/20241106133407.604587-1-dbarboza@ventanamicro.com/
v2:
- Dropped patch1 of the v1 series since it wasn't necessary [Tomasz]
- Improved error/warning messages [Samuel]
Andrew Jones (1):
iommu/riscv: Add support for platform msi
drivers/iommu/riscv/iommu-platform.c | 102 ++++++++++++++++++++++-----
1 file changed, 84 insertions(+), 18 deletions(-)
--
2.47.0
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH v2 0/1] iommu/riscv: Add platform msi support @ 2024-11-12 13:35 ` Andrew Jones 0 siblings, 0 replies; 8+ messages in thread From: Andrew Jones @ 2024-11-12 13:35 UTC (permalink / raw) To: iommu, linux-riscv, linux-kernel Cc: tjeznach, samuel.holland, joro, will, robin.murphy, paul.walmsley, palmer, aou Add MSI support for a platform IOMMU. May be tested with QEMU when including [1]. Based on linux-next commit 28955f4fa282 ("Add linux-next specific files for 20241112") [1] https://lore.kernel.org/all/20241106133407.604587-1-dbarboza@ventanamicro.com/ v2: - Dropped patch1 of the v1 series since it wasn't necessary [Tomasz] - Improved error/warning messages [Samuel] Andrew Jones (1): iommu/riscv: Add support for platform msi drivers/iommu/riscv/iommu-platform.c | 102 ++++++++++++++++++++++----- 1 file changed, 84 insertions(+), 18 deletions(-) -- 2.47.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/1] iommu/riscv: Add support for platform msi 2024-11-12 13:35 ` Andrew Jones @ 2024-11-12 13:35 ` Andrew Jones -1 siblings, 0 replies; 8+ messages in thread From: Andrew Jones @ 2024-11-12 13:35 UTC (permalink / raw) To: iommu, linux-riscv, linux-kernel Cc: tjeznach, samuel.holland, joro, will, robin.murphy, paul.walmsley, palmer, aou Apply platform_device_msi_init_and_alloc_irqs() to add support for MSIs when the IOMMU is a platform device. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> --- drivers/iommu/riscv/iommu-platform.c | 102 ++++++++++++++++++++++----- 1 file changed, 84 insertions(+), 18 deletions(-) diff --git a/drivers/iommu/riscv/iommu-platform.c b/drivers/iommu/riscv/iommu-platform.c index da336863f152..34b925909816 100644 --- a/drivers/iommu/riscv/iommu-platform.c +++ b/drivers/iommu/riscv/iommu-platform.c @@ -11,18 +11,43 @@ */ #include <linux/kernel.h> +#include <linux/msi.h> +#include <linux/of_irq.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include "iommu-bits.h" #include "iommu.h" +static void riscv_iommu_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg) +{ + struct device *dev = msi_desc_to_dev(desc); + struct riscv_iommu_device *iommu = dev_get_drvdata(dev); + u16 idx = desc->msi_index; + u64 addr; + + addr = ((u64)msg->address_hi << 32) | msg->address_lo; + + if (addr != (addr & RISCV_IOMMU_MSI_CFG_TBL_ADDR)) { + dev_err_once(dev, + "uh oh, the IOMMU can't send MSIs to 0x%llx, sending to 0x%llx instead\n", + addr, addr & RISCV_IOMMU_MSI_CFG_TBL_ADDR); + } + + addr &= RISCV_IOMMU_MSI_CFG_TBL_ADDR; + + riscv_iommu_writeq(iommu, RISCV_IOMMU_REG_MSI_CFG_TBL_ADDR(idx), addr); + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_MSI_CFG_TBL_DATA(idx), msg->data); + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_MSI_CFG_TBL_CTRL(idx), 0); +} + static int riscv_iommu_platform_probe(struct platform_device *pdev) { + enum riscv_iommu_igs_settings igs; struct device *dev = &pdev->dev; struct riscv_iommu_device *iommu = NULL; struct resource *res = NULL; - int vec; + int vec, ret; iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL); if (!iommu) @@ -40,16 +65,6 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev) iommu->caps = riscv_iommu_readq(iommu, RISCV_IOMMU_REG_CAPABILITIES); iommu->fctl = riscv_iommu_readl(iommu, RISCV_IOMMU_REG_FCTL); - /* For now we only support WSI */ - switch (FIELD_GET(RISCV_IOMMU_CAPABILITIES_IGS, iommu->caps)) { - case RISCV_IOMMU_CAPABILITIES_IGS_WSI: - case RISCV_IOMMU_CAPABILITIES_IGS_BOTH: - break; - default: - return dev_err_probe(dev, -ENODEV, - "unable to use wire-signaled interrupts\n"); - } - iommu->irqs_count = platform_irq_count(pdev); if (iommu->irqs_count <= 0) return dev_err_probe(dev, -ENODEV, @@ -57,13 +72,58 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev) if (iommu->irqs_count > RISCV_IOMMU_INTR_COUNT) iommu->irqs_count = RISCV_IOMMU_INTR_COUNT; - for (vec = 0; vec < iommu->irqs_count; vec++) - iommu->irqs[vec] = platform_get_irq(pdev, vec); + igs = FIELD_GET(RISCV_IOMMU_CAPABILITIES_IGS, iommu->caps); + switch (igs) { + case RISCV_IOMMU_CAPABILITIES_IGS_BOTH: + case RISCV_IOMMU_CAPABILITIES_IGS_MSI: + if (is_of_node(dev->fwnode)) + of_msi_configure(dev, to_of_node(dev->fwnode)); + + if (!dev_get_msi_domain(dev)) { + dev_warn(dev, "failed to find an MSI domain\n"); + goto msi_fail; + } + + ret = platform_device_msi_init_and_alloc_irqs(dev, iommu->irqs_count, + riscv_iommu_write_msi_msg); + if (ret) { + dev_warn(dev, "failed to allocate MSIs\n"); + goto msi_fail; + } + + for (vec = 0; vec < iommu->irqs_count; vec++) + iommu->irqs[vec] = msi_get_virq(dev, vec); + + /* Enable message-signaled interrupts, fctl.WSI */ + if (iommu->fctl & RISCV_IOMMU_FCTL_WSI) { + iommu->fctl ^= RISCV_IOMMU_FCTL_WSI; + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl); + } + + dev_info(dev, "using MSIs\n"); + break; + +msi_fail: + if (igs != RISCV_IOMMU_CAPABILITIES_IGS_BOTH) { + return dev_err_probe(dev, -ENODEV, + "unable to use wire-signaled interrupts\n"); + } + + fallthrough; - /* Enable wire-signaled interrupts, fctl.WSI */ - if (!(iommu->fctl & RISCV_IOMMU_FCTL_WSI)) { - iommu->fctl |= RISCV_IOMMU_FCTL_WSI; - riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl); + case RISCV_IOMMU_CAPABILITIES_IGS_WSI: + for (vec = 0; vec < iommu->irqs_count; vec++) + iommu->irqs[vec] = platform_get_irq(pdev, vec); + + /* Enable wire-signaled interrupts, fctl.WSI */ + if (!(iommu->fctl & RISCV_IOMMU_FCTL_WSI)) { + iommu->fctl |= RISCV_IOMMU_FCTL_WSI; + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl); + } + dev_info(dev, "using wire-signaled interrupts\n"); + break; + default: + return dev_err_probe(dev, -ENODEV, "invalid IGS\n"); } return riscv_iommu_init(iommu); @@ -71,7 +131,13 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev) static void riscv_iommu_platform_remove(struct platform_device *pdev) { - riscv_iommu_remove(dev_get_drvdata(&pdev->dev)); + struct riscv_iommu_device *iommu = dev_get_drvdata(&pdev->dev); + bool msi = !(iommu->fctl & RISCV_IOMMU_FCTL_WSI); + + riscv_iommu_remove(iommu); + + if (msi) + platform_device_msi_free_irqs_all(&pdev->dev); }; static const struct of_device_id riscv_iommu_of_match[] = { -- 2.47.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 1/1] iommu/riscv: Add support for platform msi @ 2024-11-12 13:35 ` Andrew Jones 0 siblings, 0 replies; 8+ messages in thread From: Andrew Jones @ 2024-11-12 13:35 UTC (permalink / raw) To: iommu, linux-riscv, linux-kernel Cc: tjeznach, samuel.holland, joro, will, robin.murphy, paul.walmsley, palmer, aou Apply platform_device_msi_init_and_alloc_irqs() to add support for MSIs when the IOMMU is a platform device. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> --- drivers/iommu/riscv/iommu-platform.c | 102 ++++++++++++++++++++++----- 1 file changed, 84 insertions(+), 18 deletions(-) diff --git a/drivers/iommu/riscv/iommu-platform.c b/drivers/iommu/riscv/iommu-platform.c index da336863f152..34b925909816 100644 --- a/drivers/iommu/riscv/iommu-platform.c +++ b/drivers/iommu/riscv/iommu-platform.c @@ -11,18 +11,43 @@ */ #include <linux/kernel.h> +#include <linux/msi.h> +#include <linux/of_irq.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include "iommu-bits.h" #include "iommu.h" +static void riscv_iommu_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg) +{ + struct device *dev = msi_desc_to_dev(desc); + struct riscv_iommu_device *iommu = dev_get_drvdata(dev); + u16 idx = desc->msi_index; + u64 addr; + + addr = ((u64)msg->address_hi << 32) | msg->address_lo; + + if (addr != (addr & RISCV_IOMMU_MSI_CFG_TBL_ADDR)) { + dev_err_once(dev, + "uh oh, the IOMMU can't send MSIs to 0x%llx, sending to 0x%llx instead\n", + addr, addr & RISCV_IOMMU_MSI_CFG_TBL_ADDR); + } + + addr &= RISCV_IOMMU_MSI_CFG_TBL_ADDR; + + riscv_iommu_writeq(iommu, RISCV_IOMMU_REG_MSI_CFG_TBL_ADDR(idx), addr); + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_MSI_CFG_TBL_DATA(idx), msg->data); + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_MSI_CFG_TBL_CTRL(idx), 0); +} + static int riscv_iommu_platform_probe(struct platform_device *pdev) { + enum riscv_iommu_igs_settings igs; struct device *dev = &pdev->dev; struct riscv_iommu_device *iommu = NULL; struct resource *res = NULL; - int vec; + int vec, ret; iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL); if (!iommu) @@ -40,16 +65,6 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev) iommu->caps = riscv_iommu_readq(iommu, RISCV_IOMMU_REG_CAPABILITIES); iommu->fctl = riscv_iommu_readl(iommu, RISCV_IOMMU_REG_FCTL); - /* For now we only support WSI */ - switch (FIELD_GET(RISCV_IOMMU_CAPABILITIES_IGS, iommu->caps)) { - case RISCV_IOMMU_CAPABILITIES_IGS_WSI: - case RISCV_IOMMU_CAPABILITIES_IGS_BOTH: - break; - default: - return dev_err_probe(dev, -ENODEV, - "unable to use wire-signaled interrupts\n"); - } - iommu->irqs_count = platform_irq_count(pdev); if (iommu->irqs_count <= 0) return dev_err_probe(dev, -ENODEV, @@ -57,13 +72,58 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev) if (iommu->irqs_count > RISCV_IOMMU_INTR_COUNT) iommu->irqs_count = RISCV_IOMMU_INTR_COUNT; - for (vec = 0; vec < iommu->irqs_count; vec++) - iommu->irqs[vec] = platform_get_irq(pdev, vec); + igs = FIELD_GET(RISCV_IOMMU_CAPABILITIES_IGS, iommu->caps); + switch (igs) { + case RISCV_IOMMU_CAPABILITIES_IGS_BOTH: + case RISCV_IOMMU_CAPABILITIES_IGS_MSI: + if (is_of_node(dev->fwnode)) + of_msi_configure(dev, to_of_node(dev->fwnode)); + + if (!dev_get_msi_domain(dev)) { + dev_warn(dev, "failed to find an MSI domain\n"); + goto msi_fail; + } + + ret = platform_device_msi_init_and_alloc_irqs(dev, iommu->irqs_count, + riscv_iommu_write_msi_msg); + if (ret) { + dev_warn(dev, "failed to allocate MSIs\n"); + goto msi_fail; + } + + for (vec = 0; vec < iommu->irqs_count; vec++) + iommu->irqs[vec] = msi_get_virq(dev, vec); + + /* Enable message-signaled interrupts, fctl.WSI */ + if (iommu->fctl & RISCV_IOMMU_FCTL_WSI) { + iommu->fctl ^= RISCV_IOMMU_FCTL_WSI; + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl); + } + + dev_info(dev, "using MSIs\n"); + break; + +msi_fail: + if (igs != RISCV_IOMMU_CAPABILITIES_IGS_BOTH) { + return dev_err_probe(dev, -ENODEV, + "unable to use wire-signaled interrupts\n"); + } + + fallthrough; - /* Enable wire-signaled interrupts, fctl.WSI */ - if (!(iommu->fctl & RISCV_IOMMU_FCTL_WSI)) { - iommu->fctl |= RISCV_IOMMU_FCTL_WSI; - riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl); + case RISCV_IOMMU_CAPABILITIES_IGS_WSI: + for (vec = 0; vec < iommu->irqs_count; vec++) + iommu->irqs[vec] = platform_get_irq(pdev, vec); + + /* Enable wire-signaled interrupts, fctl.WSI */ + if (!(iommu->fctl & RISCV_IOMMU_FCTL_WSI)) { + iommu->fctl |= RISCV_IOMMU_FCTL_WSI; + riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FCTL, iommu->fctl); + } + dev_info(dev, "using wire-signaled interrupts\n"); + break; + default: + return dev_err_probe(dev, -ENODEV, "invalid IGS\n"); } return riscv_iommu_init(iommu); @@ -71,7 +131,13 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev) static void riscv_iommu_platform_remove(struct platform_device *pdev) { - riscv_iommu_remove(dev_get_drvdata(&pdev->dev)); + struct riscv_iommu_device *iommu = dev_get_drvdata(&pdev->dev); + bool msi = !(iommu->fctl & RISCV_IOMMU_FCTL_WSI); + + riscv_iommu_remove(iommu); + + if (msi) + platform_device_msi_free_irqs_all(&pdev->dev); }; static const struct of_device_id riscv_iommu_of_match[] = { -- 2.47.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/1] iommu/riscv: Add platform msi support 2024-11-12 13:35 ` Andrew Jones @ 2024-12-18 8:33 ` Joerg Roedel -1 siblings, 0 replies; 8+ messages in thread From: Joerg Roedel @ 2024-12-18 8:33 UTC (permalink / raw) To: Andrew Jones Cc: iommu, linux-riscv, linux-kernel, tjeznach, samuel.holland, will, robin.murphy, paul.walmsley, palmer, aou On Tue, Nov 12, 2024 at 02:35:05PM +0100, Andrew Jones wrote: > Andrew Jones (1): > iommu/riscv: Add support for platform msi > > drivers/iommu/riscv/iommu-platform.c | 102 ++++++++++++++++++++++----- > 1 file changed, 84 insertions(+), 18 deletions(-) Applied, thanks. ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/1] iommu/riscv: Add platform msi support @ 2024-12-18 8:33 ` Joerg Roedel 0 siblings, 0 replies; 8+ messages in thread From: Joerg Roedel @ 2024-12-18 8:33 UTC (permalink / raw) To: Andrew Jones Cc: iommu, linux-riscv, linux-kernel, tjeznach, samuel.holland, will, robin.murphy, paul.walmsley, palmer, aou On Tue, Nov 12, 2024 at 02:35:05PM +0100, Andrew Jones wrote: > Andrew Jones (1): > iommu/riscv: Add support for platform msi > > drivers/iommu/riscv/iommu-platform.c | 102 ++++++++++++++++++++++----- > 1 file changed, 84 insertions(+), 18 deletions(-) Applied, thanks. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/1] iommu/riscv: Add platform msi support 2024-11-12 13:35 ` Andrew Jones @ 2025-02-03 19:15 ` patchwork-bot+linux-riscv -1 siblings, 0 replies; 8+ messages in thread From: patchwork-bot+linux-riscv @ 2025-02-03 19:15 UTC (permalink / raw) To: Andrew Jones Cc: linux-riscv, iommu, linux-kernel, tjeznach, samuel.holland, joro, will, robin.murphy, paul.walmsley, palmer, aou Hello: This patch was applied to riscv/linux.git (fixes) by Joerg Roedel <jroedel@suse.de>: On Tue, 12 Nov 2024 14:35:05 +0100 you wrote: > Add MSI support for a platform IOMMU. May be tested with QEMU when > including [1]. > > Based on linux-next commit 28955f4fa282 ("Add linux-next specific files for 20241112") > > [1] https://lore.kernel.org/all/20241106133407.604587-1-dbarboza@ventanamicro.com/ > > [...] Here is the summary with links: - [v2,1/1] iommu/riscv: Add support for platform msi https://git.kernel.org/riscv/c/d5f88acdd6ff You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/1] iommu/riscv: Add platform msi support @ 2025-02-03 19:15 ` patchwork-bot+linux-riscv 0 siblings, 0 replies; 8+ messages in thread From: patchwork-bot+linux-riscv @ 2025-02-03 19:15 UTC (permalink / raw) To: Andrew Jones Cc: linux-riscv, iommu, linux-kernel, tjeznach, samuel.holland, joro, will, robin.murphy, paul.walmsley, palmer, aou Hello: This patch was applied to riscv/linux.git (fixes) by Joerg Roedel <jroedel@suse.de>: On Tue, 12 Nov 2024 14:35:05 +0100 you wrote: > Add MSI support for a platform IOMMU. May be tested with QEMU when > including [1]. > > Based on linux-next commit 28955f4fa282 ("Add linux-next specific files for 20241112") > > [1] https://lore.kernel.org/all/20241106133407.604587-1-dbarboza@ventanamicro.com/ > > [...] Here is the summary with links: - [v2,1/1] iommu/riscv: Add support for platform msi https://git.kernel.org/riscv/c/d5f88acdd6ff You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2025-02-03 19:19 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-11-12 13:35 [PATCH v2 0/1] iommu/riscv: Add platform msi support Andrew Jones 2024-11-12 13:35 ` Andrew Jones 2024-11-12 13:35 ` [PATCH v2 1/1] iommu/riscv: Add support for platform msi Andrew Jones 2024-11-12 13:35 ` Andrew Jones 2024-12-18 8:33 ` [PATCH v2 0/1] iommu/riscv: Add platform msi support Joerg Roedel 2024-12-18 8:33 ` Joerg Roedel 2025-02-03 19:15 ` patchwork-bot+linux-riscv 2025-02-03 19:15 ` patchwork-bot+linux-riscv
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