Re: [PATCH 01/14] dt-bindings: soc: Document Renesas RZ/T2H (R9A09G077) SoC

[Thierry Bultel <thierry.bultel.yh@bp.renesas.com>]

On Wed, Jan 29, 2025 at 07:28:58PM +0100, Krzysztof Kozlowski wrote:
> On 29/01/2025 17:37, Thierry Bultel wrote:

Hi Krzyztof,

> > Add RZ/T2H (R9A09G077) and variants in documentation.
> > 
> > Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
> > ---
> >  .../devicetree/bindings/soc/renesas/renesas.yaml          | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
> > index b7acb65bdecd..33f9e37a3d3d 100644
> > --- a/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
> > +++ b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml
> > @@ -535,6 +535,14 @@ properties:
> >                - renesas,r9a09g057h44 # RZ/V2HP with Mali-G31 + Mali-C55 support
> >            - const: renesas,r9a09g057
> >  
> > +      - description: RZ/T2H (R9A09G077)
> > +        items:
> > +          - enum:
> > +            - renesas,r9a09g077 # RZ/T2H with Quad Cortex-A55 + Dual Cortex-R52
> > +            - renesas,r9a09g077m04 # RZ/T2H with Single Cortex-A55 + Dual Cortex-R52 - no security
> > +            - renesas,r9a09g077m24 # RZ/T2H with Dual Cortex-A55 + Dual Cortex-R52 - no security
> > +            - renesas,r9a09g077m44 # RZ/T2H with Quad Cortex-A55 + Dual Cortex-R52 - no security
> 
> 1. Never tested (see writing schema).
> 2. I don't quite get what this is supposed to express. There is no board
> here.

I had split the commit this way intentionally, this one documenting jsut
the SoC, and a later one documenting its evaluation board.
So you would prefer to have as single commit for SoC (and all variants)
and the evaluation board ?

Best regards
Thierry

> 
> Best regards,
> Krzysztof