* [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes
@ 2025-02-25 17:08 Frank Li
2025-02-26 8:30 ` Alexander Stein
2025-03-11 2:50 ` Shawn Guo
0 siblings, 2 replies; 5+ messages in thread
From: Frank Li @ 2025-02-25 17:08 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
change from v2 - v3
- fix typo 1000000
change from v1 - v2
- rebase to dt/dt64
- add clock 100mhz
---
arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 51625bc9154ec..9bb26b466a061 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 {
clock-output-names = "sai5_mclk";
};
+ clk_sys100m: clock-sys100m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-output-names = "clk_sys100m";
+ };
+
osc_24m: clock-24m {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -1595,6 +1602,14 @@ usb3_dwc3: usb@4c100000 {
};
};
+ hsio_blk_ctl: syscon@4c0100c0 {
+ compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
+ reg = <0x0 0x4c0100c0 0x0 0x1>;
+ #clock-cells = <1>;
+ clocks = <&clk_sys100m>;
+ power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
+ };
+
usb3_phy: phy@4c1f0040 {
compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
reg = <0x0 0x4c1f0040 0x0 0x40>,
@@ -1633,8 +1648,9 @@ pcie0: pcie@4c300000 {
clocks = <&scmi_clk IMX95_CLK_HSIO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
- <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
+ <&hsio_blk_ctl 0>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
@@ -1706,8 +1722,9 @@ pcie1: pcie@4c380000 {
clocks = <&scmi_clk IMX95_CLK_HSIO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
- <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
- clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
+ <&hsio_blk_ctl 0>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX95_CLK_HSIOPLL>,
<&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes
2025-02-25 17:08 [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes Frank Li
@ 2025-02-26 8:30 ` Alexander Stein
2025-02-26 16:32 ` Frank Li
2025-03-11 2:50 ` Shawn Guo
1 sibling, 1 reply; 5+ messages in thread
From: Alexander Stein @ 2025-02-26 8:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: Frank Li
Hi Frank,
Am Dienstag, 25. Februar 2025, 18:08:02 CET schrieb Frank Li:
> Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
> from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> change from v2 - v3
> - fix typo 1000000
>
> change from v1 - v2
> - rebase to dt/dt64
> - add clock 100mhz
> ---
> arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
> 1 file changed, 21 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 51625bc9154ec..9bb26b466a061 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 {
> clock-output-names = "sai5_mclk";
> };
>
> + clk_sys100m: clock-sys100m {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <100000000>;
> + clock-output-names = "clk_sys100m";
> + };
> +
Where does this clock come from? Does this origin on board-level?
Best regards,
Alexander
> osc_24m: clock-24m {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> @@ -1595,6 +1602,14 @@ usb3_dwc3: usb@4c100000 {
> };
> };
>
> + hsio_blk_ctl: syscon@4c0100c0 {
> + compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> + reg = <0x0 0x4c0100c0 0x0 0x1>;
> + #clock-cells = <1>;
> + clocks = <&clk_sys100m>;
> + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> + };
> +
> usb3_phy: phy@4c1f0040 {
> compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
> reg = <0x0 0x4c1f0040 0x0 0x40>,
> @@ -1633,8 +1648,9 @@ pcie0: pcie@4c300000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> @@ -1706,8 +1722,9 @@ pcie1: pcie@4c380000 {
> clocks = <&scmi_clk IMX95_CLK_HSIO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> + <&hsio_blk_ctl 0>;
> + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> <&scmi_clk IMX95_CLK_HSIOPLL>,
> <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
>
--
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes
2025-02-26 8:30 ` Alexander Stein
@ 2025-02-26 16:32 ` Frank Li
0 siblings, 0 replies; 5+ messages in thread
From: Frank Li @ 2025-02-26 16:32 UTC (permalink / raw)
To: Alexander Stein
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
On Wed, Feb 26, 2025 at 09:30:01AM +0100, Alexander Stein wrote:
> Hi Frank,
>
> Am Dienstag, 25. Februar 2025, 18:08:02 CET schrieb Frank Li:
> > Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
> > arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
> > from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> > change from v2 - v3
> > - fix typo 1000000
> >
> > change from v1 - v2
> > - rebase to dt/dt64
> > - add clock 100mhz
> > ---
> > arch/arm64/boot/dts/freescale/imx95.dtsi | 25 ++++++++++++++++++++----
> > 1 file changed, 21 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > index 51625bc9154ec..9bb26b466a061 100644
> > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > @@ -291,6 +291,13 @@ sai5_mclk: clock-sai-mclk5 {
> > clock-output-names = "sai5_mclk";
> > };
> >
> > + clk_sys100m: clock-sys100m {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <100000000>;
> > + clock-output-names = "clk_sys100m";
> > + };
> > +
>
> Where does this clock come from? Does this origin on board-level?
It is internal PLL.
Frank
>
> Best regards,
> Alexander
>
> > osc_24m: clock-24m {
> > compatible = "fixed-clock";
> > #clock-cells = <0>;
> > @@ -1595,6 +1602,14 @@ usb3_dwc3: usb@4c100000 {
> > };
> > };
> >
> > + hsio_blk_ctl: syscon@4c0100c0 {
> > + compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> > + reg = <0x0 0x4c0100c0 0x0 0x1>;
> > + #clock-cells = <1>;
> > + clocks = <&clk_sys100m>;
> > + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> > + };
> > +
> > usb3_phy: phy@4c1f0040 {
> > compatible = "fsl,imx95-usb-phy", "fsl,imx8mp-usb-phy";
> > reg = <0x0 0x4c1f0040 0x0 0x40>,
> > @@ -1633,8 +1648,9 @@ pcie0: pcie@4c300000 {
> > clocks = <&scmi_clk IMX95_CLK_HSIO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> > - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> > + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> > + <&hsio_blk_ctl 0>;
> > + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> > @@ -1706,8 +1722,9 @@ pcie1: pcie@4c380000 {
> > clocks = <&scmi_clk IMX95_CLK_HSIO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> > - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> > + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> > + <&hsio_blk_ctl 0>;
> > + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
> > assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> > <&scmi_clk IMX95_CLK_HSIOPLL>,
> > <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> >
>
>
> --
> TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> Amtsgericht München, HRB 105018
> Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> http://www.tq-group.com/
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes
2025-02-25 17:08 [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes Frank Li
2025-02-26 8:30 ` Alexander Stein
@ 2025-03-11 2:50 ` Shawn Guo
1 sibling, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2025-03-11 2:50 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
On Tue, Feb 25, 2025 at 12:08:02PM -0500, Frank Li wrote:
> Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings:
> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
> from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
Applied, thanks!
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes
@ 2025-03-02 5:11 kernel test robot
0 siblings, 0 replies; 5+ messages in thread
From: kernel test robot @ 2025-03-02 5:11 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250225170802.2671972-1-Frank.Li@nxp.com>
References: <20250225170802.2671972-1-Frank.Li@nxp.com>
TO: Frank Li <Frank.Li@nxp.com>
TO: Rob Herring <robh@kernel.org>
TO: Krzysztof Kozlowski <krzk@kernel.org>
TO: Conor Dooley <conor+dt@kernel.org>
TO: Shawn Guo <shawnguo@kernel.org>
TO: Sascha Hauer <s.hauer@pengutronix.de>
TO: Pengutronix Kernel Team <kernel@pengutronix.de>
TO: Fabio Estevam <festevam@gmail.com>
TO: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>
TO: "open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" <imx@lists.linux.dev>
TO: "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" <linux-arm-kernel@lists.infradead.org>
TO: open list <linux-kernel@vger.kernel.org>
Hi Frank,
kernel test robot noticed the following build warnings:
[auto build test WARNING on shawnguo/for-next]
[also build test WARNING on next-20250228]
[cannot apply to krzk/for-next krzk-dt/for-next linus/master v6.14-rc4]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Frank-Li/arm64-dts-imx95-add-ref-clock-for-pcie-nodes/20250226-011210
base: https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
patch link: https://lore.kernel.org/r/20250225170802.2671972-1-Frank.Li%40nxp.com
patch subject: [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes
:::::: branch date: 5 days ago
:::::: commit date: 5 days ago
config: arm64-randconfig-051-20250227 (https://download.01.org/0day-ci/archive/20250302/202503021211.vj0unbai-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 14.2.0
dtschema version: 2025.3.dev3+gabf9328
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250302/202503021211.vj0unbai-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202503021211.vj0unbai-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c380000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml#
>> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
>> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
>> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clocks: [[27, 87], [27, 36], [27, 35], [27, 88], [73, 0]] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
>> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie-ep@4c380000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux', 'ref'] is too long
from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 5+ messages in thread
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2025-02-25 17:08 [PATCH v2 1/1] arm64: dts: imx95: add ref clock for pcie nodes Frank Li
2025-02-26 8:30 ` Alexander Stein
2025-02-26 16:32 ` Frank Li
2025-03-11 2:50 ` Shawn Guo
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2025-03-02 5:11 kernel test robot
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