From: Yao Zi <ziyao@disroot.org>
To: Jonas Karlman <jonas@kwiboo.se>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Frank Wang <frank.wang@rock-chips.com>,
Shresth Prasad <shresthprasad7@gmail.com>,
Cristian Ciocaltea <cristian.ciocaltea@collabora.com>,
Detlev Casanova <detlev.casanova@collabora.com>,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH 7/8] arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528
Date: Sat, 1 Mar 2025 13:33:15 +0000 [thread overview]
Message-ID: <Z8MMm7X31p_CrStZ@pie> (raw)
In-Reply-To: <9fd51bcb-3e6a-46b6-b1f7-ff16fa562d9e@kwiboo.se>
On Sat, Mar 01, 2025 at 01:47:47PM +0100, Jonas Karlman wrote:
> Hi,
>
> On 2025-03-01 11:47, Yao Zi wrote:
> > RK3528 features two SDIO controllers and one SD/MMC controller, describe
> > them in devicetree. Since their sample and drive clocks are located in
> > the VO and VPU GRFs, corresponding syscons are added to make these
> > clocks available.
> >
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> > arch/arm64/boot/dts/rockchip/rk3528.dtsi | 62 ++++++++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > index 5b334690356a..078c97fa1d9f 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > @@ -7,6 +7,7 @@
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/interrupt-controller/irq.h>
> > #include <dt-bindings/clock/rockchip,rk3528-cru.h>
> > +#include <dt-bindings/reset/rockchip,rk3528-cru.h>
> >
> > / {
> > compatible = "rockchip,rk3528";
> > @@ -122,6 +123,16 @@ gic: interrupt-controller@fed01000 {
> > #interrupt-cells = <3>;
> > };
> >
> > + vpu_grf: syscon@ff340000 {
> > + compatible = "rockchip,rk3528-vpu-grf", "syscon";
>
> vpu_grf is also used for gmac1, so should possible be a "syscon",
> "simple-mfd", or have I misunderstood when to use simple-mfd ?
Just as Heiko explained, "simple-mfd" is only required when the child
nodes should be populated automatically. Here these two GRFs are only
referenced and have no child, thus "simple-mfd" compatible isn't useful.
> > + reg = <0x0 0xff340000 0x0 0x8000>;
> > + };
> > +
> > + vo_grf: syscon@ff360000 {
> > + compatible = "rockchip,rk3528-vo-grf", "syscon";
>
> similar here, vo_grf is also used for gmac0.
>
> > + reg = <0x0 0xff360000 0x0 0x10000>;
> > + };
> > +
> > cru: clock-controller@ff4a0000 {
> > compatible = "rockchip,rk3528-cru";
> > reg = <0x0 0xff4a0000 0x0 0x30000>;
> > @@ -251,5 +262,56 @@ uart7: serial@ffa28000 {
> > reg-shift = <2>;
> > status = "disabled";
> > };
> > +
> > + sdio0: mmc@ffc10000 {
> > + compatible = "rockchip,rk3528-dw-mshc",
> > + "rockchip,rk3288-dw-mshc";
> > + reg = <0x0 0xffc10000 0x0 0x4000>;
> > + clocks = <&cru HCLK_SDIO0>,
> > + <&cru CCLK_SRC_SDIO0>,
> > + <&cru SCLK_SDIO0_DRV>,
> > + <&cru SCLK_SDIO0_SAMPLE>;
> > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
> > + fifo-depth = <0x100>;
> > + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
> > + max-frequency = <150000000>;
> > + resets = <&cru SRST_H_SDIO0>;
> > + reset-names = "reset";
> > + status = "disabled";
> > + };
> > +
> > + sdio1: mmc@ffc20000 {
> > + compatible = "rockchip,rk3528-dw-mshc",
> > + "rockchip,rk3288-dw-mshc";
> > + reg = <0x0 0xffc20000 0x0 0x4000>;
> > + clocks = <&cru HCLK_SDIO1>,
> > + <&cru CCLK_SRC_SDIO1>,
> > + <&cru SCLK_SDIO1_DRV>,
> > + <&cru SCLK_SDIO1_SAMPLE>;
> > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
> > + fifo-depth = <0x100>;
> > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> > + max-frequency = <150000000>;
> > + resets = <&cru SRST_H_SDIO1>;
> > + reset-names = "reset";
> > + status = "disabled";
> > + };
> > +
> > + sdmmc: mmc@ffc30000 {
> > + compatible = "rockchip,rk3528-dw-mshc",
> > + "rockchip,rk3288-dw-mshc";
> > + reg = <0x0 0xffc30000 0x0 0x4000>;
> > + clocks = <&cru HCLK_SDMMC0>,
> > + <&cru CCLK_SRC_SDMMC0>,
> > + <&cru SCLK_SDMMC_DRV>,
> > + <&cru SCLK_SDMMC_SAMPLE>;
> > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
> > + fifo-depth = <0x100>;
> > + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> > + max-frequency = <150000000>;
> > + resets = <&cru SRST_H_SDMMC0>;
> > + reset-names = "reset";
>
> Suggest adding default pinctrl props here:
>
> pinctrl-names = "default";
> pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_det>;
>
> And possible also for sdio0 and sdio1.
>
> Regards,
> Jonas
It makes sense. As mentioned in the cover letter, I depended on the
bootloader to setup pinctrl, to minimize dependency of the series.
Will complete the pinctrl properties in next version.
> > + status = "disabled";
> > + };
> > };
> > };
>
Best regards,
Yao Zi
WARNING: multiple messages have this Message-ID (diff)
From: Yao Zi <ziyao@disroot.org>
To: Jonas Karlman <jonas@kwiboo.se>
Cc: Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Detlev Casanova <detlev.casanova@collabora.com>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-mmc@vger.kernel.org, Ulf Hansson <ulf.hansson@linaro.org>,
linux-kernel@vger.kernel.org,
Frank Wang <frank.wang@rock-chips.com>,
devicetree@vger.kernel.org,
Shresth Prasad <shresthprasad7@gmail.com>,
linux-rockchip@lists.infradead.org,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 7/8] arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528
Date: Sat, 1 Mar 2025 13:33:15 +0000 [thread overview]
Message-ID: <Z8MMm7X31p_CrStZ@pie> (raw)
In-Reply-To: <9fd51bcb-3e6a-46b6-b1f7-ff16fa562d9e@kwiboo.se>
On Sat, Mar 01, 2025 at 01:47:47PM +0100, Jonas Karlman wrote:
> Hi,
>
> On 2025-03-01 11:47, Yao Zi wrote:
> > RK3528 features two SDIO controllers and one SD/MMC controller, describe
> > them in devicetree. Since their sample and drive clocks are located in
> > the VO and VPU GRFs, corresponding syscons are added to make these
> > clocks available.
> >
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> > arch/arm64/boot/dts/rockchip/rk3528.dtsi | 62 ++++++++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > index 5b334690356a..078c97fa1d9f 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > @@ -7,6 +7,7 @@
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/interrupt-controller/irq.h>
> > #include <dt-bindings/clock/rockchip,rk3528-cru.h>
> > +#include <dt-bindings/reset/rockchip,rk3528-cru.h>
> >
> > / {
> > compatible = "rockchip,rk3528";
> > @@ -122,6 +123,16 @@ gic: interrupt-controller@fed01000 {
> > #interrupt-cells = <3>;
> > };
> >
> > + vpu_grf: syscon@ff340000 {
> > + compatible = "rockchip,rk3528-vpu-grf", "syscon";
>
> vpu_grf is also used for gmac1, so should possible be a "syscon",
> "simple-mfd", or have I misunderstood when to use simple-mfd ?
Just as Heiko explained, "simple-mfd" is only required when the child
nodes should be populated automatically. Here these two GRFs are only
referenced and have no child, thus "simple-mfd" compatible isn't useful.
> > + reg = <0x0 0xff340000 0x0 0x8000>;
> > + };
> > +
> > + vo_grf: syscon@ff360000 {
> > + compatible = "rockchip,rk3528-vo-grf", "syscon";
>
> similar here, vo_grf is also used for gmac0.
>
> > + reg = <0x0 0xff360000 0x0 0x10000>;
> > + };
> > +
> > cru: clock-controller@ff4a0000 {
> > compatible = "rockchip,rk3528-cru";
> > reg = <0x0 0xff4a0000 0x0 0x30000>;
> > @@ -251,5 +262,56 @@ uart7: serial@ffa28000 {
> > reg-shift = <2>;
> > status = "disabled";
> > };
> > +
> > + sdio0: mmc@ffc10000 {
> > + compatible = "rockchip,rk3528-dw-mshc",
> > + "rockchip,rk3288-dw-mshc";
> > + reg = <0x0 0xffc10000 0x0 0x4000>;
> > + clocks = <&cru HCLK_SDIO0>,
> > + <&cru CCLK_SRC_SDIO0>,
> > + <&cru SCLK_SDIO0_DRV>,
> > + <&cru SCLK_SDIO0_SAMPLE>;
> > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
> > + fifo-depth = <0x100>;
> > + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
> > + max-frequency = <150000000>;
> > + resets = <&cru SRST_H_SDIO0>;
> > + reset-names = "reset";
> > + status = "disabled";
> > + };
> > +
> > + sdio1: mmc@ffc20000 {
> > + compatible = "rockchip,rk3528-dw-mshc",
> > + "rockchip,rk3288-dw-mshc";
> > + reg = <0x0 0xffc20000 0x0 0x4000>;
> > + clocks = <&cru HCLK_SDIO1>,
> > + <&cru CCLK_SRC_SDIO1>,
> > + <&cru SCLK_SDIO1_DRV>,
> > + <&cru SCLK_SDIO1_SAMPLE>;
> > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
> > + fifo-depth = <0x100>;
> > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> > + max-frequency = <150000000>;
> > + resets = <&cru SRST_H_SDIO1>;
> > + reset-names = "reset";
> > + status = "disabled";
> > + };
> > +
> > + sdmmc: mmc@ffc30000 {
> > + compatible = "rockchip,rk3528-dw-mshc",
> > + "rockchip,rk3288-dw-mshc";
> > + reg = <0x0 0xffc30000 0x0 0x4000>;
> > + clocks = <&cru HCLK_SDMMC0>,
> > + <&cru CCLK_SRC_SDMMC0>,
> > + <&cru SCLK_SDMMC_DRV>,
> > + <&cru SCLK_SDMMC_SAMPLE>;
> > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
> > + fifo-depth = <0x100>;
> > + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> > + max-frequency = <150000000>;
> > + resets = <&cru SRST_H_SDMMC0>;
> > + reset-names = "reset";
>
> Suggest adding default pinctrl props here:
>
> pinctrl-names = "default";
> pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_det>;
>
> And possible also for sdio0 and sdio1.
>
> Regards,
> Jonas
It makes sense. As mentioned in the cover letter, I depended on the
bootloader to setup pinctrl, to minimize dependency of the series.
Will complete the pinctrl properties in next version.
> > + status = "disabled";
> > + };
> > };
> > };
>
Best regards,
Yao Zi
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-03-01 13:35 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-01 10:42 [PATCH 0/8] Support SD/SDIO controllers on RK3528 Yao Zi
2025-03-01 10:42 ` Yao Zi
2025-03-01 10:42 ` [PATCH 1/8] dt-bindings: soc: rockchip: Add RK3528 VO GRF syscon Yao Zi
2025-03-01 10:42 ` Yao Zi
2025-03-03 15:07 ` Rob Herring (Arm)
2025-03-03 15:07 ` Rob Herring (Arm)
2025-03-01 10:42 ` [PATCH 2/8] dt-bindings: soc: rockchip: Add RK3528 VPU " Yao Zi
2025-03-01 10:42 ` Yao Zi
2025-03-03 15:08 ` Rob Herring (Arm)
2025-03-03 15:08 ` Rob Herring (Arm)
2025-03-01 10:42 ` [PATCH 3/8] dt-bindings: mmc: rockchip-dw-mshc: Add compatible string for RK3528 Yao Zi
2025-03-01 10:42 ` Yao Zi
2025-03-03 15:08 ` Rob Herring (Arm)
2025-03-03 15:08 ` Rob Herring (Arm)
2025-03-01 10:42 ` [PATCH 4/8] dt-bindings: clock: Add GRF clock definition " Yao Zi
2025-03-01 10:42 ` Yao Zi
2025-03-01 10:46 ` [PATCH 5/8] clk: rockchip: Support MMC clocks in GRF region Yao Zi
2025-03-01 10:46 ` Yao Zi
2025-03-01 10:47 ` [PATCH 6/8] clk: rockchip: rk3528: Add SD/SDIO tuning " Yao Zi
2025-03-01 10:47 ` Yao Zi
2025-03-05 10:00 ` Chukun Pan
2025-03-05 10:00 ` Chukun Pan
2025-03-05 10:21 ` Heiko Stübner
2025-03-05 10:21 ` Heiko Stübner
2025-03-05 10:49 ` Yao Zi
2025-03-05 10:49 ` Yao Zi
2025-03-01 10:47 ` [PATCH 7/8] arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528 Yao Zi
2025-03-01 10:47 ` Yao Zi
2025-03-01 12:47 ` Jonas Karlman
2025-03-01 12:47 ` Jonas Karlman
2025-03-01 12:55 ` Heiko Stübner
2025-03-01 12:55 ` Heiko Stübner
2025-03-02 11:01 ` Jonas Karlman
2025-03-02 11:01 ` Jonas Karlman
2025-03-01 13:33 ` Yao Zi [this message]
2025-03-01 13:33 ` Yao Zi
2025-03-02 11:33 ` Jonas Karlman
2025-03-02 11:33 ` Jonas Karlman
2025-03-01 10:48 ` [PATCH 8/8] arm64: dts: rockchip: Enable SD-card interface on Radxa E20C Yao Zi
2025-03-01 10:48 ` Yao Zi
2025-03-01 13:01 ` Jonas Karlman
2025-03-01 13:01 ` Jonas Karlman
2025-03-01 15:15 ` Yao Zi
2025-03-01 15:15 ` Yao Zi
2025-03-02 11:56 ` Jonas Karlman
2025-03-02 11:56 ` Jonas Karlman
2025-03-02 16:16 ` Yao Zi
2025-03-02 16:16 ` Yao Zi
2025-03-04 12:10 ` Chukun Pan
2025-03-04 12:10 ` Chukun Pan
2025-03-04 19:49 ` Yao Zi
2025-03-04 19:49 ` Yao Zi
2025-03-04 19:55 ` Jonas Karlman
2025-03-04 19:55 ` Jonas Karlman
2025-03-04 20:02 ` Yao Zi
2025-03-04 20:02 ` Yao Zi
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