From: Haylen Chu <heylenay@4d2.org>
To: Inochi Amaoto <inochiama@gmail.com>, Yixun Lan <dlan@gentoo.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Haylen Chu <heylenay@outlook.com>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
spacemit@lists.linux.dev, Inochi Amaoto <inochiama@outlook.com>,
Chen Wang <unicornxdotw@foxmail.com>,
Jisheng Zhang <jszhang@kernel.org>,
Meng Zhang <zhangmeng.kevin@linux.spacemit.com>
Subject: Re: [PATCH v5 3/5] clk: spacemit: Add clock support for Spacemit K1 SoC
Date: Sun, 23 Mar 2025 08:55:28 +0000 [thread overview]
Message-ID: <Z9_MgAZE53eQ-FV8@ketchup> (raw)
In-Reply-To: <xwo2jjqy634z4rimgyrbjmxlgzxzauxmqzl57qr5oasph74qwj@7we45fnhwfzh>
On Tue, Mar 18, 2025 at 01:43:52PM +0800, Inochi Amaoto wrote:
> On Tue, Mar 18, 2025 at 05:37:36AM +0000, Yixun Lan wrote:
> > Hi Haylen Chu:
> >
> > On 17:57 Thu 06 Mar , Haylen Chu wrote:
> > > The clock tree of K1 SoC contains three main types of clock hardware
> > > (PLL/DDN/MIX) and has control registers split into several multifunction
> > > devices: APBS (PLLs), MPMU, APBC and APMU.
> > >
> > > All register operations are done through regmap to ensure atomiciy
> > > between concurrent operations of clock driver and reset,
> > > power-domain driver that will be introduced in the future.
> > >
> > > Signed-off-by: Haylen Chu <heylenay@4d2.org>
> > > ---
> > > drivers/clk/Kconfig | 1 +
> > > drivers/clk/Makefile | 1 +
> > > drivers/clk/spacemit/Kconfig | 20 +
> > > drivers/clk/spacemit/Makefile | 5 +
> > > drivers/clk/spacemit/ccu-k1.c | 1714 +++++++++++++++++++++++++++++
> > > drivers/clk/spacemit/ccu_common.h | 47 +
> > > drivers/clk/spacemit/ccu_ddn.c | 80 ++
> > > drivers/clk/spacemit/ccu_ddn.h | 48 +
> > > drivers/clk/spacemit/ccu_mix.c | 284 +++++
> > > drivers/clk/spacemit/ccu_mix.h | 246 +++++
> > > drivers/clk/spacemit/ccu_pll.c | 146 +++
> > > drivers/clk/spacemit/ccu_pll.h | 76 ++
> > > 12 files changed, 2668 insertions(+)
> > > create mode 100644 drivers/clk/spacemit/Kconfig
> > > create mode 100644 drivers/clk/spacemit/Makefile
> > > create mode 100644 drivers/clk/spacemit/ccu-k1.c
> > > create mode 100644 drivers/clk/spacemit/ccu_common.h
> > > create mode 100644 drivers/clk/spacemit/ccu_ddn.c
> > > create mode 100644 drivers/clk/spacemit/ccu_ddn.h
> > > create mode 100644 drivers/clk/spacemit/ccu_mix.c
> > > create mode 100644 drivers/clk/spacemit/ccu_mix.h
> > > create mode 100644 drivers/clk/spacemit/ccu_pll.c
> > > create mode 100644 drivers/clk/spacemit/ccu_pll.h
> > >
> > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> > > index 713573b6c86c..19c1ed280fd7 100644
> > > --- a/drivers/clk/Kconfig
> > > +++ b/drivers/clk/Kconfig
> > > @@ -517,6 +517,7 @@ source "drivers/clk/samsung/Kconfig"
> > > source "drivers/clk/sifive/Kconfig"
> > > source "drivers/clk/socfpga/Kconfig"
> > > source "drivers/clk/sophgo/Kconfig"
> > > +source "drivers/clk/spacemit/Kconfig"
> > > source "drivers/clk/sprd/Kconfig"
> > > source "drivers/clk/starfive/Kconfig"
> > > source "drivers/clk/sunxi/Kconfig"
> > > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> > > index bf4bd45adc3a..42867cd37c33 100644
> > > --- a/drivers/clk/Makefile
> > > +++ b/drivers/clk/Makefile
> > > @@ -145,6 +145,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
> > > obj-$(CONFIG_CLK_SIFIVE) += sifive/
> > > obj-y += socfpga/
> > > obj-y += sophgo/
> > > +obj-y += spacemit/
> > > obj-$(CONFIG_PLAT_SPEAR) += spear/
> > > obj-y += sprd/
> > > obj-$(CONFIG_ARCH_STI) += st/
> > > diff --git a/drivers/clk/spacemit/Kconfig b/drivers/clk/spacemit/Kconfig
> > > new file mode 100644
> > > index 000000000000..76090cd85668
> > > --- /dev/null
> > > +++ b/drivers/clk/spacemit/Kconfig
> > > @@ -0,0 +1,20 @@
> > > +# SPDX-License-Identifier: GPL-2.0-only
> > > +
Hi Inochi, Yixun,
> > > +config SPACEMIT_CCU
> > > + tristate "Clock support for Spacemit SoCs"
> > > + default y
> > similar reason to pinctrl with these patches [1], [2]
> > I'd suggest switch to "bool + default ARCH_SPACEMIT"
> >
> > Link: https://lore.kernel.org/all/20250218-k1-pinctrl-option-v3-1-36e031e0da1b@gentoo.org [1]
> > Link: https://lore.kernel.org/all/6881b8d1ad74ac780af8a974e604b5ef3f5d4aad.1742198691.git.geert+renesas@glider.be [2]
> >
>
> Clk subsystem prefers no defalt and set it in defconfig,
> so should no default there.
Thanks for these hints, I will drop default and set the configuration in
defconfig, in which case it seems okay to keep it as bool.
> Regards,
> Inochi
Thanks,
Haylen Chu
WARNING: multiple messages have this Message-ID (diff)
From: Haylen Chu <heylenay@4d2.org>
To: Inochi Amaoto <inochiama@gmail.com>, Yixun Lan <dlan@gentoo.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Haylen Chu <heylenay@outlook.com>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
spacemit@lists.linux.dev, Inochi Amaoto <inochiama@outlook.com>,
Chen Wang <unicornxdotw@foxmail.com>,
Jisheng Zhang <jszhang@kernel.org>,
Meng Zhang <zhangmeng.kevin@linux.spacemit.com>
Subject: Re: [PATCH v5 3/5] clk: spacemit: Add clock support for Spacemit K1 SoC
Date: Sun, 23 Mar 2025 08:55:28 +0000 [thread overview]
Message-ID: <Z9_MgAZE53eQ-FV8@ketchup> (raw)
In-Reply-To: <xwo2jjqy634z4rimgyrbjmxlgzxzauxmqzl57qr5oasph74qwj@7we45fnhwfzh>
On Tue, Mar 18, 2025 at 01:43:52PM +0800, Inochi Amaoto wrote:
> On Tue, Mar 18, 2025 at 05:37:36AM +0000, Yixun Lan wrote:
> > Hi Haylen Chu:
> >
> > On 17:57 Thu 06 Mar , Haylen Chu wrote:
> > > The clock tree of K1 SoC contains three main types of clock hardware
> > > (PLL/DDN/MIX) and has control registers split into several multifunction
> > > devices: APBS (PLLs), MPMU, APBC and APMU.
> > >
> > > All register operations are done through regmap to ensure atomiciy
> > > between concurrent operations of clock driver and reset,
> > > power-domain driver that will be introduced in the future.
> > >
> > > Signed-off-by: Haylen Chu <heylenay@4d2.org>
> > > ---
> > > drivers/clk/Kconfig | 1 +
> > > drivers/clk/Makefile | 1 +
> > > drivers/clk/spacemit/Kconfig | 20 +
> > > drivers/clk/spacemit/Makefile | 5 +
> > > drivers/clk/spacemit/ccu-k1.c | 1714 +++++++++++++++++++++++++++++
> > > drivers/clk/spacemit/ccu_common.h | 47 +
> > > drivers/clk/spacemit/ccu_ddn.c | 80 ++
> > > drivers/clk/spacemit/ccu_ddn.h | 48 +
> > > drivers/clk/spacemit/ccu_mix.c | 284 +++++
> > > drivers/clk/spacemit/ccu_mix.h | 246 +++++
> > > drivers/clk/spacemit/ccu_pll.c | 146 +++
> > > drivers/clk/spacemit/ccu_pll.h | 76 ++
> > > 12 files changed, 2668 insertions(+)
> > > create mode 100644 drivers/clk/spacemit/Kconfig
> > > create mode 100644 drivers/clk/spacemit/Makefile
> > > create mode 100644 drivers/clk/spacemit/ccu-k1.c
> > > create mode 100644 drivers/clk/spacemit/ccu_common.h
> > > create mode 100644 drivers/clk/spacemit/ccu_ddn.c
> > > create mode 100644 drivers/clk/spacemit/ccu_ddn.h
> > > create mode 100644 drivers/clk/spacemit/ccu_mix.c
> > > create mode 100644 drivers/clk/spacemit/ccu_mix.h
> > > create mode 100644 drivers/clk/spacemit/ccu_pll.c
> > > create mode 100644 drivers/clk/spacemit/ccu_pll.h
> > >
> > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> > > index 713573b6c86c..19c1ed280fd7 100644
> > > --- a/drivers/clk/Kconfig
> > > +++ b/drivers/clk/Kconfig
> > > @@ -517,6 +517,7 @@ source "drivers/clk/samsung/Kconfig"
> > > source "drivers/clk/sifive/Kconfig"
> > > source "drivers/clk/socfpga/Kconfig"
> > > source "drivers/clk/sophgo/Kconfig"
> > > +source "drivers/clk/spacemit/Kconfig"
> > > source "drivers/clk/sprd/Kconfig"
> > > source "drivers/clk/starfive/Kconfig"
> > > source "drivers/clk/sunxi/Kconfig"
> > > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> > > index bf4bd45adc3a..42867cd37c33 100644
> > > --- a/drivers/clk/Makefile
> > > +++ b/drivers/clk/Makefile
> > > @@ -145,6 +145,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
> > > obj-$(CONFIG_CLK_SIFIVE) += sifive/
> > > obj-y += socfpga/
> > > obj-y += sophgo/
> > > +obj-y += spacemit/
> > > obj-$(CONFIG_PLAT_SPEAR) += spear/
> > > obj-y += sprd/
> > > obj-$(CONFIG_ARCH_STI) += st/
> > > diff --git a/drivers/clk/spacemit/Kconfig b/drivers/clk/spacemit/Kconfig
> > > new file mode 100644
> > > index 000000000000..76090cd85668
> > > --- /dev/null
> > > +++ b/drivers/clk/spacemit/Kconfig
> > > @@ -0,0 +1,20 @@
> > > +# SPDX-License-Identifier: GPL-2.0-only
> > > +
Hi Inochi, Yixun,
> > > +config SPACEMIT_CCU
> > > + tristate "Clock support for Spacemit SoCs"
> > > + default y
> > similar reason to pinctrl with these patches [1], [2]
> > I'd suggest switch to "bool + default ARCH_SPACEMIT"
> >
> > Link: https://lore.kernel.org/all/20250218-k1-pinctrl-option-v3-1-36e031e0da1b@gentoo.org [1]
> > Link: https://lore.kernel.org/all/6881b8d1ad74ac780af8a974e604b5ef3f5d4aad.1742198691.git.geert+renesas@glider.be [2]
> >
>
> Clk subsystem prefers no defalt and set it in defconfig,
> so should no default there.
Thanks for these hints, I will drop default and set the configuration in
defconfig, in which case it seems okay to keep it as bool.
> Regards,
> Inochi
Thanks,
Haylen Chu
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linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2025-03-23 9:14 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-06 17:57 [PATCH v5 0/5] Add clock controller support for SpacemiT K1 Haylen Chu
2025-03-06 17:57 ` Haylen Chu
2025-03-06 17:57 ` [PATCH v5 1/5] dt-bindings: soc: spacemit: Add spacemit,k1-syscon Haylen Chu
2025-03-06 17:57 ` Haylen Chu
2025-03-07 8:16 ` Krzysztof Kozlowski
2025-03-07 8:16 ` Krzysztof Kozlowski
2025-03-06 17:57 ` [PATCH v5 2/5] dt-bindings: clock: spacemit: Add spacemit,k1-pll Haylen Chu
2025-03-06 17:57 ` Haylen Chu
2025-03-07 0:29 ` Yixun Lan
2025-03-07 0:29 ` Yixun Lan
2025-03-07 6:34 ` Haylen Chu
2025-03-07 6:34 ` Haylen Chu
2025-03-07 8:20 ` Krzysztof Kozlowski
2025-03-07 8:20 ` Krzysztof Kozlowski
2025-03-07 8:19 ` Krzysztof Kozlowski
2025-03-07 8:19 ` Krzysztof Kozlowski
2025-03-06 17:57 ` [PATCH v5 3/5] clk: spacemit: Add clock support for Spacemit K1 SoC Haylen Chu
2025-03-06 17:57 ` Haylen Chu
2025-03-07 0:51 ` Yixun Lan
2025-03-07 0:51 ` Yixun Lan
2025-03-07 6:42 ` Haylen Chu
2025-03-07 6:42 ` Haylen Chu
2025-03-07 8:26 ` Krzysztof Kozlowski
2025-03-07 8:26 ` Krzysztof Kozlowski
2025-03-11 23:19 ` Alex Elder
2025-03-11 23:19 ` Alex Elder
2025-03-20 22:39 ` Alex Elder
2025-03-20 22:39 ` Alex Elder
2025-03-24 11:14 ` Haylen Chu
2025-03-24 11:14 ` Haylen Chu
2025-03-28 14:00 ` Alex Elder
2025-03-28 14:00 ` Alex Elder
2025-03-29 10:21 ` Haylen Chu
2025-03-29 10:21 ` Haylen Chu
2025-03-12 20:17 ` kernel test robot
2025-03-12 20:17 ` kernel test robot
2025-03-18 5:37 ` Yixun Lan
2025-03-18 5:37 ` Yixun Lan
2025-03-18 5:43 ` Inochi Amaoto
2025-03-18 5:43 ` Inochi Amaoto
2025-03-23 8:55 ` Haylen Chu [this message]
2025-03-23 8:55 ` Haylen Chu
2025-03-06 17:57 ` [PATCH v5 4/5] clk: spacemit: k1: Add TWSI8 bus and function clocks Haylen Chu
2025-03-06 17:57 ` Haylen Chu
2025-03-07 6:30 ` Haylen Chu
2025-03-07 6:30 ` Haylen Chu
2025-03-06 17:57 ` [PATCH v5 5/5] riscv: dts: spacemit: Add clock tree for Spacemit K1 Haylen Chu
2025-03-06 17:57 ` Haylen Chu
2025-03-07 1:55 ` Inochi Amaoto
2025-03-07 1:55 ` Inochi Amaoto
2025-03-07 6:28 ` Haylen Chu
2025-03-07 6:28 ` Haylen Chu
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