From: andy.shevchenko@gmail.com
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "Chester Lin" <clin@suse.com>, "Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Andreas Färber" <afaerber@suse.de>,
s32@nxp.com, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
"Larisa Grigore" <larisa.grigore@nxp.com>,
"Ghennadi Procopciuc" <Ghennadi.Procopciuc@oss.nxp.com>,
"Andrei Stefanescu" <andrei.stefanescu@nxp.com>,
"Radu Pirea" <radu-nicolae.pirea@nxp.com>,
"Matthias Brugger" <mbrugger@suse.com>
Subject: Re: [PATCH v5 0/3] Add pinctrl support for S32 SoC family
Date: Tue, 7 Mar 2023 01:28:37 +0200 [thread overview]
Message-ID: <ZAZ3JZQ4Tuz5vyH1@surfacebook> (raw)
In-Reply-To: <CACRpkdYknZo3Q7_CeSkOL2XwwAmKERskx24o-toaVy=rs0Yf5Q@mail.gmail.com>
Mon, Mar 06, 2023 at 02:28:56PM +0100, Linus Walleij kirjoitti:
> On Mon, Feb 20, 2023 at 3:33 AM Chester Lin <clin@suse.com> wrote:
>
> > Here I want to introduce a new patch series, which aims to support IOMUX
> > functions provided by SIUL2 [System Integration Unit Lite2] on S32 SoCs,
> > such as S32G2. This series is originally from NXP's implementation on
> > nxp-auto-linux repo[1] and it will be required by upstream kernel for
> > supporting a variety of devices on S32 SoCs which need to config PINMUXs,
> > such as PHYs and MAC controllers.
> >
> > Thanks,
> > Chester
> >
> > Changes in v5:
> > - dt-bindings: No change
> > - driver:
> > - Refactor register r/w access based on REGMAP_MMIO and regmap APIs.
> > - Tag PM functions with '__maybe_unused'.
> > - Add mask check while parsing pin ID from a pinmux value.
> > - Simplify s32_pinconf_mscr_* functions.
>
> This looks really good any no more comments arrived, so patches are applied
> for v6.4!
>
> Thanks for your work on this so far Chester! (I suppose there will be
> maintenance
> for this family going forward.)
Can you unpull this?
--
With Best Regards,
Andy Shevchenko
WARNING: multiple messages have this Message-ID (diff)
From: andy.shevchenko@gmail.com
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "Chester Lin" <clin@suse.com>, "Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Andreas Färber" <afaerber@suse.de>,
s32@nxp.com, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
"Larisa Grigore" <larisa.grigore@nxp.com>,
"Ghennadi Procopciuc" <Ghennadi.Procopciuc@oss.nxp.com>,
"Andrei Stefanescu" <andrei.stefanescu@nxp.com>,
"Radu Pirea" <radu-nicolae.pirea@nxp.com>,
"Matthias Brugger" <mbrugger@suse.com>
Subject: Re: [PATCH v5 0/3] Add pinctrl support for S32 SoC family
Date: Tue, 7 Mar 2023 01:28:37 +0200 [thread overview]
Message-ID: <ZAZ3JZQ4Tuz5vyH1@surfacebook> (raw)
In-Reply-To: <CACRpkdYknZo3Q7_CeSkOL2XwwAmKERskx24o-toaVy=rs0Yf5Q@mail.gmail.com>
Mon, Mar 06, 2023 at 02:28:56PM +0100, Linus Walleij kirjoitti:
> On Mon, Feb 20, 2023 at 3:33 AM Chester Lin <clin@suse.com> wrote:
>
> > Here I want to introduce a new patch series, which aims to support IOMUX
> > functions provided by SIUL2 [System Integration Unit Lite2] on S32 SoCs,
> > such as S32G2. This series is originally from NXP's implementation on
> > nxp-auto-linux repo[1] and it will be required by upstream kernel for
> > supporting a variety of devices on S32 SoCs which need to config PINMUXs,
> > such as PHYs and MAC controllers.
> >
> > Thanks,
> > Chester
> >
> > Changes in v5:
> > - dt-bindings: No change
> > - driver:
> > - Refactor register r/w access based on REGMAP_MMIO and regmap APIs.
> > - Tag PM functions with '__maybe_unused'.
> > - Add mask check while parsing pin ID from a pinmux value.
> > - Simplify s32_pinconf_mscr_* functions.
>
> This looks really good any no more comments arrived, so patches are applied
> for v6.4!
>
> Thanks for your work on this so far Chester! (I suppose there will be
> maintenance
> for this family going forward.)
Can you unpull this?
--
With Best Regards,
Andy Shevchenko
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next prev parent reply other threads:[~2023-03-06 23:28 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-20 2:33 [PATCH v5 0/3] Add pinctrl support for S32 SoC family Chester Lin
2023-02-20 2:33 ` Chester Lin
2023-02-20 2:33 ` [PATCH v5 1/3] dt-bindings: pinctrl: add schema for NXP S32 SoCs Chester Lin
2023-02-20 2:33 ` Chester Lin
2023-02-20 2:33 ` [PATCH v5 2/3] pinctrl: add NXP S32 SoC family support Chester Lin
2023-02-20 2:33 ` Chester Lin
2023-03-06 23:28 ` andy.shevchenko
2023-03-06 23:28 ` andy.shevchenko
2023-03-08 5:03 ` Chester Lin
2023-03-08 5:03 ` Chester Lin
2023-03-08 5:21 ` Chester Lin
2023-03-08 5:21 ` Chester Lin
2023-03-08 13:21 ` Andy Shevchenko
2023-03-08 13:21 ` Andy Shevchenko
2023-03-08 16:42 ` Chester Lin
2023-03-08 16:42 ` Chester Lin
2023-03-08 17:04 ` Chester Lin
2023-03-08 17:04 ` Chester Lin
2023-03-09 12:50 ` Andy Shevchenko
2023-03-09 12:50 ` Andy Shevchenko
2023-02-20 2:33 ` [PATCH v5 3/3] MAINTAINERS: Add NXP S32 pinctrl maintainer and reviewer Chester Lin
2023-02-20 2:33 ` Chester Lin
2023-03-06 13:28 ` [PATCH v5 0/3] Add pinctrl support for S32 SoC family Linus Walleij
2023-03-06 13:28 ` Linus Walleij
2023-03-06 23:28 ` andy.shevchenko [this message]
2023-03-06 23:28 ` andy.shevchenko
2023-03-07 9:22 ` Linus Walleij
2023-03-07 9:22 ` Linus Walleij
2023-03-07 9:55 ` Andy Shevchenko
2023-03-07 9:55 ` Andy Shevchenko
2023-03-07 12:49 ` Linus Walleij
2023-03-07 12:49 ` Linus Walleij
2023-03-07 13:09 ` Chester Lin
2023-03-07 13:09 ` Chester Lin
2023-03-07 14:53 ` Chester Lin
2023-03-07 14:53 ` Chester Lin
2023-03-07 18:35 ` Andy Shevchenko
2023-03-07 18:35 ` Andy Shevchenko
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