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From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: arinc9.unal@gmail.com
Cc: "Sean Wang" <sean.wang@mediatek.com>,
	"Landen Chao" <Landen.Chao@mediatek.com>,
	"DENG Qingfang" <dqfext@gmail.com>,
	"Daniel Golle" <daniel@makrotopia.org>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"Vladimir Oltean" <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Arınç ÜNAL" <arinc.unal@arinc9.com>,
	erkin.bozoglu@xeront.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [RFC PATCH net-next] net: dsa: mt7530: fix port specifications for MT7988
Date: Thu, 6 Apr 2023 12:07:01 +0100	[thread overview]
Message-ID: <ZC6n1XAGyZFlxyXx@shell.armlinux.org.uk> (raw)
In-Reply-To: <20230406100445.52915-1-arinc.unal@arinc9.com>

On Thu, Apr 06, 2023 at 01:04:45PM +0300, arinc9.unal@gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> On the switch on the MT7988 SoC, there are only 4 PHYs. There's only port 6
> as the CPU port, there's no port 5. Split the switch statement with a check
> to enforce these for the switch on the MT7988 SoC. The internal phy-mode is
> specific to MT7988 so put it for MT7988 only.
> 
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---
> 
> Daniel, this is based on the information you provided me about the switch.
> I will add this to my current patch series if it looks good to you.
> 
> Arınç
> 
> ---
>  drivers/net/dsa/mt7530.c | 67 ++++++++++++++++++++++++++--------------
>  1 file changed, 43 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
> index 6fbbdcb5987f..f167fa135ef1 100644
> --- a/drivers/net/dsa/mt7530.c
> +++ b/drivers/net/dsa/mt7530.c
> @@ -2548,7 +2548,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port,
>  	phy_interface_zero(config->supported_interfaces);
>  
>  	switch (port) {
> -	case 0 ... 4: /* Internal phy */
> +	case 0 ... 3: /* Internal phy */
>  		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
>  			  config->supported_interfaces);
>  		break;
> @@ -2710,37 +2710,56 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
>  	struct mt7530_priv *priv = ds->priv;
>  	u32 mcr_cur, mcr_new;
>  
> -	switch (port) {
> -	case 0 ... 4: /* Internal phy */
> -		if (state->interface != PHY_INTERFACE_MODE_GMII &&
> -		    state->interface != PHY_INTERFACE_MODE_INTERNAL)
> -			goto unsupported;
> -		break;
> -	case 5: /* Port 5, a CPU port. */
> -		if (priv->p5_interface == state->interface)
> +	if (priv->id == ID_MT7988) {
> +		switch (port) {
> +		case 0 ... 3: /* Internal phy */
> +			if (state->interface != PHY_INTERFACE_MODE_INTERNAL)

How do these end up with PHY_INTERFACE_MODE_INTERNAL ? phylib defaults
to GMII mode without something else being specified in DT.

Also note that you should *not* be validating state->interface in the
mac_config() method because it's way too late to reject it - if you get
an unsupported interface here, then that is down to the get_caps()
method being buggy. Only report interfaces in get_caps() that you are
prepared to handle in the rest of the system.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!


WARNING: multiple messages have this Message-ID (diff)
From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: arinc9.unal@gmail.com
Cc: "Sean Wang" <sean.wang@mediatek.com>,
	"Landen Chao" <Landen.Chao@mediatek.com>,
	"DENG Qingfang" <dqfext@gmail.com>,
	"Daniel Golle" <daniel@makrotopia.org>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"Vladimir Oltean" <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Arınç ÜNAL" <arinc.unal@arinc9.com>,
	erkin.bozoglu@xeront.com, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [RFC PATCH net-next] net: dsa: mt7530: fix port specifications for MT7988
Date: Thu, 6 Apr 2023 12:07:01 +0100	[thread overview]
Message-ID: <ZC6n1XAGyZFlxyXx@shell.armlinux.org.uk> (raw)
In-Reply-To: <20230406100445.52915-1-arinc.unal@arinc9.com>

On Thu, Apr 06, 2023 at 01:04:45PM +0300, arinc9.unal@gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> On the switch on the MT7988 SoC, there are only 4 PHYs. There's only port 6
> as the CPU port, there's no port 5. Split the switch statement with a check
> to enforce these for the switch on the MT7988 SoC. The internal phy-mode is
> specific to MT7988 so put it for MT7988 only.
> 
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---
> 
> Daniel, this is based on the information you provided me about the switch.
> I will add this to my current patch series if it looks good to you.
> 
> Arınç
> 
> ---
>  drivers/net/dsa/mt7530.c | 67 ++++++++++++++++++++++++++--------------
>  1 file changed, 43 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
> index 6fbbdcb5987f..f167fa135ef1 100644
> --- a/drivers/net/dsa/mt7530.c
> +++ b/drivers/net/dsa/mt7530.c
> @@ -2548,7 +2548,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port,
>  	phy_interface_zero(config->supported_interfaces);
>  
>  	switch (port) {
> -	case 0 ... 4: /* Internal phy */
> +	case 0 ... 3: /* Internal phy */
>  		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
>  			  config->supported_interfaces);
>  		break;
> @@ -2710,37 +2710,56 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
>  	struct mt7530_priv *priv = ds->priv;
>  	u32 mcr_cur, mcr_new;
>  
> -	switch (port) {
> -	case 0 ... 4: /* Internal phy */
> -		if (state->interface != PHY_INTERFACE_MODE_GMII &&
> -		    state->interface != PHY_INTERFACE_MODE_INTERNAL)
> -			goto unsupported;
> -		break;
> -	case 5: /* Port 5, a CPU port. */
> -		if (priv->p5_interface == state->interface)
> +	if (priv->id == ID_MT7988) {
> +		switch (port) {
> +		case 0 ... 3: /* Internal phy */
> +			if (state->interface != PHY_INTERFACE_MODE_INTERNAL)

How do these end up with PHY_INTERFACE_MODE_INTERNAL ? phylib defaults
to GMII mode without something else being specified in DT.

Also note that you should *not* be validating state->interface in the
mac_config() method because it's way too late to reject it - if you get
an unsupported interface here, then that is down to the get_caps()
method being buggy. Only report interfaces in get_caps() that you are
prepared to handle in the rest of the system.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-04-06 11:07 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-06 10:04 [RFC PATCH net-next] net: dsa: mt7530: fix port specifications for MT7988 arinc9.unal
2023-04-06 10:04 ` arinc9.unal
2023-04-06 10:24 ` Arınç ÜNAL
2023-04-06 10:24   ` Arınç ÜNAL
2023-04-06 11:07 ` Russell King (Oracle) [this message]
2023-04-06 11:07   ` Russell King (Oracle)
2023-04-06 13:13   ` Daniel Golle
2023-04-06 13:13     ` Daniel Golle
2023-04-06 21:43   ` Arınç ÜNAL
2023-04-06 21:43     ` Arınç ÜNAL
2023-04-06 21:57     ` Daniel Golle
2023-04-06 21:57       ` Daniel Golle
2023-04-07  8:56       ` Arınç ÜNAL
2023-04-07  8:56         ` Arınç ÜNAL
2023-04-07  9:28         ` Daniel Golle
2023-04-07  9:28           ` Daniel Golle
2023-04-07 10:46           ` Arınç ÜNAL
2023-04-07 10:46             ` Arınç ÜNAL
2023-04-07 10:50             ` Arınç ÜNAL
2023-04-07 10:50               ` Arınç ÜNAL
2023-04-07 11:04               ` Daniel Golle
2023-04-07 11:04                 ` Daniel Golle
2023-04-07 11:03             ` Daniel Golle
2023-04-07 11:03               ` Daniel Golle

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