From: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: xen-devel@lists.xenproject.org,
"Jason Andryuk" <jandryuk@gmail.com>,
"Andrew Cooper" <andrew.cooper3@citrix.com>,
"Wei Liu" <wl@xen.org>, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [PATCH v2 2/3] x86/hvm: Allow writes to registers on the same page as MSI-X table
Date: Tue, 28 Mar 2023 14:52:42 +0200 [thread overview]
Message-ID: <ZCLjGhbzGD2jykT9@mail-itl> (raw)
In-Reply-To: <540906f7-4543-9d01-2b2b-a3bd70eda74b@suse.com>
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On Tue, Mar 28, 2023 at 02:34:23PM +0200, Jan Beulich wrote:
> On 28.03.2023 14:05, Marek Marczykowski-Górecki wrote:
> > On Tue, Mar 28, 2023 at 01:28:44PM +0200, Roger Pau Monné wrote:
> >> On Sat, Mar 25, 2023 at 03:49:23AM +0100, Marek Marczykowski-Górecki wrote:
> >>> +static bool cf_check msixtbl_page_accept(
> >>> + const struct hvm_io_handler *handler, const ioreq_t *r)
> >>> +{
> >>> + ASSERT(r->type == IOREQ_TYPE_COPY);
> >>> +
> >>> + return msixtbl_page_handler_get_hwaddr(
> >>> + current->domain, r->addr, r->dir == IOREQ_WRITE);
> >>
> >> I think you want to accept it also if it's a write to the PBA, and
> >> just drop it. You should always pass write=false and then drop it in
> >> msixtbl_page_write() if it falls in the PBA region (but still return
> >> X86EMUL_OKAY).
> >
> > I don't want to interfere with msixtbl_mmio_page_ops, this handler is
> > only about accesses not hitting actual MSI-X structures.
>
> In his functionally similar vPCI change I did ask Roger to handle the
> "extra" space right from the same handlers. Maybe that's going to be
> best here, too.
I have considered this option, but msixtbl_range() is already quite
complex, adding yet another case there won't make it easier to follow.
I mean, technically I can probably merge those two handlers together,
but I don't think it will result in nicer code. Especially since the
general direction is to abandon split of MSI-X table access handling
between Xen and QEMU and go with just QEMU doing it, hopefully at some
point not needing msixtbl_mmio_ops anymore (but still needing the one
for adjacent accesses).
> >>> --- a/xen/arch/x86/msi.c
> >>> +++ b/xen/arch/x86/msi.c
> >>> @@ -961,6 +961,34 @@ static int msix_capability_init(struct pci_dev *dev,
> >>> domain_crash(d);
> >>> /* XXX How to deal with existing mappings? */
> >>> }
> >>> +
> >>> + /*
> >>> + * If the MSI-X table doesn't start at the page boundary, map the first page for
> >>> + * passthrough accesses.
> >>> + */
> >>
> >> I think you should initialize
> >> msix->adj_access_table_idx[ADJ_IDX_{FIRST,LAST}] to -1?
>
> Or better not use a signed type there and set to UINT_MAX here.
If not using 0 as unused entry (see the other commend I made in response
to Roger), then that's probably the way to go.
--
Best Regards,
Marek Marczykowski-Górecki
Invisible Things Lab
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next prev parent reply other threads:[~2023-03-28 12:52 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-25 2:49 [PATCH v2 1/3] x86/msi: passthrough all MSI-X vector ctrl writes to device model Marek Marczykowski-Górecki
2023-03-25 2:49 ` [PATCH v2 2/3] x86/hvm: Allow writes to registers on the same page as MSI-X table Marek Marczykowski-Górecki
2023-03-27 10:47 ` Andrew Cooper
2023-03-28 11:28 ` Roger Pau Monné
2023-03-28 12:05 ` Marek Marczykowski-Górecki
2023-03-28 12:34 ` Jan Beulich
2023-03-28 12:52 ` Marek Marczykowski-Górecki [this message]
2023-03-28 13:03 ` Jan Beulich
2023-03-28 13:22 ` Roger Pau Monné
2023-04-03 4:21 ` Marek Marczykowski-Górecki
2023-04-03 11:09 ` Jan Beulich
2023-03-28 12:52 ` Roger Pau Monné
2023-03-25 2:49 ` [PATCH v2 3/3] x86/msi: clear initial MSI-X state on boot Marek Marczykowski-Górecki
2023-03-28 11:37 ` Roger Pau Monné
2023-03-28 12:07 ` Marek Marczykowski-Górecki
2023-03-28 12:38 ` Jan Beulich
2023-03-28 12:54 ` Jan Beulich
2023-03-28 13:04 ` Marek Marczykowski-Górecki
2023-03-28 13:17 ` Jason Andryuk
2023-03-28 17:38 ` Jason Andryuk
2023-03-28 13:23 ` Jan Beulich
2023-03-28 13:27 ` Roger Pau Monné
2023-03-28 13:32 ` Jason Andryuk
2023-03-28 13:35 ` Jan Beulich
2023-03-28 13:43 ` Jason Andryuk
2023-03-28 13:54 ` Jan Beulich
2023-03-28 15:08 ` Jason Andryuk
2023-03-28 15:39 ` Jan Beulich
2023-03-27 10:12 ` [PATCH v2 1/3] x86/msi: passthrough all MSI-X vector ctrl writes to device model Roger Pau Monné
2023-03-27 10:26 ` Marek Marczykowski-Górecki
2023-03-27 10:51 ` Roger Pau Monné
2023-03-27 11:34 ` Marek Marczykowski-Górecki
2023-03-27 13:29 ` Roger Pau Monné
2023-03-27 14:20 ` Marek Marczykowski-Górecki
2023-03-27 14:37 ` Roger Pau Monné
2023-03-27 15:32 ` Jan Beulich
2023-03-27 15:42 ` Roger Pau Monné
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