From: Abel Vesa <abel.vesa@linaro.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: abelvesa@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-imx@nxp.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Haibo Chen <haibo.chen@nxp.com>, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
Date: Sun, 9 Apr 2023 16:35:42 +0300 [thread overview]
Message-ID: <ZDK/Lr7GIshahX8T@linaro.org> (raw)
In-Reply-To: <20230403094633.3366446-4-peng.fan@oss.nxp.com>
On 23-04-03 17:46:33, Peng Fan (OSS) wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
>
> The 'nand_usdhc_bus' clock is only need to be enabled when usdhc
> or nand module is active, so change it to non-critical clock type.
>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> V3: None
> V2: None
>
> drivers/clk/imx/clk-imx8mp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
> index 8dcaeb213277..f26ae8de4cc6 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -538,7 +538,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
>
> hws[IMX8MP_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mp_main_axi_sels, ccm_base + 0x8800);
> hws[IMX8MP_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mp_enet_axi_sels, ccm_base + 0x8880);
> - hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus_critical("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
> + hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
> hws[IMX8MP_CLK_VPU_BUS] = imx8m_clk_hw_composite_bus("vpu_bus", imx8mp_vpu_bus_sels, ccm_base + 0x8980);
> hws[IMX8MP_CLK_MEDIA_AXI] = imx8m_clk_hw_composite_bus("media_axi", imx8mp_media_axi_sels, ccm_base + 0x8a00);
> hws[IMX8MP_CLK_MEDIA_APB] = imx8m_clk_hw_composite_bus("media_apb", imx8mp_media_apb_sels, ccm_base + 0x8a80);
> --
> 2.37.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@linaro.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: abelvesa@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-imx@nxp.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Haibo Chen <haibo.chen@nxp.com>, Peng Fan <peng.fan@nxp.com>
Subject: Re: [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical
Date: Sun, 9 Apr 2023 16:35:42 +0300 [thread overview]
Message-ID: <ZDK/Lr7GIshahX8T@linaro.org> (raw)
In-Reply-To: <20230403094633.3366446-4-peng.fan@oss.nxp.com>
On 23-04-03 17:46:33, Peng Fan (OSS) wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
>
> The 'nand_usdhc_bus' clock is only need to be enabled when usdhc
> or nand module is active, so change it to non-critical clock type.
>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> V3: None
> V2: None
>
> drivers/clk/imx/clk-imx8mp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
> index 8dcaeb213277..f26ae8de4cc6 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -538,7 +538,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
>
> hws[IMX8MP_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mp_main_axi_sels, ccm_base + 0x8800);
> hws[IMX8MP_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mp_enet_axi_sels, ccm_base + 0x8880);
> - hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus_critical("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
> + hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900);
> hws[IMX8MP_CLK_VPU_BUS] = imx8m_clk_hw_composite_bus("vpu_bus", imx8mp_vpu_bus_sels, ccm_base + 0x8980);
> hws[IMX8MP_CLK_MEDIA_AXI] = imx8m_clk_hw_composite_bus("media_axi", imx8mp_media_axi_sels, ccm_base + 0x8a00);
> hws[IMX8MP_CLK_MEDIA_APB] = imx8m_clk_hw_composite_bus("media_apb", imx8mp_media_apb_sels, ccm_base + 0x8a80);
> --
> 2.37.1
>
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next prev parent reply other threads:[~2023-04-09 13:35 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-03 9:46 [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Peng Fan (OSS)
2023-04-03 9:46 ` Peng Fan (OSS)
2023-04-03 9:46 ` [PATCH V3 2/4] dt-bindings: clock: imx8mp: Add LDB clock entry Peng Fan (OSS)
2023-04-03 9:46 ` Peng Fan (OSS)
2023-04-03 9:42 ` Krzysztof Kozlowski
2023-04-03 9:42 ` Krzysztof Kozlowski
2023-04-09 13:34 ` Abel Vesa
2023-04-09 13:34 ` Abel Vesa
2023-04-03 9:46 ` [PATCH V3 3/4] clk: imx: imx8mp: Add LDB root clock Peng Fan (OSS)
2023-04-03 9:46 ` Peng Fan (OSS)
2023-04-09 13:35 ` Abel Vesa
2023-04-09 13:35 ` Abel Vesa
2023-04-03 9:46 ` [PATCH V3 4/4] clk: imx: imx8mp: change the 'nand_usdhc_bus' clock to non-critical Peng Fan (OSS)
2023-04-03 9:46 ` Peng Fan (OSS)
2023-04-09 13:35 ` Abel Vesa [this message]
2023-04-09 13:35 ` Abel Vesa
2023-04-09 13:35 ` [PATCH V3 1/4] clk: imx: imx8mp: correct DISP2 pixel clock type Abel Vesa
2023-04-09 13:35 ` Abel Vesa
2023-04-09 13:42 ` Abel Vesa
2023-04-09 13:42 ` Abel Vesa
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