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From: Vinod Koul <vkoul@kernel.org>
To: Swapnil Jakhade <sjakhade@cadence.com>
Cc: kishon@kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, mparab@cadence.com,
	rogerq@kernel.org, s-vadapalli@ti.com
Subject: Re: [PATCH v2] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration
Date: Wed, 12 Apr 2023 22:06:33 +0530	[thread overview]
Message-ID: <ZDbeEUKIZ7kJPm3k@matsya> (raw)
In-Reply-To: <20230403085644.10187-1-sjakhade@cadence.com>

On 03-04-23, 10:56, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.

Applied, thanks

-- 
~Vinod

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Swapnil Jakhade <sjakhade@cadence.com>
Cc: kishon@kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, mparab@cadence.com,
	rogerq@kernel.org, s-vadapalli@ti.com
Subject: Re: [PATCH v2] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration
Date: Wed, 12 Apr 2023 22:06:33 +0530	[thread overview]
Message-ID: <ZDbeEUKIZ7kJPm3k@matsya> (raw)
In-Reply-To: <20230403085644.10187-1-sjakhade@cadence.com>

On 03-04-23, 10:56, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.

Applied, thanks

-- 
~Vinod

  reply	other threads:[~2023-04-12 16:36 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-03  8:56 [PATCH v2] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration Swapnil Jakhade
2023-04-03  8:56 ` Swapnil Jakhade
2023-04-12 16:36 ` Vinod Koul [this message]
2023-04-12 16:36   ` Vinod Koul

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