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From: Catalin Marinas <catalin.marinas@arm.com>
To: Ryan Roberts <ryan.roberts@arm.com>
Cc: Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Subject: Re: [PATCH v2 06/12] KVM: arm64: Use LPA2 page-tables for hyp stage1 if HW supports it
Date: Wed, 12 Apr 2023 18:06:09 +0100	[thread overview]
Message-ID: <ZDblAddFaCSwl/bf@arm.com> (raw)
In-Reply-To: <20230306195438.1557851-7-ryan.roberts@arm.com>

On Mon, Mar 06, 2023 at 07:54:32PM +0000, Ryan Roberts wrote:
> Implement a simple policy whereby if the HW supports FEAT_LPA2 for the
> page size we are using, always use LPA2-style page-tables for hyp stage
> 1, regardless of the IPA or PA size requirements. When in use we can now
> support up to 52-bit IPA and PA sizes.
> 
> Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
> ---
>  arch/arm64/kvm/arm.c         | 2 ++
>  arch/arm64/kvm/hyp/pgtable.c | 3 ++-
>  2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 3bd732eaf087..bef73c484162 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -1548,6 +1548,8 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits)
>  	tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1;
>  	tcr &= ~TCR_T0SZ_MASK;
>  	tcr |= TCR_T0SZ(hyp_va_bits);
> +	if (system_supports_lpa2())
> +		tcr |= TCR_EL2_DS;
>  	params->tcr_el2 = tcr;
>  
>  	params->pgd_pa = kvm_mmu_get_httbr();
> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index 414a5dbf233d..bb481d6c7f2d 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -379,7 +379,8 @@ static int hyp_set_prot_attr(enum kvm_pgtable_prot prot, kvm_pte_t *ptep)
>  	}
>  
>  	attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap);
> -	attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh);
> +	if (!system_supports_lpa2())
> +		attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh);
>  	attr |= KVM_PTE_LEAF_ATTR_LO_S1_AF;
>  	attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW;
>  	*ptep = attr;

Isn't LPA2 at stage 1 more involved than just not setting the SH field?
Does kvm_phys_to_pte() need changing as well?

If that's not strictly needed for stage 2, I'd rather keep the two
stages separate and add the stage 1 hyp together with Ard's series for
LPA2 at stage 1.

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Ryan Roberts <ryan.roberts@arm.com>
Cc: Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Subject: Re: [PATCH v2 06/12] KVM: arm64: Use LPA2 page-tables for hyp stage1 if HW supports it
Date: Wed, 12 Apr 2023 18:06:09 +0100	[thread overview]
Message-ID: <ZDblAddFaCSwl/bf@arm.com> (raw)
In-Reply-To: <20230306195438.1557851-7-ryan.roberts@arm.com>

On Mon, Mar 06, 2023 at 07:54:32PM +0000, Ryan Roberts wrote:
> Implement a simple policy whereby if the HW supports FEAT_LPA2 for the
> page size we are using, always use LPA2-style page-tables for hyp stage
> 1, regardless of the IPA or PA size requirements. When in use we can now
> support up to 52-bit IPA and PA sizes.
> 
> Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
> ---
>  arch/arm64/kvm/arm.c         | 2 ++
>  arch/arm64/kvm/hyp/pgtable.c | 3 ++-
>  2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 3bd732eaf087..bef73c484162 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -1548,6 +1548,8 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits)
>  	tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1;
>  	tcr &= ~TCR_T0SZ_MASK;
>  	tcr |= TCR_T0SZ(hyp_va_bits);
> +	if (system_supports_lpa2())
> +		tcr |= TCR_EL2_DS;
>  	params->tcr_el2 = tcr;
>  
>  	params->pgd_pa = kvm_mmu_get_httbr();
> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index 414a5dbf233d..bb481d6c7f2d 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -379,7 +379,8 @@ static int hyp_set_prot_attr(enum kvm_pgtable_prot prot, kvm_pte_t *ptep)
>  	}
>  
>  	attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_AP, ap);
> -	attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh);
> +	if (!system_supports_lpa2())
> +		attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S1_SH, sh);
>  	attr |= KVM_PTE_LEAF_ATTR_LO_S1_AF;
>  	attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW;
>  	*ptep = attr;

Isn't LPA2 at stage 1 more involved than just not setting the SH field?
Does kvm_phys_to_pte() need changing as well?

If that's not strictly needed for stage 2, I'd rather keep the two
stages separate and add the stage 1 hyp together with Ard's series for
LPA2 at stage 1.

-- 
Catalin

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  reply	other threads:[~2023-04-12 17:06 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06 19:54 [PATCH v2 00/12] KVM: arm64: Support FEAT_LPA2 at hyp s1 and vm s2 Ryan Roberts
2023-03-06 19:54 ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 01/12] arm64/mm: Update non-range tlb invalidation routines for FEAT_LPA2 Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-04-12 15:47   ` Catalin Marinas
2023-04-12 15:47     ` Catalin Marinas
2023-04-13  8:04     ` Ryan Roberts
2023-04-13  8:04       ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 02/12] arm64/mm: Add FEAT_LPA2 specific ID_AA64MMFR0.TGRAN[2] Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-04-12 16:27   ` Catalin Marinas
2023-04-12 16:27     ` Catalin Marinas
2023-04-13  8:16     ` Ryan Roberts
2023-04-13  8:16       ` Ryan Roberts
2023-04-13 16:54       ` Catalin Marinas
2023-04-13 16:54         ` Catalin Marinas
2023-03-06 19:54 ` [PATCH v2 03/12] KVM: arm64: Add ARM64_HAS_LPA2 CPU capability Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 04/12] KVM: arm64: Add new (V)TCR_EL2 field definitions for FEAT_LPA2 Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-04-12 16:36   ` Catalin Marinas
2023-04-12 16:36     ` Catalin Marinas
2023-03-06 19:54 ` [PATCH v2 05/12] KVM: arm64: Use LPA2 page-tables for stage2 if HW supports it Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 06/12] KVM: arm64: Use LPA2 page-tables for hyp stage1 " Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-04-12 17:06   ` Catalin Marinas [this message]
2023-04-12 17:06     ` Catalin Marinas
2023-04-13  8:27     ` Ryan Roberts
2023-04-13  8:27       ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 07/12] KVM: arm64: Insert PS field at TCR_EL2 assembly time Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 08/12] KVM: arm64: Convert translation level parameter to s8 Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 09/12] KVM: arm64: Support up to 5 levels of translation in kvm_pgtable Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 20:02   ` Ryan Roberts
2023-03-06 20:02     ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 10/12] KVM: arm64: Allow guests with >48-bit IPA size on FEAT_LPA2 systems Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 11/12] KVM: selftests: arm64: Determine max ipa size per-page size Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 19:54 ` [PATCH v2 12/12] KVM: selftests: arm64: Support P52V48 4K and 16K guest_modes Ryan Roberts
2023-03-06 19:54   ` Ryan Roberts
2023-03-06 20:04   ` Ryan Roberts
2023-03-06 20:04     ` Ryan Roberts
2023-04-17 10:43 ` [PATCH v2 00/12] KVM: arm64: Support FEAT_LPA2 at hyp s1 and vm s2 Ryan Roberts
2023-04-17 10:43   ` Ryan Roberts

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