Re: [PATCH V5 03/21] crypto: hisilicon/qm: Fix to enable build with RISC-V clang

From: Sunil V L <sunilvl@ventanamicro.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
	linux-crypto@vger.kernel.org,
	platform-driver-x86@vger.kernel.org, llvm@lists.linux.dev,
	Jonathan Corbet <corbet@lwn.net>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Weili Qian <qianweili@huawei.com>,
	Zhou Wang <wangzhou1@hisilicon.com>,
	"David S . Miller" <davem@davemloft.net>,
	Marc Zyngier <maz@kernel.org>,
	Maximilian Luz <luzmaximilian@gmail.com>,
	Hans de Goede <hdegoede@redhat.com>,
	Mark Gross <markgross@kernel.org>,
	Nathan Chancellor <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	Tom Rix <trix@redhat.com>
Subject: Re: [PATCH V5 03/21] crypto: hisilicon/qm: Fix to enable build with RISC-V clang
Date: Wed, 10 May 2023 11:17:49 +0530	[thread overview]
Message-ID: <ZFswBePAtF/ror5G@sunil-laptop> (raw)
In-Reply-To: <ZFmtSReX9/WR5CkK@gondor.apana.org.au>

On Tue, May 09, 2023 at 10:17:45AM +0800, Herbert Xu wrote:
> On Mon, May 08, 2023 at 05:22:19PM +0530, Sunil V L wrote:
> > With CONFIG_ACPI enabled for RISC-V, this driver gets enabled in
> > allmodconfig build. However, build fails with clang and below
> > error is seen.
> > 
> > drivers/crypto/hisilicon/qm.c:627:10: error: invalid output constraint '+Q' in asm
> >                        "+Q" (*((char __iomem *)fun_base))
> >                        ^
> > This is expected error with clang due to the way it is designed.
> > 
> > To fix this issue, move arm64 assembly code under #if.
> > 
> > Link: https://github.com/ClangBuiltLinux/linux/issues/999
> > Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> > [sunilvl@ventanamicro.com: Moved tmp0 and tmp1 into the #if]
> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > ---
> >  drivers/crypto/hisilicon/qm.c | 13 +++++++------
> >  1 file changed, 7 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
> > index ad0c042b5e66..2eaeaac2e246 100644
> > --- a/drivers/crypto/hisilicon/qm.c
> > +++ b/drivers/crypto/hisilicon/qm.c
> > @@ -610,13 +610,9 @@ EXPORT_SYMBOL_GPL(hisi_qm_wait_mb_ready);
> >  static void qm_mb_write(struct hisi_qm *qm, const void *src)
> >  {
> >  	void __iomem *fun_base = qm->io_base + QM_MB_CMD_SEND_BASE;
> > -	unsigned long tmp0 = 0, tmp1 = 0;
> >  
> > -	if (!IS_ENABLED(CONFIG_ARM64)) {
> > -		memcpy_toio(fun_base, src, 16);
> > -		dma_wmb();
> > -		return;
> > -	}
> 
> Please leave this bit as it stands.
> 
> > +#if IS_ENABLED(CONFIG_ARM64)
> > +	unsigned long tmp0 = 0, tmp1 = 0;
> >  
> >  	asm volatile("ldp %0, %1, %3\n"
> >  		     "stp %0, %1, %2\n"
> > @@ -626,6 +622,11 @@ static void qm_mb_write(struct hisi_qm *qm, const void *src)
> >  		       "+Q" (*((char __iomem *)fun_base))
> >  		     : "Q" (*((char *)src))
> >  		     : "memory");
> 
> And simply add the ifdef around the assembly.
> 
Sure, Herbert.

Thanks!
Sunil