From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 04/13] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp
Date: Mon, 15 May 2023 16:51:07 +0300 [thread overview]
Message-ID: <ZGI4y-6NKngtl0wh@intel.com> (raw)
In-Reply-To: <20230512062417.2584427-5-ankit.k.nautiyal@intel.com>
On Fri, May 12, 2023 at 11:54:08AM +0530, Ankit Nautiyal wrote:
> In Bigjoiner check for DSC, bigjoiner interface bits for DP for
> DISPLAY > 13 is 36 (Bspec: 49259).
>
> v2: Corrected Display ver to 13.
>
> v3: Follow convention for conditional statement. (Ville)
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 24de25551a49..bca80c0793e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -783,8 +783,9 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
> bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
>
> if (bigjoiner) {
> + int bigjoiner_interface_bits = DISPLAY_VER(i915) > 13 ? 36 : 24;
'x >= 14' is the usual convention.
with that
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> u32 max_bpp_bigjoiner =
> - i915->display.cdclk.max_cdclk_freq * 48 /
> + i915->display.cdclk.max_cdclk_freq * 2 * bigjoiner_interface_bits /
> intel_dp_mode_to_fec_clock(mode_clock);
>
> bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
> --
> 2.25.1
--
Ville Syrjälä
Intel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: stanislav.lisovskiy@intel.com, intel-gfx@lists.freedesktop.org,
anusha.srivatsa@intel.com, navaremanasi@google.com,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 04/13] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp
Date: Mon, 15 May 2023 16:51:07 +0300 [thread overview]
Message-ID: <ZGI4y-6NKngtl0wh@intel.com> (raw)
In-Reply-To: <20230512062417.2584427-5-ankit.k.nautiyal@intel.com>
On Fri, May 12, 2023 at 11:54:08AM +0530, Ankit Nautiyal wrote:
> In Bigjoiner check for DSC, bigjoiner interface bits for DP for
> DISPLAY > 13 is 36 (Bspec: 49259).
>
> v2: Corrected Display ver to 13.
>
> v3: Follow convention for conditional statement. (Ville)
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 24de25551a49..bca80c0793e9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -783,8 +783,9 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
> bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
>
> if (bigjoiner) {
> + int bigjoiner_interface_bits = DISPLAY_VER(i915) > 13 ? 36 : 24;
'x >= 14' is the usual convention.
with that
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> u32 max_bpp_bigjoiner =
> - i915->display.cdclk.max_cdclk_freq * 48 /
> + i915->display.cdclk.max_cdclk_freq * 2 * bigjoiner_interface_bits /
> intel_dp_mode_to_fec_clock(mode_clock);
>
> bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
> --
> 2.25.1
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2023-05-15 13:51 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-12 6:24 [Intel-gfx] [PATCH 00/13] DSC misc fixes Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 01/13] drm/i915/dp: Consider output_format while computing dsc bpp Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-15 13:20 ` [Intel-gfx] " Ville Syrjälä
2023-05-15 13:20 ` Ville Syrjälä
2023-05-12 6:24 ` [Intel-gfx] [PATCH 02/13] drm/i915/dp_mst: Use output_format to get the final link bpp Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 03/13] drm/i915/dp: Use consistent name for link bpp and compressed bpp Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 04/13] drm/i915/dp: Update Bigjoiner interface bits for computing " Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-15 13:51 ` Ville Syrjälä [this message]
2023-05-15 13:51 ` Ville Syrjälä
2023-05-18 13:16 ` [Intel-gfx] " Nautiyal, Ankit K
2023-05-18 13:16 ` Nautiyal, Ankit K
2023-05-12 6:24 ` [Intel-gfx] [PATCH 05/13] drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-15 14:44 ` [Intel-gfx] " Ville Syrjälä
2023-05-15 14:44 ` Ville Syrjälä
2023-05-16 10:11 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-05-16 10:11 ` Lisovskiy, Stanislav
2023-05-18 13:14 ` [Intel-gfx] " Nautiyal, Ankit K
2023-05-18 13:14 ` Nautiyal, Ankit K
2023-05-12 6:24 ` [Intel-gfx] [PATCH 06/13] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 07/13] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 08/13] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 09/13] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 10/13] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 11/13] drm/i915/dp: Rename helpers to get DSC max pipe_bpp/output_bpp Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 6:24 ` [Intel-gfx] [PATCH 12/13] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-16 10:43 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-05-16 10:43 ` Lisovskiy, Stanislav
2023-05-16 11:40 ` [Intel-gfx] " Ville Syrjälä
2023-05-16 11:40 ` Ville Syrjälä
2023-05-18 13:25 ` [Intel-gfx] " Nautiyal, Ankit K
2023-05-18 13:25 ` Nautiyal, Ankit K
2023-05-23 9:01 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-05-23 9:01 ` Lisovskiy, Stanislav
2023-05-24 12:38 ` [Intel-gfx] " Ville Syrjälä
2023-05-24 12:38 ` Ville Syrjälä
2023-05-24 12:59 ` [Intel-gfx] " Lisovskiy, Stanislav
2023-05-24 12:59 ` Lisovskiy, Stanislav
2023-05-24 13:16 ` [Intel-gfx] " Ville Syrjälä
2023-05-24 13:16 ` Ville Syrjälä
2023-05-12 6:24 ` [Intel-gfx] [PATCH 13/13] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Ankit Nautiyal
2023-05-12 6:24 ` Ankit Nautiyal
2023-05-12 7:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC misc fixes Patchwork
2023-05-12 7:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-12 7:26 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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