From: Yury Norov <yury.norov@gmail.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
intel-gfx@lists.freedesktop.org,
"Kevin Brodsky" <kevin.brodsky@arm.com>,
"Rasmus Villemoes" <linux@rasmusvillemoes.dk>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
"Thomas Gleixner" <tglx@linutronix.de>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Christian König" <christian.koenig@amd.com>
Subject: Re: [Intel-gfx] [PATCH 2/3] linux/bits.h: Add fixed-width GENMASK and BIT macros
Date: Thu, 22 Jun 2023 07:59:05 -0700 [thread overview]
Message-ID: <ZJRhuaebZC+y7B37@yury-ThinkPad> (raw)
In-Reply-To: <alzfewo3jado7ezyaibq52ep3vuxbyfism4ablchmvmioio3jb@3gyx6vaoscbf>
+ Rasmus Villemoes <linux@rasmusvillemoes.dk>
> > -#define __GENMASK(h, l) \
> > - (((~UL(0)) - (UL(1) << (l)) + 1) & \
> > - (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
> > -#define GENMASK(h, l) \
> > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> > +#define __GENMASK(t, h, l) \
> > + (GENMASK_INPUT_CHECK(h, l) + \
> > + (((t)~0ULL - ((t)(1) << (l)) + 1) & \
> > + ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
>
> yeah... forcing the use of ull and then casting to the type is simpler
> and does the job. Checked that it does not break the build if h is
> greater than the type and it works
>
> ../include/linux/bits.h:40:20: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 40 | ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
> | ^~
>
> However this new version does increase the size. Using i915 module
> to test:
>
> $ size build64/drivers/gpu/drm/i915/i915.ko*
> text data bss dec hex filename
> 4355676 213473 7048 4576197 45d3c5 build64/drivers/gpu/drm/i915/i915.ko
> 4361052 213505 7048 4581605 45e8e5 build64/drivers/gpu/drm/i915/i915.ko.new
It sounds weird because all that should anyways boil down at compile
time...
I enabled DRM_I915 in config and ran bloat-o-meter against today's
master, and I don't see that much difference.
$ size vmlinux vmlinux.new
text data bss dec hex filename
44978613 23962202 3026948 71967763 44a2413 vmlinux
44978653 23966298 3026948 71971899 44a343b vmlinux.new
$ scripts/bloat-o-meter vmlinux vmlinux.new
add/remove: 0/0 grow/shrink: 3/2 up/down: 28/-5 (23)
Function old new delta
kvm_mmu_reset_all_pte_masks 623 639 +16
intel_psr_invalidate 1112 1119 +7
intel_drrs_activate 624 629 +5
intel_psr_flush 1410 1409 -1
clk_fractional_divider_general_approximation 207 203 -4
Total: Before=35398799, After=35398822, chg +0.00%
Can you please check your numbers?
Interestingly, the kvm_mmu_reset_all_pte_masks() uses GENMASK_ULL(),
which should generate the same code across versions. Maybe it's just
a noise? Rasmus, can you please take a look?
Thanks,
Yury
WARNING: multiple messages have this Message-ID (diff)
From: Yury Norov <yury.norov@gmail.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
intel-gfx@lists.freedesktop.org,
"Kevin Brodsky" <kevin.brodsky@arm.com>,
"Rasmus Villemoes" <linux@rasmusvillemoes.dk>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
"Thomas Gleixner" <tglx@linutronix.de>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Christian König" <christian.koenig@amd.com>
Subject: Re: [Intel-xe] [PATCH 2/3] linux/bits.h: Add fixed-width GENMASK and BIT macros
Date: Thu, 22 Jun 2023 07:59:05 -0700 [thread overview]
Message-ID: <ZJRhuaebZC+y7B37@yury-ThinkPad> (raw)
In-Reply-To: <alzfewo3jado7ezyaibq52ep3vuxbyfism4ablchmvmioio3jb@3gyx6vaoscbf>
+ Rasmus Villemoes <linux@rasmusvillemoes.dk>
> > -#define __GENMASK(h, l) \
> > - (((~UL(0)) - (UL(1) << (l)) + 1) & \
> > - (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
> > -#define GENMASK(h, l) \
> > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> > +#define __GENMASK(t, h, l) \
> > + (GENMASK_INPUT_CHECK(h, l) + \
> > + (((t)~0ULL - ((t)(1) << (l)) + 1) & \
> > + ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
>
> yeah... forcing the use of ull and then casting to the type is simpler
> and does the job. Checked that it does not break the build if h is
> greater than the type and it works
>
> ../include/linux/bits.h:40:20: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 40 | ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
> | ^~
>
> However this new version does increase the size. Using i915 module
> to test:
>
> $ size build64/drivers/gpu/drm/i915/i915.ko*
> text data bss dec hex filename
> 4355676 213473 7048 4576197 45d3c5 build64/drivers/gpu/drm/i915/i915.ko
> 4361052 213505 7048 4581605 45e8e5 build64/drivers/gpu/drm/i915/i915.ko.new
It sounds weird because all that should anyways boil down at compile
time...
I enabled DRM_I915 in config and ran bloat-o-meter against today's
master, and I don't see that much difference.
$ size vmlinux vmlinux.new
text data bss dec hex filename
44978613 23962202 3026948 71967763 44a2413 vmlinux
44978653 23966298 3026948 71971899 44a343b vmlinux.new
$ scripts/bloat-o-meter vmlinux vmlinux.new
add/remove: 0/0 grow/shrink: 3/2 up/down: 28/-5 (23)
Function old new delta
kvm_mmu_reset_all_pte_masks 623 639 +16
intel_psr_invalidate 1112 1119 +7
intel_drrs_activate 624 629 +5
intel_psr_flush 1410 1409 -1
clk_fractional_divider_general_approximation 207 203 -4
Total: Before=35398799, After=35398822, chg +0.00%
Can you please check your numbers?
Interestingly, the kvm_mmu_reset_all_pte_masks() uses GENMASK_ULL(),
which should generate the same code across versions. Maybe it's just
a noise? Rasmus, can you please take a look?
Thanks,
Yury
WARNING: multiple messages have this Message-ID (diff)
From: Yury Norov <yury.norov@gmail.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
intel-gfx@lists.freedesktop.org,
"Kevin Brodsky" <kevin.brodsky@arm.com>,
"Rasmus Villemoes" <linux@rasmusvillemoes.dk>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
intel-xe@lists.freedesktop.org,
"Thomas Gleixner" <tglx@linutronix.de>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH 2/3] linux/bits.h: Add fixed-width GENMASK and BIT macros
Date: Thu, 22 Jun 2023 07:59:05 -0700 [thread overview]
Message-ID: <ZJRhuaebZC+y7B37@yury-ThinkPad> (raw)
In-Reply-To: <alzfewo3jado7ezyaibq52ep3vuxbyfism4ablchmvmioio3jb@3gyx6vaoscbf>
+ Rasmus Villemoes <linux@rasmusvillemoes.dk>
> > -#define __GENMASK(h, l) \
> > - (((~UL(0)) - (UL(1) << (l)) + 1) & \
> > - (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
> > -#define GENMASK(h, l) \
> > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> > +#define __GENMASK(t, h, l) \
> > + (GENMASK_INPUT_CHECK(h, l) + \
> > + (((t)~0ULL - ((t)(1) << (l)) + 1) & \
> > + ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
>
> yeah... forcing the use of ull and then casting to the type is simpler
> and does the job. Checked that it does not break the build if h is
> greater than the type and it works
>
> ../include/linux/bits.h:40:20: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 40 | ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
> | ^~
>
> However this new version does increase the size. Using i915 module
> to test:
>
> $ size build64/drivers/gpu/drm/i915/i915.ko*
> text data bss dec hex filename
> 4355676 213473 7048 4576197 45d3c5 build64/drivers/gpu/drm/i915/i915.ko
> 4361052 213505 7048 4581605 45e8e5 build64/drivers/gpu/drm/i915/i915.ko.new
It sounds weird because all that should anyways boil down at compile
time...
I enabled DRM_I915 in config and ran bloat-o-meter against today's
master, and I don't see that much difference.
$ size vmlinux vmlinux.new
text data bss dec hex filename
44978613 23962202 3026948 71967763 44a2413 vmlinux
44978653 23966298 3026948 71971899 44a343b vmlinux.new
$ scripts/bloat-o-meter vmlinux vmlinux.new
add/remove: 0/0 grow/shrink: 3/2 up/down: 28/-5 (23)
Function old new delta
kvm_mmu_reset_all_pte_masks 623 639 +16
intel_psr_invalidate 1112 1119 +7
intel_drrs_activate 624 629 +5
intel_psr_flush 1410 1409 -1
clk_fractional_divider_general_approximation 207 203 -4
Total: Before=35398799, After=35398822, chg +0.00%
Can you please check your numbers?
Interestingly, the kvm_mmu_reset_all_pte_masks() uses GENMASK_ULL(),
which should generate the same code across versions. Maybe it's just
a noise? Rasmus, can you please take a look?
Thanks,
Yury
WARNING: multiple messages have this Message-ID (diff)
From: Yury Norov <yury.norov@gmail.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Andrew Morton" <akpm@linux-foundation.org>,
intel-gfx@lists.freedesktop.org,
"Kevin Brodsky" <kevin.brodsky@arm.com>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
"Christian König" <christian.koenig@amd.com>,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Rasmus Villemoes" <linux@rasmusvillemoes.dk>,
intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 2/3] linux/bits.h: Add fixed-width GENMASK and BIT macros
Date: Thu, 22 Jun 2023 07:59:05 -0700 [thread overview]
Message-ID: <ZJRhuaebZC+y7B37@yury-ThinkPad> (raw)
In-Reply-To: <alzfewo3jado7ezyaibq52ep3vuxbyfism4ablchmvmioio3jb@3gyx6vaoscbf>
+ Rasmus Villemoes <linux@rasmusvillemoes.dk>
> > -#define __GENMASK(h, l) \
> > - (((~UL(0)) - (UL(1) << (l)) + 1) & \
> > - (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
> > -#define GENMASK(h, l) \
> > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> > +#define __GENMASK(t, h, l) \
> > + (GENMASK_INPUT_CHECK(h, l) + \
> > + (((t)~0ULL - ((t)(1) << (l)) + 1) & \
> > + ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
>
> yeah... forcing the use of ull and then casting to the type is simpler
> and does the job. Checked that it does not break the build if h is
> greater than the type and it works
>
> ../include/linux/bits.h:40:20: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 40 | ((t)~0ULL >> (BITS_PER_TYPE(t) - 1 - (h)))))
> | ^~
>
> However this new version does increase the size. Using i915 module
> to test:
>
> $ size build64/drivers/gpu/drm/i915/i915.ko*
> text data bss dec hex filename
> 4355676 213473 7048 4576197 45d3c5 build64/drivers/gpu/drm/i915/i915.ko
> 4361052 213505 7048 4581605 45e8e5 build64/drivers/gpu/drm/i915/i915.ko.new
It sounds weird because all that should anyways boil down at compile
time...
I enabled DRM_I915 in config and ran bloat-o-meter against today's
master, and I don't see that much difference.
$ size vmlinux vmlinux.new
text data bss dec hex filename
44978613 23962202 3026948 71967763 44a2413 vmlinux
44978653 23966298 3026948 71971899 44a343b vmlinux.new
$ scripts/bloat-o-meter vmlinux vmlinux.new
add/remove: 0/0 grow/shrink: 3/2 up/down: 28/-5 (23)
Function old new delta
kvm_mmu_reset_all_pte_masks 623 639 +16
intel_psr_invalidate 1112 1119 +7
intel_drrs_activate 624 629 +5
intel_psr_flush 1410 1409 -1
clk_fractional_divider_general_approximation 207 203 -4
Total: Before=35398799, After=35398822, chg +0.00%
Can you please check your numbers?
Interestingly, the kvm_mmu_reset_all_pte_masks() uses GENMASK_ULL(),
which should generate the same code across versions. Maybe it's just
a noise? Rasmus, can you please take a look?
Thanks,
Yury
next prev parent reply other threads:[~2023-06-27 14:38 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-09 5:14 [Intel-gfx] [PATCH 0/3] Fixed-width mask/bit helpers Lucas De Marchi
2023-05-09 5:14 ` Lucas De Marchi
2023-05-09 5:14 ` Lucas De Marchi
2023-05-09 5:14 ` [Intel-xe] " Lucas De Marchi
2023-05-09 5:14 ` [Intel-gfx] [PATCH 1/3] drm/amd: Remove wrapper macros over get_u{32, 16, 8} Lucas De Marchi
2023-05-09 5:14 ` [PATCH 1/3] drm/amd: Remove wrapper macros over get_u{32,16,8} Lucas De Marchi
2023-05-09 5:14 ` Lucas De Marchi
2023-05-09 5:14 ` [Intel-xe] [PATCH 1/3] drm/amd: Remove wrapper macros over get_u{32, 16, 8} Lucas De Marchi
2023-05-09 5:14 ` [Intel-gfx] [PATCH 2/3] linux/bits.h: Add fixed-width GENMASK and BIT macros Lucas De Marchi
2023-05-09 5:14 ` Lucas De Marchi
2023-05-09 5:14 ` Lucas De Marchi
2023-05-09 5:14 ` [Intel-xe] " Lucas De Marchi
2023-05-09 14:00 ` [Intel-gfx] " Gustavo Sousa
2023-05-09 14:00 ` Gustavo Sousa
2023-05-09 14:00 ` Gustavo Sousa
2023-05-09 21:34 ` [Intel-gfx] " Lucas De Marchi
2023-05-09 21:34 ` Lucas De Marchi
2023-05-09 21:34 ` Lucas De Marchi
2023-05-10 12:18 ` [Intel-gfx] " kernel test robot
2023-05-10 12:18 ` kernel test robot
2023-05-10 12:18 ` kernel test robot
2023-05-10 12:18 ` [Intel-xe] " kernel test robot
2023-05-12 11:14 ` [Intel-gfx] " Andy Shevchenko
2023-05-12 11:14 ` Andy Shevchenko
2023-05-12 11:14 ` Andy Shevchenko
2023-05-12 11:14 ` [Intel-xe] " Andy Shevchenko
2023-05-12 11:25 ` [Intel-gfx] " Jani Nikula
2023-05-12 11:25 ` Jani Nikula
2023-05-12 11:25 ` Jani Nikula
2023-05-12 11:25 ` [Intel-xe] " Jani Nikula
2023-05-12 11:32 ` [Intel-gfx] " Andy Shevchenko
2023-05-12 11:32 ` Andy Shevchenko
2023-05-12 11:32 ` Andy Shevchenko
2023-05-12 11:32 ` [Intel-xe] " Andy Shevchenko
2023-05-12 11:45 ` [Intel-gfx] " Jani Nikula
2023-05-12 11:45 ` Jani Nikula
2023-05-12 11:45 ` Jani Nikula
2023-05-12 11:45 ` [Intel-xe] " Jani Nikula
2023-06-15 15:53 ` [Intel-gfx] " Andy Shevchenko
2023-06-15 15:53 ` Andy Shevchenko
2023-06-15 15:53 ` Andy Shevchenko
2023-06-15 15:53 ` [Intel-xe] " Andy Shevchenko
2023-06-20 14:47 ` [Intel-gfx] " Jani Nikula
2023-06-20 14:47 ` Jani Nikula
2023-06-20 14:47 ` Jani Nikula
2023-06-20 14:47 ` [Intel-xe] " Jani Nikula
2023-06-20 14:55 ` [Intel-gfx] " Andy Shevchenko
2023-06-20 14:55 ` Andy Shevchenko
2023-06-20 14:55 ` Andy Shevchenko
2023-06-20 14:55 ` [Intel-xe] " Andy Shevchenko
2023-06-20 17:25 ` [Intel-gfx] " Lucas De Marchi
2023-06-20 17:25 ` Lucas De Marchi
2023-06-20 17:25 ` Lucas De Marchi
2023-06-20 17:41 ` [Intel-gfx] " Andy Shevchenko
2023-06-20 17:41 ` Andy Shevchenko
2023-06-20 17:41 ` Andy Shevchenko
2023-06-20 18:02 ` [Intel-gfx] " Lucas De Marchi
2023-06-20 18:02 ` Lucas De Marchi
2023-06-20 18:02 ` Lucas De Marchi
2023-06-20 18:19 ` [Intel-gfx] " Jani Nikula
2023-06-20 18:19 ` Jani Nikula
2023-06-20 18:19 ` Jani Nikula
2023-05-12 16:29 ` [Intel-gfx] " Lucas De Marchi
2023-05-12 16:29 ` Lucas De Marchi
2023-05-12 16:29 ` Lucas De Marchi
2023-05-12 16:29 ` [Intel-xe] " Lucas De Marchi
2023-06-15 15:58 ` [Intel-gfx] " Andy Shevchenko
2023-06-15 15:58 ` Andy Shevchenko
2023-06-15 15:58 ` Andy Shevchenko
2023-06-15 15:58 ` [Intel-xe] " Andy Shevchenko
2023-06-22 2:20 ` [Intel-gfx] " Yury Norov
2023-06-22 2:20 ` Yury Norov
2023-06-22 2:20 ` Yury Norov
2023-06-22 2:20 ` [Intel-xe] " Yury Norov
2023-06-22 6:15 ` [Intel-gfx] " Lucas De Marchi
2023-06-22 6:15 ` Lucas De Marchi
2023-06-22 6:15 ` Lucas De Marchi
2023-06-22 6:15 ` [Intel-xe] " Lucas De Marchi
2023-06-22 14:59 ` Yury Norov [this message]
2023-06-22 14:59 ` Yury Norov
2023-06-22 14:59 ` Yury Norov
2023-06-22 14:59 ` [Intel-xe] " Yury Norov
2024-01-18 20:42 ` Lucas De Marchi
2024-01-18 20:42 ` Lucas De Marchi
2024-01-18 21:48 ` Yury Norov
2024-01-18 21:48 ` Yury Norov
2024-01-18 23:25 ` Lucas De Marchi
2024-01-18 23:25 ` Lucas De Marchi
2024-01-19 2:01 ` Yury Norov
2024-01-19 2:01 ` Yury Norov
2024-01-19 15:07 ` Lucas De Marchi
2024-01-19 15:07 ` Lucas De Marchi
2023-05-09 5:14 ` [Intel-gfx] [PATCH 3/3] drm/i915: Temporary conversion to new GENMASK/BIT macros Lucas De Marchi
2023-05-09 5:14 ` Lucas De Marchi
2023-05-09 5:14 ` Lucas De Marchi
2023-05-09 5:14 ` [Intel-xe] " Lucas De Marchi
2023-05-09 7:57 ` [Intel-gfx] " Jani Nikula
2023-05-09 7:57 ` Jani Nikula
2023-05-09 7:57 ` Jani Nikula
2023-05-09 7:57 ` [Intel-xe] " Jani Nikula
2023-05-09 8:15 ` [Intel-gfx] " Lucas De Marchi
2023-05-09 8:15 ` Lucas De Marchi
2023-05-09 8:15 ` Lucas De Marchi
2023-05-09 8:15 ` [Intel-xe] " Lucas De Marchi
2023-05-09 5:17 ` [Intel-xe] ✓ CI.Patch_applied: success for Fixed-width mask/bit helpers Patchwork
2023-05-09 5:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2023-05-09 5:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-09 6:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-05-09 15:56 ` [Intel-xe] ✓ CI.Patch_applied: success for Fixed-width mask/bit helpers (rev2) Patchwork
2023-05-09 15:58 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-05-09 16:01 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-05-09 16:27 ` [Intel-xe] ○ CI.BAT: info " Patchwork
2023-06-22 3:53 ` [Intel-xe] ✗ CI.Patch_applied: failure for Fixed-width mask/bit helpers (rev3) Patchwork
2023-06-27 20:01 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Fixed-width mask/bit helpers (rev2) Patchwork
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