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From: Andrea Parri <parri.andrea@gmail.com>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: paulmck@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, mmaas@google.com,
	hboehm@google.com, striker@us.ibm.com
Subject: Re: [RFC PATCH] membarrier: riscv: Provide core serializing command
Date: Fri, 4 Aug 2023 02:16:59 +0200	[thread overview]
Message-ID: <ZMxDe0gXKYbY5jgt@andrea> (raw)
In-Reply-To: <4bf79f06-4593-134a-04dd-b8f89e96a1b8@efficios.com>

> Can you double-check that riscv switch_mm() implies a fence.i or equivalent
> on the CPU doing the switch_mm ?

AFAICT, (riscv) switch_mm() does not guarantee that.


> AFAIR membarrier use of sync_core_before_usermode relies on switch_mm
> issuing a core serializing instruction.

I see.  Thanks for the clarification.

BTW, the comment in __schedule() suggests that membarrier also relies on
switch_mm() issuing a full memory barrier: I don't think this holds.

Removing the "deferred icache flush" logic in switch_mm() - in favour of
a "plain" MB; FENCE.I - would meet both of these requirements.

Other ideas?

  Andrea

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Andrea Parri <parri.andrea@gmail.com>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: paulmck@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, mmaas@google.com,
	hboehm@google.com, striker@us.ibm.com
Subject: Re: [RFC PATCH] membarrier: riscv: Provide core serializing command
Date: Fri, 4 Aug 2023 02:16:59 +0200	[thread overview]
Message-ID: <ZMxDe0gXKYbY5jgt@andrea> (raw)
In-Reply-To: <4bf79f06-4593-134a-04dd-b8f89e96a1b8@efficios.com>

> Can you double-check that riscv switch_mm() implies a fence.i or equivalent
> on the CPU doing the switch_mm ?

AFAICT, (riscv) switch_mm() does not guarantee that.


> AFAIR membarrier use of sync_core_before_usermode relies on switch_mm
> issuing a core serializing instruction.

I see.  Thanks for the clarification.

BTW, the comment in __schedule() suggests that membarrier also relies on
switch_mm() issuing a full memory barrier: I don't think this holds.

Removing the "deferred icache flush" logic in switch_mm() - in favour of
a "plain" MB; FENCE.I - would meet both of these requirements.

Other ideas?

  Andrea

  reply	other threads:[~2023-08-04  0:17 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-03  4:01 [RFC PATCH] membarrier: riscv: Provide core serializing command Andrea Parri
2023-08-03  4:01 ` Andrea Parri
2023-08-03 15:45 ` Andrea Parri
2023-08-03 15:45   ` Andrea Parri
2023-08-03 20:28   ` Mathieu Desnoyers
2023-08-03 20:28     ` Mathieu Desnoyers
2023-08-04  0:16     ` Andrea Parri [this message]
2023-08-04  0:16       ` Andrea Parri
2023-08-04 14:20       ` Mathieu Desnoyers
2023-08-04 14:20         ` Mathieu Desnoyers
2023-08-04 14:59         ` Andrea Parri
2023-08-04 14:59           ` Andrea Parri
2023-08-04 18:05           ` Mathieu Desnoyers
2023-08-04 18:05             ` Mathieu Desnoyers
2023-08-04 19:16             ` Andrea Parri
2023-08-04 19:16               ` Andrea Parri
2023-08-04 20:06               ` Mathieu Desnoyers
2023-08-04 20:06                 ` Mathieu Desnoyers
2023-08-07 13:19                 ` Andrea Parri
2023-08-07 13:19                   ` Andrea Parri
2023-10-13 17:29                   ` Palmer Dabbelt
2023-10-13 17:29                     ` Palmer Dabbelt
2023-10-13 18:49                     ` Mathieu Desnoyers
2023-10-13 18:49                       ` Mathieu Desnoyers
2023-10-16 18:27                       ` Robbin Ehn
2023-10-16 18:27                         ` Robbin Ehn
2023-11-09 19:24                       ` Andrea Parri
2023-11-09 19:24                         ` Andrea Parri
2023-11-10  6:33                         ` [PATCH 1/2] locking: Introduce prepare_sync_core_cmd() kernel test robot
2023-11-10  6:33                           ` kernel test robot
2023-11-23  1:07                         ` [RFC PATCH] membarrier: riscv: Provide core serializing command Charlie Jenkins
2023-11-23  1:07                           ` Charlie Jenkins
2023-11-23  2:13                           ` Mathieu Desnoyers
2023-11-23  2:13                             ` Mathieu Desnoyers
2023-11-27 10:44                             ` Andrea Parri
2023-11-27 10:44                               ` Andrea Parri
2023-11-23  6:52                           ` Robbin Ehn
2023-11-23  6:52                             ` Robbin Ehn

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