* [Intel-gfx] [PATCH] Revert "drm/edid: Fix csync detailed mode parsing"
@ 2023-08-15 10:19 ` Jani Nikula
0 siblings, 0 replies; 28+ messages in thread
From: Jani Nikula @ 2023-08-15 10:19 UTC (permalink / raw)
To: dri-devel; +Cc: Jani Nikula, intel-gfx, stable
This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1.
Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed
EDID detailed mode sync parsing. Unfortunately, there are quite a few
displays out there that have bogus (zero) sync field that are broken by
the change. Zero means analog composite sync, which is not right for
digital displays, and the modes get rejected. Regardless, it used to
work, and it needs to continue to work. Revert the change.
Rejecting modes with analog composite sync was the part that fixed the
gitlab issue 8146 [1]. We'll need to get back to the drawing board with
that.
[1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044
Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v6.4+
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/drm_edid.c | 29 ++++++++---------------------
include/drm/drm_edid.h | 12 +++---------
2 files changed, 11 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index f95152fac427..340da8257b51 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto
connector->base.id, connector->name);
return NULL;
}
+ if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
+ drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n",
+ connector->base.id, connector->name);
+ }
/* it is incorrect if hsync/vsync width is zero */
if (!hsync_pulse_width || !vsync_pulse_width) {
@@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto
if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
} else {
- switch (pt->misc & DRM_EDID_PT_SYNC_MASK) {
- case DRM_EDID_PT_ANALOG_CSYNC:
- case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC:
- drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n",
- connector->base.id, connector->name);
- mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC;
- break;
- case DRM_EDID_PT_DIGITAL_CSYNC:
- drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n",
- connector->base.id, connector->name);
- mode->flags |= DRM_MODE_FLAG_CSYNC;
- mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
- DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC;
- break;
- case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC:
- mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
- DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
- mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
- DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
- break;
- }
+ mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
+ DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+ mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
+ DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
}
set_size:
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 169755d3de19..48e93f909ef6 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -61,15 +61,9 @@ struct std_timing {
u8 vfreq_aspect;
} __attribute__((packed));
-#define DRM_EDID_PT_SYNC_MASK (3 << 3)
-# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3)
-# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3)
-# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3)
-# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */
-# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2)
-# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3)
-# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */
-# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
+#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
+#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
+#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3)
#define DRM_EDID_PT_STEREO (1 << 5)
#define DRM_EDID_PT_INTERLACED (1 << 7)
--
2.39.2
^ permalink raw reply related [flat|nested] 28+ messages in thread* [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" @ 2023-08-15 10:19 ` Jani Nikula 0 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-15 10:19 UTC (permalink / raw) To: dri-devel; +Cc: Jani Nikula, intel-gfx, stable This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed EDID detailed mode sync parsing. Unfortunately, there are quite a few displays out there that have bogus (zero) sync field that are broken by the change. Zero means analog composite sync, which is not right for digital displays, and the modes get rejected. Regardless, it used to work, and it needs to continue to work. Revert the change. Rejecting modes with analog composite sync was the part that fixed the gitlab issue 8146 [1]. We'll need to get back to the drawing board with that. [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v6.4+ Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- include/drm/drm_edid.h | 12 +++--------- 2 files changed, 11 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index f95152fac427..340da8257b51 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto connector->base.id, connector->name); return NULL; } + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", + connector->base.id, connector->name); + } /* it is incorrect if hsync/vsync width is zero */ if (!hsync_pulse_width || !vsync_pulse_width) { @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; } else { - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { - case DRM_EDID_PT_ANALOG_CSYNC: - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; - break; - } + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; } set_size: diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 169755d3de19..48e93f909ef6 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -61,15 +61,9 @@ struct std_timing { u8 vfreq_aspect; } __attribute__((packed)); -#define DRM_EDID_PT_SYNC_MASK (3 << 3) -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) #define DRM_EDID_PT_STEREO (1 << 5) #define DRM_EDID_PT_INTERLACED (1 << 7) -- 2.39.2 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" @ 2023-08-15 10:19 ` Jani Nikula 0 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-15 10:19 UTC (permalink / raw) To: dri-devel; +Cc: intel-gfx, ville.syrjala, Jani Nikula, stable This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed EDID detailed mode sync parsing. Unfortunately, there are quite a few displays out there that have bogus (zero) sync field that are broken by the change. Zero means analog composite sync, which is not right for digital displays, and the modes get rejected. Regardless, it used to work, and it needs to continue to work. Revert the change. Rejecting modes with analog composite sync was the part that fixed the gitlab issue 8146 [1]. We'll need to get back to the drawing board with that. [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v6.4+ Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- include/drm/drm_edid.h | 12 +++--------- 2 files changed, 11 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index f95152fac427..340da8257b51 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto connector->base.id, connector->name); return NULL; } + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", + connector->base.id, connector->name); + } /* it is incorrect if hsync/vsync width is zero */ if (!hsync_pulse_width || !vsync_pulse_width) { @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; } else { - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { - case DRM_EDID_PT_ANALOG_CSYNC: - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; - break; - } + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; } set_size: diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 169755d3de19..48e93f909ef6 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -61,15 +61,9 @@ struct std_timing { u8 vfreq_aspect; } __attribute__((packed)); -#define DRM_EDID_PT_SYNC_MASK (3 << 3) -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) #define DRM_EDID_PT_STEREO (1 << 5) #define DRM_EDID_PT_INTERLACED (1 << 7) -- 2.39.2 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-gfx] [PATCH v2 1/2] Revert "drm/edid: Fix csync detailed mode parsing" 2023-08-15 10:19 ` Jani Nikula @ 2023-08-15 10:19 ` Dirk Lehmann -1 siblings, 0 replies; 28+ messages in thread From: Dirk Lehmann @ 2023-08-15 10:19 UTC (permalink / raw) To: stable; +Cc: Jani Nikula, intel-gfx, Dirk Lehmann, dri-devel From: Jani Nikula <jani.nikula@intel.com> This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed EDID detailed mode sync parsing. Unfortunately, there are quite a few displays out there that have bogus (zero) sync field that are broken by the change. Zero means analog composite sync, which is not right for digital displays, and the modes get rejected. Regardless, it used to work, and it needs to continue to work. Revert the change. Rejecting modes with analog composite sync was the part that fixed the gitlab issue 8146 [1]. We'll need to get back to the drawing board with that. [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v6.4+ Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- include/drm/drm_edid.h | 12 +++--------- 2 files changed, 11 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index e0dbd9140726..1f470968ed14 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3456,6 +3456,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto connector->base.id, connector->name); return NULL; } + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", + connector->base.id, connector->name); + } /* it is incorrect if hsync/vsync width is zero */ if (!hsync_pulse_width || !vsync_pulse_width) { @@ -3502,27 +3506,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; } else { - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { - case DRM_EDID_PT_ANALOG_CSYNC: - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; - break; - } + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; } set_size: diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 169755d3de19..48e93f909ef6 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -61,15 +61,9 @@ struct std_timing { u8 vfreq_aspect; } __attribute__((packed)); -#define DRM_EDID_PT_SYNC_MASK (3 << 3) -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) #define DRM_EDID_PT_STEREO (1 << 5) #define DRM_EDID_PT_INTERLACED (1 << 7) -- 2.40.1 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 1/2] Revert "drm/edid: Fix csync detailed mode parsing" @ 2023-08-15 10:19 ` Dirk Lehmann 0 siblings, 0 replies; 28+ messages in thread From: Dirk Lehmann @ 2023-08-15 10:19 UTC (permalink / raw) To: stable; +Cc: Jani Nikula, intel-gfx, Dirk Lehmann, dri-devel From: Jani Nikula <jani.nikula@intel.com> This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed EDID detailed mode sync parsing. Unfortunately, there are quite a few displays out there that have bogus (zero) sync field that are broken by the change. Zero means analog composite sync, which is not right for digital displays, and the modes get rejected. Regardless, it used to work, and it needs to continue to work. Revert the change. Rejecting modes with analog composite sync was the part that fixed the gitlab issue 8146 [1]. We'll need to get back to the drawing board with that. [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v6.4+ Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- include/drm/drm_edid.h | 12 +++--------- 2 files changed, 11 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index e0dbd9140726..1f470968ed14 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3456,6 +3456,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto connector->base.id, connector->name); return NULL; } + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", + connector->base.id, connector->name); + } /* it is incorrect if hsync/vsync width is zero */ if (!hsync_pulse_width || !vsync_pulse_width) { @@ -3502,27 +3506,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; } else { - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { - case DRM_EDID_PT_ANALOG_CSYNC: - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_CSYNC: - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", - connector->base.id, connector->name); - mode->flags |= DRM_MODE_FLAG_CSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; - break; - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; - break; - } + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; } set_size: diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 169755d3de19..48e93f909ef6 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -61,15 +61,9 @@ struct std_timing { u8 vfreq_aspect; } __attribute__((packed)); -#define DRM_EDID_PT_SYNC_MASK (3 << 3) -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) #define DRM_EDID_PT_STEREO (1 << 5) #define DRM_EDID_PT_INTERLACED (1 << 7) -- 2.40.1 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/edid: Fix csync detailed mode parsing" 2023-08-15 10:19 ` Jani Nikula ` (2 preceding siblings ...) (?) @ 2023-08-15 11:03 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-15 11:03 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" URL : https://patchwork.freedesktop.org/series/122455/ State : warning == Summary == Error: dim checkpatch failed /home/kbuild/linux/maintainer-tools/dim: line 50: /home/kbuild/.dimrc: No such file or directory ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Revert "drm/edid: Fix csync detailed mode parsing" 2023-08-15 10:19 ` Jani Nikula ` (3 preceding siblings ...) (?) @ 2023-08-15 11:03 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-15 11:03 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" URL : https://patchwork.freedesktop.org/series/122455/ State : warning == Summary == Error: dim sparse failed /home/kbuild/linux/maintainer-tools/dim: line 50: /home/kbuild/.dimrc: No such file or directory ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/edid: Fix csync detailed mode parsing" 2023-08-15 10:19 ` Jani Nikula ` (4 preceding siblings ...) (?) @ 2023-08-15 11:19 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-15 11:19 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 5650 bytes --] == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" URL : https://patchwork.freedesktop.org/series/122455/ State : success == Summary == CI Bug Log - changes from CI_DRM_13518 -> Patchwork_122455v1 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/index.html Participating hosts (41 -> 39) ------------------------------ Missing (2): fi-kbl-soraka fi-snb-2520m Known issues ------------ Here are the changes found in Patchwork_122455v1 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_auth@basic-auth: - bat-adlp-11: NOTRUN -> [ABORT][1] ([i915#8011]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-adlp-11/igt@core_auth@basic-auth.html * igt@i915_selftest@live@requests: - bat-rpls-1: [PASS][2] -> [ABORT][3] ([i915#4983] / [i915#7911] / [i915#7920]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-rpls-1/igt@i915_selftest@live@requests.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-rpls-1/igt@i915_selftest@live@requests.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - bat-jsl-3: NOTRUN -> [SKIP][4] ([i915#7828]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-jsl-3/igt@kms_chamelium_hpd@common-hpd-after-suspend.html #### Possible fixes #### * igt@gem_exec_suspend@basic-s0@smem: - bat-jsl-3: [ABORT][5] ([i915#5122]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-jsl-3/igt@gem_exec_suspend@basic-s0@smem.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-jsl-3/igt@gem_exec_suspend@basic-s0@smem.html * igt@i915_selftest@live@gt_mocs: - bat-mtlp-6: [DMESG-FAIL][7] ([i915#7059]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-mtlp-6/igt@i915_selftest@live@gt_mocs.html * igt@i915_selftest@live@migrate: - bat-dg2-11: [DMESG-WARN][9] ([i915#7699]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-dg2-11/igt@i915_selftest@live@migrate.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-dg2-11/igt@i915_selftest@live@migrate.html * igt@i915_suspend@basic-s3-without-i915: - bat-jsl-3: [FAIL][11] ([fdo#103375]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-jsl-3/igt@i915_suspend@basic-s3-without-i915.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-jsl-3/igt@i915_suspend@basic-s3-without-i915.html #### Warnings #### * igt@i915_module_load@load: - bat-adlp-11: [ABORT][13] ([i915#4423]) -> [DMESG-WARN][14] ([i915#4423]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-adlp-11/igt@i915_module_load@load.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-adlp-11/igt@i915_module_load@load.html * igt@i915_selftest@live@requests: - bat-mtlp-8: [DMESG-FAIL][15] ([i915#8497]) -> [ABORT][16] ([i915#7982] / [i915#8865]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-mtlp-8/igt@i915_selftest@live@requests.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-mtlp-8/igt@i915_selftest@live@requests.html * igt@kms_psr@cursor_plane_move: - bat-rplp-1: [SKIP][17] ([i915#1072]) -> [ABORT][18] ([i915#8469] / [i915#8668]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/bat-rplp-1/igt@kms_psr@cursor_plane_move.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/bat-rplp-1/igt@kms_psr@cursor_plane_move.html [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423 [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983 [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122 [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059 [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911 [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920 [i915#7982]: https://gitlab.freedesktop.org/drm/intel/issues/7982 [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011 [i915#8469]: https://gitlab.freedesktop.org/drm/intel/issues/8469 [i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497 [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668 [i915#8865]: https://gitlab.freedesktop.org/drm/intel/issues/8865 Build changes ------------- * Linux: CI_DRM_13518 -> Patchwork_122455v1 CI-20190529: 20190529 CI_DRM_13518: b937a59ef0ca09d52d76f4f7d433e6b621f669d4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7436: 81e08c6d648e949df161a4f39118ed3eb1e354e9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_122455v1: b937a59ef0ca09d52d76f4f7d433e6b621f669d4 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 3ac409922073 Revert "drm/edid: Fix csync detailed mode parsing" == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/index.html [-- Attachment #2: Type: text/html, Size: 6563 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Revert "drm/edid: Fix csync detailed mode parsing" 2023-08-15 10:19 ` Jani Nikula ` (5 preceding siblings ...) (?) @ 2023-08-15 12:40 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-15 12:40 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 49799 bytes --] == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" URL : https://patchwork.freedesktop.org/series/122455/ State : success == Summary == CI Bug Log - changes from CI_DRM_13518_full -> Patchwork_122455v1_full ==================================================== Summary ------- **WARNING** Minor unknown changes coming with Patchwork_122455v1_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_122455v1_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_122455v1_full: ### IGT changes ### #### Warnings #### * igt@kms_cursor_crc@cursor-sliding-64x64@pipe-a-edp-1: - shard-mtlp: [DMESG-WARN][1] ([i915#1982] / [i915#2017]) -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-2/igt@kms_cursor_crc@cursor-sliding-64x64@pipe-a-edp-1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-7/igt@kms_cursor_crc@cursor-sliding-64x64@pipe-a-edp-1.html Known issues ------------ Here are the changes found in Patchwork_122455v1_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@drm_fdinfo@virtual-busy-idle-all: - shard-mtlp: NOTRUN -> [SKIP][3] ([i915#8414]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@drm_fdinfo@virtual-busy-idle-all.html * igt@gem_busy@close-race: - shard-rkl: [PASS][4] -> [ABORT][5] ([i915#6016]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-rkl-7/igt@gem_busy@close-race.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-2/igt@gem_busy@close-race.html * igt@gem_ctx_persistence@engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-snb4/igt@gem_ctx_persistence@engines-mixed-process.html * igt@gem_ctx_persistence@heartbeat-stop: - shard-dg2: NOTRUN -> [SKIP][7] ([i915#8555]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@gem_ctx_persistence@heartbeat-stop.html * igt@gem_ctx_sseu@invalid-sseu: - shard-dg2: NOTRUN -> [SKIP][8] ([i915#280]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@gem_ctx_sseu@invalid-sseu.html * igt@gem_eio@in-flight-contexts-immediate: - shard-mtlp: [PASS][9] -> [ABORT][10] ([i915#8503]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-3/igt@gem_eio@in-flight-contexts-immediate.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-8/igt@gem_eio@in-flight-contexts-immediate.html * igt@gem_exec_fair@basic-pace: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#3539]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@gem_exec_fair@basic-pace.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglu: [PASS][12] -> [FAIL][13] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-tglu-9/igt@gem_exec_fair@basic-pace-share@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-tglu-7/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-rkl: [PASS][14] -> [FAIL][15] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-rkl-4/igt@gem_exec_fair@basic-pace@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-4/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_flush@basic-wb-rw-before-default: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#3539] / [i915#4852]) +3 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-10/igt@gem_exec_flush@basic-wb-rw-before-default.html * igt@gem_exec_reloc@basic-cpu-wc-active: - shard-mtlp: NOTRUN -> [SKIP][17] ([i915#3281]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@gem_exec_reloc@basic-cpu-wc-active.html * igt@gem_exec_reloc@basic-range: - shard-dg2: NOTRUN -> [SKIP][18] ([i915#3281]) +3 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@gem_exec_reloc@basic-range.html * igt@gem_exec_suspend@basic-s4-devices@lmem0: - shard-dg2: NOTRUN -> [ABORT][19] ([i915#7975] / [i915#8213]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-10/igt@gem_exec_suspend@basic-s4-devices@lmem0.html * igt@gem_lmem_swapping@smem-oom@lmem0: - shard-dg2: [PASS][20] -> [TIMEOUT][21] ([i915#5493]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-11/igt@gem_lmem_swapping@smem-oom@lmem0.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-1/igt@gem_lmem_swapping@smem-oom@lmem0.html * igt@gem_madvise@dontneed-before-exec: - shard-dg1: NOTRUN -> [SKIP][22] ([i915#3282]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@gem_madvise@dontneed-before-exec.html * igt@gem_mmap_gtt@basic: - shard-dg2: NOTRUN -> [SKIP][23] ([i915#4077]) +5 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@gem_mmap_gtt@basic.html * igt@gem_mmap_gtt@medium-copy: - shard-mtlp: NOTRUN -> [SKIP][24] ([i915#4077]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-5/igt@gem_mmap_gtt@medium-copy.html * igt@gem_mmap_wc@write-read-distinct: - shard-dg2: NOTRUN -> [SKIP][25] ([i915#4083]) +2 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@gem_mmap_wc@write-read-distinct.html * igt@gem_partial_pwrite_pread@write-uncached: - shard-dg2: NOTRUN -> [SKIP][26] ([i915#3282]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@gem_partial_pwrite_pread@write-uncached.html * igt@gem_pxp@protected-encrypted-src-copy-not-readible: - shard-mtlp: NOTRUN -> [SKIP][27] ([i915#4270]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html * igt@gem_pxp@regular-baseline-src-copy-readible: - shard-dg2: NOTRUN -> [SKIP][28] ([i915#4270]) +1 similar issue [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@gem_pxp@regular-baseline-src-copy-readible.html * igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs: - shard-mtlp: NOTRUN -> [SKIP][29] ([i915#8428]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs.html * igt@gem_set_tiling_vs_pwrite: - shard-dg1: NOTRUN -> [SKIP][30] ([i915#4079]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@gem_set_tiling_vs_pwrite.html * igt@gem_unfence_active_buffers: - shard-dg2: NOTRUN -> [SKIP][31] ([i915#4879]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@gem_unfence_active_buffers.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap: - shard-dg2: NOTRUN -> [SKIP][32] ([i915#3297] / [i915#4880]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html * igt@gen7_exec_parse@chained-batch: - shard-dg2: NOTRUN -> [SKIP][33] ([fdo#109289]) +2 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@gen7_exec_parse@chained-batch.html * igt@gen9_exec_parse@bb-large: - shard-dg2: NOTRUN -> [SKIP][34] ([i915#2856]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@gen9_exec_parse@bb-large.html * igt@i915_pipe_stress@stress-xrgb8888-untiled: - shard-mtlp: [PASS][35] -> [FAIL][36] ([i915#8691]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-5/igt@i915_pipe_stress@stress-xrgb8888-untiled.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-7/igt@i915_pipe_stress@stress-xrgb8888-untiled.html * igt@i915_pm_backlight@fade: - shard-dg2: NOTRUN -> [SKIP][37] ([i915#5354] / [i915#7561]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@i915_pm_backlight@fade.html * igt@i915_pm_dc@dc5-psr: - shard-dg2: NOTRUN -> [SKIP][38] ([i915#658]) +2 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@i915_pm_dc@dc5-psr.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a: - shard-rkl: [PASS][39] -> [SKIP][40] ([i915#1937]) [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-rkl-7/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html * igt@i915_pm_rc6_residency@rc6-idle@vecs0: - shard-dg1: [PASS][41] -> [FAIL][42] ([i915#3591]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html * igt@i915_pm_rpm@modeset-lpsp: - shard-dg2: NOTRUN -> [SKIP][43] ([i915#1397]) +1 similar issue [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@i915_pm_rpm@modeset-lpsp.html * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait: - shard-dg2: [PASS][44] -> [SKIP][45] ([i915#1397]) +1 similar issue [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-12/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-1/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html - shard-dg1: NOTRUN -> [SKIP][46] ([i915#1397]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@i915_pm_rpm@modeset-non-lpsp-stress: - shard-rkl: [PASS][47] -> [SKIP][48] ([i915#1397]) +3 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-rkl-1/igt@i915_pm_rpm@modeset-non-lpsp-stress.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp-stress.html * igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait: - shard-dg1: [PASS][49] -> [SKIP][50] ([i915#1397]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-15/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-19/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html * igt@i915_pm_rpm@modeset-pc8-residency-stress: - shard-mtlp: NOTRUN -> [SKIP][51] ([fdo#109293]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-8/igt@i915_pm_rpm@modeset-pc8-residency-stress.html * igt@i915_pm_rps@min-max-config-loaded: - shard-dg2: NOTRUN -> [SKIP][52] ([i915#6621]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-10/igt@i915_pm_rps@min-max-config-loaded.html * igt@i915_query@query-topology-coherent-slice-mask: - shard-dg2: NOTRUN -> [SKIP][53] ([i915#6188]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@i915_query@query-topology-coherent-slice-mask.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - shard-dg2: NOTRUN -> [SKIP][54] ([i915#5190]) +9 similar issues [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1: - shard-mtlp: NOTRUN -> [FAIL][55] ([i915#2521]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-5/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1.html * igt@kms_async_flips@crc@pipe-b-dp-2: - shard-dg2: NOTRUN -> [FAIL][56] ([i915#8247]) +3 similar issues [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_async_flips@crc@pipe-b-dp-2.html * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels: - shard-snb: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#1769]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-snb2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html * igt@kms_big_fb@4-tiled-64bpp-rotate-180: - shard-mtlp: [PASS][58] -> [FAIL][59] ([i915#5138]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-8/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-mtlp: [PASS][60] -> [FAIL][61] ([i915#3743]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@x-tiled-16bpp-rotate-90: - shard-dg2: NOTRUN -> [SKIP][62] ([fdo#111614]) +1 similar issue [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-0: - shard-dg1: NOTRUN -> [SKIP][63] ([i915#4538]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-64bpp-rotate-0: - shard-mtlp: NOTRUN -> [SKIP][64] ([fdo#111615]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-dg2: NOTRUN -> [SKIP][65] ([i915#4538] / [i915#5190]) +2 similar issues [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs: - shard-mtlp: NOTRUN -> [SKIP][66] ([i915#3886] / [i915#6095]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-5/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-bad-pixel-format-4_tiled_dg2_mc_ccs: - shard-mtlp: NOTRUN -> [SKIP][67] ([i915#6095]) +2 similar issues [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-8/igt@kms_ccs@pipe-c-bad-pixel-format-4_tiled_dg2_mc_ccs.html * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc: - shard-dg2: NOTRUN -> [SKIP][68] ([i915#3689] / [i915#3886] / [i915#5354]) +4 similar issues [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-d-bad-aux-stride-y_tiled_ccs: - shard-dg2: NOTRUN -> [SKIP][69] ([i915#3689] / [i915#5354]) +14 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_ccs@pipe-d-bad-aux-stride-y_tiled_ccs.html * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs: - shard-dg1: NOTRUN -> [SKIP][70] ([i915#3689] / [i915#5354] / [i915#6095]) +1 similar issue [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html * igt@kms_cdclk@mode-transition@pipe-a-dp-2: - shard-dg2: NOTRUN -> [SKIP][71] ([i915#4087] / [i915#7213]) +3 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_cdclk@mode-transition@pipe-a-dp-2.html * igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][72] ([i915#4087]) +3 similar issues [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-6/igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3.html * igt@kms_chamelium_audio@dp-audio: - shard-tglu: NOTRUN -> [SKIP][73] ([i915#7828]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-tglu-3/igt@kms_chamelium_audio@dp-audio.html * igt@kms_chamelium_color@ctm-0-25: - shard-dg2: NOTRUN -> [SKIP][74] ([fdo#111827]) +1 similar issue [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-10/igt@kms_chamelium_color@ctm-0-25.html * igt@kms_chamelium_color@ctm-blue-to-red: - shard-dg1: NOTRUN -> [SKIP][75] ([fdo#111827]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_chamelium_color@ctm-blue-to-red.html * igt@kms_chamelium_frames@hdmi-cmp-planar-formats: - shard-mtlp: NOTRUN -> [SKIP][76] ([i915#7828]) +2 similar issues [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html * igt@kms_chamelium_hpd@dp-hpd-fast: - shard-dg2: NOTRUN -> [SKIP][77] ([i915#7828]) +3 similar issues [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_chamelium_hpd@dp-hpd-fast.html * igt@kms_content_protection@atomic-dpms: - shard-dg2: NOTRUN -> [SKIP][78] ([i915#7118]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-6/igt@kms_content_protection@atomic-dpms.html * igt@kms_content_protection@dp-mst-type-0: - shard-dg2: NOTRUN -> [SKIP][79] ([i915#3299]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_content_protection@dp-mst-type-0.html * igt@kms_content_protection@lic@pipe-a-dp-2: - shard-dg2: NOTRUN -> [TIMEOUT][80] ([i915#7173]) +2 similar issues [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_content_protection@lic@pipe-a-dp-2.html * igt@kms_cursor_crc@cursor-onscreen-max-size: - shard-dg1: NOTRUN -> [SKIP][81] ([i915#3555]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_cursor_crc@cursor-onscreen-max-size.html * igt@kms_cursor_crc@cursor-random-512x170: - shard-dg2: NOTRUN -> [SKIP][82] ([i915#3359]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_cursor_crc@cursor-random-512x170.html * igt@kms_cursor_crc@cursor-sliding-256x85@pipe-d-edp-1: - shard-mtlp: [PASS][83] -> [DMESG-WARN][84] ([i915#8561]) +1 similar issue [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-7/igt@kms_cursor_crc@cursor-sliding-256x85@pipe-d-edp-1.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-6/igt@kms_cursor_crc@cursor-sliding-256x85@pipe-d-edp-1.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-dg2: NOTRUN -> [SKIP][85] ([fdo#109274] / [i915#5354]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_flip@2x-absolute-wf_vblank-interruptible: - shard-dg2: NOTRUN -> [SKIP][86] ([fdo#109274]) +2 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html * igt@kms_flip@2x-flip-vs-blocking-wf-vblank: - shard-dg2: NOTRUN -> [SKIP][87] ([fdo#109274] / [fdo#111767]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html * igt@kms_flip@2x-flip-vs-rmfb-interruptible: - shard-dg1: NOTRUN -> [SKIP][88] ([fdo#111767] / [fdo#111825]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2: - shard-glk: [PASS][89] -> [FAIL][90] ([i915#2122]) +1 similar issue [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-glk2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-glk8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible@bc-hdmi-a1-hdmi-a2.html * igt@kms_flip@2x-plain-flip-ts-check-interruptible: - shard-mtlp: NOTRUN -> [SKIP][91] ([i915#3637]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][92] ([i915#2672]) +1 similar issue [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt: - shard-dg2: NOTRUN -> [FAIL][93] ([i915#6880]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-dg2: [PASS][94] -> [FAIL][95] ([i915#6880]) [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render: - shard-dg1: NOTRUN -> [SKIP][96] ([fdo#111825]) +3 similar issues [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt: - shard-dg2: NOTRUN -> [SKIP][97] ([i915#3458]) +9 similar issues [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-wc: - shard-dg1: NOTRUN -> [SKIP][98] ([i915#8708]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc: - shard-dg2: NOTRUN -> [SKIP][99] ([i915#8708]) +8 similar issues [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff: - shard-mtlp: NOTRUN -> [SKIP][100] ([i915#1825]) [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y: - shard-dg2: NOTRUN -> [SKIP][101] ([i915#5460]) +1 similar issue [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt: - shard-dg1: NOTRUN -> [SKIP][102] ([i915#3458]) [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt: - shard-dg2: NOTRUN -> [SKIP][103] ([i915#5354]) +21 similar issues [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html * igt@kms_hdr@bpc-switch-dpms: - shard-rkl: NOTRUN -> [SKIP][104] ([i915#3555] / [i915#8228]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-2/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_hdr@static-toggle-dpms: - shard-mtlp: NOTRUN -> [SKIP][105] ([i915#8228]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@kms_hdr@static-toggle-dpms.html * igt@kms_hdr@static-toggle-suspend: - shard-dg2: NOTRUN -> [SKIP][106] ([i915#3555] / [i915#8228]) +4 similar issues [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-1/igt@kms_hdr@static-toggle-suspend.html * igt@kms_plane_lowres@tiling-y: - shard-dg2: NOTRUN -> [SKIP][107] ([i915#8821]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_plane_lowres@tiling-y.html * igt@kms_plane_multiple@tiling-y@pipe-a-hdmi-a-2: - shard-rkl: [PASS][108] -> [ABORT][109] ([i915#8178] / [i915#8875]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-rkl-4/igt@kms_plane_multiple@tiling-y@pipe-a-hdmi-a-2.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-4/igt@kms_plane_multiple@tiling-y@pipe-a-hdmi-a-2.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1: - shard-rkl: NOTRUN -> [FAIL][110] ([i915#8292]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-7/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-a-dp-4: - shard-dg2: NOTRUN -> [SKIP][111] ([i915#5176]) +3 similar issues [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-a-dp-4.html * igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-b-hdmi-a-1: - shard-rkl: NOTRUN -> [SKIP][112] ([i915#5176]) +3 similar issues [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-b-hdmi-a-1.html * igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-4: - shard-dg1: NOTRUN -> [SKIP][113] ([i915#5176]) +15 similar issues [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-16/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-4.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][114] ([i915#5235]) +11 similar issues [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-a-hdmi-a-3.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][115] ([i915#5235]) +5 similar issues [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-hdmi-a-2.html * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4: - shard-dg1: NOTRUN -> [SKIP][116] ([i915#5235]) +11 similar issues [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html * igt@kms_prime@basic-modeset-hybrid: - shard-dg2: NOTRUN -> [SKIP][117] ([i915#6524] / [i915#6805]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_prime@basic-modeset-hybrid.html * igt@kms_psr@psr2_sprite_mmap_gtt: - shard-dg2: NOTRUN -> [SKIP][118] ([i915#1072]) +4 similar issues [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_psr@psr2_sprite_mmap_gtt.html * igt@kms_rotation_crc@exhaust-fences: - shard-mtlp: NOTRUN -> [SKIP][119] ([i915#4235]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@kms_rotation_crc@exhaust-fences.html * igt@kms_rotation_crc@sprite-rotation-270: - shard-dg2: NOTRUN -> [SKIP][120] ([i915#4235]) +1 similar issue [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_rotation_crc@sprite-rotation-270.html * igt@kms_selftest@drm_damage: - shard-snb: NOTRUN -> [SKIP][121] ([fdo#109271] / [i915#8661]) [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-snb2/igt@kms_selftest@drm_damage.html * igt@kms_selftest@drm_plane: - shard-dg2: NOTRUN -> [SKIP][122] ([i915#8661]) +1 similar issue [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@kms_selftest@drm_plane.html * igt@kms_setmode@basic-clone-single-crtc: - shard-dg2: NOTRUN -> [SKIP][123] ([i915#3555]) +2 similar issues [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_setmode@basic-clone-single-crtc.html * igt@kms_sysfs_edid_timing: - shard-dg2: [PASS][124] -> [FAIL][125] ([IGT#2]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-12/igt@kms_sysfs_edid_timing.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-2/igt@kms_sysfs_edid_timing.html * igt@kms_tv_load_detect@load-detect: - shard-snb: NOTRUN -> [SKIP][126] ([fdo#109271]) +262 similar issues [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-snb4/igt@kms_tv_load_detect@load-detect.html * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend: - shard-snb: NOTRUN -> [DMESG-WARN][127] ([i915#8841]) +4 similar issues [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-snb2/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html * igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend: - shard-dg2: [PASS][128] -> [INCOMPLETE][129] ([i915#7838]) [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-2/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-1/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html * igt@kms_vrr@flip-suspend: - shard-mtlp: NOTRUN -> [SKIP][130] ([i915#8808]) [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-5/igt@kms_vrr@flip-suspend.html * igt@kms_writeback@writeback-check-output: - shard-dg2: NOTRUN -> [SKIP][131] ([i915#2437]) [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@kms_writeback@writeback-check-output.html * igt@perf_pmu@busy-double-start@vecs1: - shard-dg2: [PASS][132] -> [FAIL][133] ([i915#4349]) +3 similar issues [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-12/igt@perf_pmu@busy-double-start@vecs1.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-1/igt@perf_pmu@busy-double-start@vecs1.html * igt@v3d/v3d_job_submission@multiple-singlesync-to-multisync: - shard-dg2: NOTRUN -> [SKIP][134] ([i915#2575]) +5 similar issues [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-12/igt@v3d/v3d_job_submission@multiple-singlesync-to-multisync.html * igt@v3d/v3d_perfmon@create-perfmon-invalid-counters: - shard-mtlp: NOTRUN -> [SKIP][135] ([i915#2575]) [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-8/igt@v3d/v3d_perfmon@create-perfmon-invalid-counters.html * igt@v3d/v3d_submit_cl@bad-flag: - shard-dg1: NOTRUN -> [SKIP][136] ([i915#2575]) [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@v3d/v3d_submit_cl@bad-flag.html * igt@vc4/vc4_perfmon@destroy-valid-perfmon: - shard-dg2: NOTRUN -> [SKIP][137] ([i915#7711]) +3 similar issues [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-11/igt@vc4/vc4_perfmon@destroy-valid-perfmon.html * igt@vc4/vc4_perfmon@get-values-invalid-perfmon: - shard-mtlp: NOTRUN -> [SKIP][138] ([i915#7711]) [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@vc4/vc4_perfmon@get-values-invalid-perfmon.html #### Possible fixes #### * igt@drm_fdinfo@most-busy-idle-check-all@rcs0: - shard-rkl: [FAIL][139] ([i915#7742]) -> [PASS][140] [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-2/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-tglu: [FAIL][141] ([i915#6268]) -> [PASS][142] [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-tglu-5/igt@gem_ctx_exec@basic-nohangcheck.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-tglu-3/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_eio@hibernate: - shard-tglu: [ABORT][143] ([i915#7975] / [i915#8213] / [i915#8398]) -> [PASS][144] [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-tglu-10/igt@gem_eio@hibernate.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-tglu-3/igt@gem_eio@hibernate.html * igt@gem_eio@kms: - shard-glk: [FAIL][145] ([i915#8764]) -> [PASS][146] [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-glk6/igt@gem_eio@kms.html [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-glk7/igt@gem_eio@kms.html - shard-apl: [FAIL][147] ([i915#8764]) -> [PASS][148] [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-apl1/igt@gem_eio@kms.html [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-apl4/igt@gem_eio@kms.html * igt@gem_exec_capture@pi@bcs0: - shard-mtlp: [FAIL][149] ([i915#4475] / [i915#7765]) -> [PASS][150] [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-7/igt@gem_exec_capture@pi@bcs0.html [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-3/igt@gem_exec_capture@pi@bcs0.html * igt@gem_mmap_offset@clear@smem0: - shard-dg1: [FAIL][151] ([i915#7962]) -> [PASS][152] [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-14/igt@gem_mmap_offset@clear@smem0.html [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-18/igt@gem_mmap_offset@clear@smem0.html * igt@gem_softpin@allocator-evict@vecs0: - shard-dg1: [INCOMPLETE][153] -> [PASS][154] [153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-18/igt@gem_softpin@allocator-evict@vecs0.html [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@gem_softpin@allocator-evict@vecs0.html * igt@i915_module_load@reload-with-fault-injection: - shard-mtlp: [ABORT][155] ([i915#8489] / [i915#8668]) -> [PASS][156] [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-2/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_rc6_residency@rc6-idle@bcs0: - shard-dg1: [FAIL][157] ([i915#3591]) -> [PASS][158] [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp: - shard-dg2: [SKIP][159] ([i915#1397]) -> [PASS][160] [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-12/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-6/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html - shard-dg1: [SKIP][161] ([i915#1397]) -> [PASS][162] +2 similar issues [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-19/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-14/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html * igt@i915_suspend@sysfs-reader: - shard-mtlp: [FAIL][163] ([fdo#103375]) -> [PASS][164] +1 similar issue [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-7/igt@i915_suspend@sysfs-reader.html [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-3/igt@i915_suspend@sysfs-reader.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0: - shard-mtlp: [FAIL][165] ([i915#5138]) -> [PASS][166] [165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt: - shard-dg2: [FAIL][167] ([i915#6880]) -> [PASS][168] +1 similar issue [167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html * igt@kms_plane@pixel-format-source-clamping@pipe-b-planes: - shard-mtlp: [FAIL][169] ([i915#1623]) -> [PASS][170] [169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-mtlp-7/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-mtlp-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes: - shard-dg2: [FAIL][171] ([fdo#103375]) -> [PASS][172] [171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-11/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html #### Warnings #### * igt@i915_pm_rc6_residency@rc6-idle@bcs0: - shard-tglu: [FAIL][173] ([i915#2681] / [i915#3591]) -> [WARN][174] ([i915#2681]) [173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-tglu-5/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-tglu-3/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html * igt@kms_content_protection@mei_interface: - shard-dg2: [SKIP][175] ([i915#7118] / [i915#7162]) -> [SKIP][176] ([i915#7118]) +1 similar issue [175]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg2-11/igt@kms_content_protection@mei_interface.html [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg2-2/igt@kms_content_protection@mei_interface.html * igt@kms_fbcon_fbt@psr-suspend: - shard-rkl: [SKIP][177] ([fdo#110189] / [i915#3955]) -> [SKIP][178] ([i915#3955]) [177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-rkl-2/igt@kms_fbcon_fbt@psr-suspend.html [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-rkl-7/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_psr@primary_mmap_gtt: - shard-dg1: [SKIP][179] ([i915#1072] / [i915#4078]) -> [SKIP][180] ([i915#1072]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-16/igt@kms_psr@primary_mmap_gtt.html [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-15/igt@kms_psr@primary_mmap_gtt.html * igt@kms_psr@sprite_plane_onoff: - shard-dg1: [SKIP][181] ([i915#1072]) -> [SKIP][182] ([i915#1072] / [i915#4078]) +1 similar issue [181]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13518/shard-dg1-19/igt@kms_psr@sprite_plane_onoff.html [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/shard-dg1-16/igt@kms_psr@sprite_plane_onoff.html [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2 [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1623]: https://gitlab.freedesktop.org/drm/intel/issues/1623 [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087 [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349 [i915#4475]: https://gitlab.freedesktop.org/drm/intel/issues/4475 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852 [i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879 [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880 [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#5460]: https://gitlab.freedesktop.org/drm/intel/issues/5460 [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493 [i915#6016]: https://gitlab.freedesktop.org/drm/intel/issues/6016 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6188]: https://gitlab.freedesktop.org/drm/intel/issues/6188 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621 [i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805 [i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7162]: https://gitlab.freedesktop.org/drm/intel/issues/7162 [i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173 [i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213 [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742 [i915#7765]: https://gitlab.freedesktop.org/drm/intel/issues/7765 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#7838]: https://gitlab.freedesktop.org/drm/intel/issues/7838 [i915#7962]: https://gitlab.freedesktop.org/drm/intel/issues/7962 [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975 [i915#8178]: https://gitlab.freedesktop.org/drm/intel/issues/8178 [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213 [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228 [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247 [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292 [i915#8398]: https://gitlab.freedesktop.org/drm/intel/issues/8398 [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414 [i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428 [i915#8489]: https://gitlab.freedesktop.org/drm/intel/issues/8489 [i915#8503]: https://gitlab.freedesktop.org/drm/intel/issues/8503 [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555 [i915#8561]: https://gitlab.freedesktop.org/drm/intel/issues/8561 [i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661 [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668 [i915#8691]: https://gitlab.freedesktop.org/drm/intel/issues/8691 [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708 [i915#8764]: https://gitlab.freedesktop.org/drm/intel/issues/8764 [i915#8808]: https://gitlab.freedesktop.org/drm/intel/issues/8808 [i915#8821]: https://gitlab.freedesktop.org/drm/intel/issues/8821 [i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841 [i915#8875]: https://gitlab.freedesktop.org/drm/intel/issues/8875 Build changes ------------- * Linux: CI_DRM_13518 -> Patchwork_122455v1 CI-20190529: 20190529 CI_DRM_13518: b937a59ef0ca09d52d76f4f7d433e6b621f669d4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7436: 81e08c6d648e949df161a4f39118ed3eb1e354e9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_122455v1: b937a59ef0ca09d52d76f4f7d433e6b621f669d4 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v1/index.html [-- Attachment #2: Type: text/html, Size: 58369 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels 2023-08-15 10:19 ` Jani Nikula @ 2023-08-17 9:44 ` Dirk Lehmann -1 siblings, 0 replies; 28+ messages in thread From: Dirk Lehmann @ 2023-08-17 9:44 UTC (permalink / raw) To: stable; +Cc: Jani Nikula, intel-gfx, Dirk Lehmann, dri-devel VESA Enhanced EDID Standard does not clearly describe how display panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in the Detailed Timing Definition (relative offset 17, absolute offset 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). In practice many eDP panels which using a Digital Video Signal Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal Defintions at offset 47h[+18] blank 0x00, which would mean concerned with the VESA Standard [1] that they are using "Analog Composite Sync". Fix: Just detect Analog Sync Signal if an Analog Video Signal Interface (bit 7 at offset 14h == 0) is in use. Just detect Digital Sync Signal if an Digital Video Signal Interface is in use. Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 Signed-off-by: Dirk Lehmann <develop@dj-l.de> --- drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ include/drm/drm_edid.h | 12 +++++-- 2 files changed, 73 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 1f470968ed14..6afdc34e55ce 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto const struct drm_display_info *info = &connector->display_info; struct drm_device *dev = connector->dev; struct drm_display_mode *mode; + const struct edid *edid = drm_edid->edid; const struct detailed_pixel_timing *pt = &timing->data.pixel_data; unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto connector->base.id, connector->name); return NULL; } - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", - connector->base.id, connector->name); - } /* it is incorrect if hsync/vsync width is zero */ if (!hsync_pulse_width || !vsync_pulse_width) { @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { + /* !info->quirks && edid->input == DIGITAL */ + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 + * + * CASE DRM_EDID_PT_ANALOG_CSYNC: + * + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means + * "Analog Composite Sync" as described in VESA + * Standard. But many digital display panels without + * composite sync are also using 0x00 here. + * + * Therefore use DEFAULT: as we are currently on an + * digital video signal interface. + */ + case DRM_EDID_PT_DIGITAL_CSYNC: + drm_dbg_kms(dev, + "[CONNECTOR:%d:%s] Digital composite sync!\n", + connector->base.id, connector->name); + mode->flags |= DRM_MODE_FLAG_CSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; + break; + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: + drm_dbg_kms(dev, + "[CONNECTOR:%d:%s] Digital seperate sync!\n", + connector->base.id, connector->name); + goto digital_default; + break; /* Missing BREAK throws a compiler warning */ + default: +digital_default: + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; + break; + } } else { - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; + /* !info->quirks && edid->input == ANALOG */ + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 + * + * CASE DRM_EDID_PT_ANALOG_CSYNC: + * + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for + * "Analog Composite Sync" is possible here, as we are + * currently on an analog video signal interface. + */ + case DRM_EDID_PT_ANALOG_CSYNC: + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: + drm_dbg_kms(dev, + "[CONNECTOR:%d:%s] Analog composite sync!\n", + connector->base.id, connector->name); + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; + break; + default: + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; + break; + } } set_size: @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto } if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { - mode->width_mm = drm_edid->edid->width_cm * 10; - mode->height_mm = drm_edid->edid->height_cm * 10; + mode->width_mm = edid->width_cm * 10; + mode->height_mm = edid->height_cm * 10; } mode->type = DRM_MODE_TYPE_DRIVER; diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 48e93f909ef6..169755d3de19 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -61,9 +61,15 @@ struct std_timing { u8 vfreq_aspect; } __attribute__((packed)); -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) +#define DRM_EDID_PT_SYNC_MASK (3 << 3) +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) #define DRM_EDID_PT_STEREO (1 << 5) #define DRM_EDID_PT_INTERLACED (1 << 7) -- 2.40.1 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels @ 2023-08-17 9:44 ` Dirk Lehmann 0 siblings, 0 replies; 28+ messages in thread From: Dirk Lehmann @ 2023-08-17 9:44 UTC (permalink / raw) To: stable; +Cc: Jani Nikula, intel-gfx, Dirk Lehmann, dri-devel VESA Enhanced EDID Standard does not clearly describe how display panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in the Detailed Timing Definition (relative offset 17, absolute offset 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). In practice many eDP panels which using a Digital Video Signal Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal Defintions at offset 47h[+18] blank 0x00, which would mean concerned with the VESA Standard [1] that they are using "Analog Composite Sync". Fix: Just detect Analog Sync Signal if an Analog Video Signal Interface (bit 7 at offset 14h == 0) is in use. Just detect Digital Sync Signal if an Digital Video Signal Interface is in use. Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 Signed-off-by: Dirk Lehmann <develop@dj-l.de> --- drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ include/drm/drm_edid.h | 12 +++++-- 2 files changed, 73 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 1f470968ed14..6afdc34e55ce 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto const struct drm_display_info *info = &connector->display_info; struct drm_device *dev = connector->dev; struct drm_display_mode *mode; + const struct edid *edid = drm_edid->edid; const struct detailed_pixel_timing *pt = &timing->data.pixel_data; unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto connector->base.id, connector->name); return NULL; } - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", - connector->base.id, connector->name); - } /* it is incorrect if hsync/vsync width is zero */ if (!hsync_pulse_width || !vsync_pulse_width) { @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { + /* !info->quirks && edid->input == DIGITAL */ + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 + * + * CASE DRM_EDID_PT_ANALOG_CSYNC: + * + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means + * "Analog Composite Sync" as described in VESA + * Standard. But many digital display panels without + * composite sync are also using 0x00 here. + * + * Therefore use DEFAULT: as we are currently on an + * digital video signal interface. + */ + case DRM_EDID_PT_DIGITAL_CSYNC: + drm_dbg_kms(dev, + "[CONNECTOR:%d:%s] Digital composite sync!\n", + connector->base.id, connector->name); + mode->flags |= DRM_MODE_FLAG_CSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; + break; + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: + drm_dbg_kms(dev, + "[CONNECTOR:%d:%s] Digital seperate sync!\n", + connector->base.id, connector->name); + goto digital_default; + break; /* Missing BREAK throws a compiler warning */ + default: +digital_default: + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; + break; + } } else { - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; + /* !info->quirks && edid->input == ANALOG */ + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 + * + * CASE DRM_EDID_PT_ANALOG_CSYNC: + * + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for + * "Analog Composite Sync" is possible here, as we are + * currently on an analog video signal interface. + */ + case DRM_EDID_PT_ANALOG_CSYNC: + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: + drm_dbg_kms(dev, + "[CONNECTOR:%d:%s] Analog composite sync!\n", + connector->base.id, connector->name); + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; + break; + default: + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; + break; + } } set_size: @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto } if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { - mode->width_mm = drm_edid->edid->width_cm * 10; - mode->height_mm = drm_edid->edid->height_cm * 10; + mode->width_mm = edid->width_cm * 10; + mode->height_mm = edid->height_cm * 10; } mode->type = DRM_MODE_TYPE_DRIVER; diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index 48e93f909ef6..169755d3de19 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -61,9 +61,15 @@ struct std_timing { u8 vfreq_aspect; } __attribute__((packed)); -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) +#define DRM_EDID_PT_SYNC_MASK (3 << 3) +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) #define DRM_EDID_PT_STEREO (1 << 5) #define DRM_EDID_PT_INTERLACED (1 << 7) -- 2.40.1 ^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels 2023-08-17 9:44 ` Dirk Lehmann (?) @ 2023-08-17 13:05 ` Jani Nikula -1 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-17 13:05 UTC (permalink / raw) To: Dirk Lehmann, stable; +Cc: intel-gfx, Dirk Lehmann, dri-devel On Thu, 17 Aug 2023, Dirk Lehmann <develop@dj-l.de> wrote: > VESA Enhanced EDID Standard does not clearly describe how display > panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in > the Detailed Timing Definition (relative offset 17, absolute offset > 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). > > In practice many eDP panels which using a Digital Video Signal > Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal > Defintions at offset 47h[+18] blank 0x00, which would mean concerned > with the VESA Standard [1] that they are using "Analog Composite > Sync". > > Fix: Just detect Analog Sync Signal if an Analog Video Signal > Interface (bit 7 at offset 14h == 0) is in use. Just detect > Digital Sync Signal if an Digital Video Signal Interface is in > use. > > Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 Please don't reply with patches in-reply-to other people's patches. > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 This is now fixed by the revert that I just pushed. > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 I don't think this patch fixes that one; see below. > Signed-off-by: Dirk Lehmann <develop@dj-l.de> > --- > drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ > include/drm/drm_edid.h | 12 +++++-- > 2 files changed, 73 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index 1f470968ed14..6afdc34e55ce 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > const struct drm_display_info *info = &connector->display_info; > struct drm_device *dev = connector->dev; > struct drm_display_mode *mode; > + const struct edid *edid = drm_edid->edid; > const struct detailed_pixel_timing *pt = &timing->data.pixel_data; > unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; > unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; > @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > connector->base.id, connector->name); > return NULL; > } > - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", > - connector->base.id, connector->name); > - } > > /* it is incorrect if hsync/vsync width is zero */ > if (!hsync_pulse_width || !vsync_pulse_width) { > @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > > if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { > mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; > + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { > + /* !info->quirks && edid->input == DIGITAL */ > + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > + * > + * CASE DRM_EDID_PT_ANALOG_CSYNC: > + * > + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means > + * "Analog Composite Sync" as described in VESA > + * Standard. But many digital display panels without > + * composite sync are also using 0x00 here. > + * > + * Therefore use DEFAULT: as we are currently on an > + * digital video signal interface. > + */ > + case DRM_EDID_PT_DIGITAL_CSYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Digital composite sync!\n", > + connector->base.id, connector->name); > + mode->flags |= DRM_MODE_FLAG_CSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; > + break; > + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Digital seperate sync!\n", > + connector->base.id, connector->name); > + goto digital_default; > + break; /* Missing BREAK throws a compiler warning */ fallthrough; will do the trick. > + default: > +digital_default: > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; The failing mode in bug [1] has 0x0a for flags, so it ends up here, and for that display this patch is a no-op. As I explained in [2], all the problematic cases have invalid data, but the ones fixed by the revert need to ignore the analog sync *flags* and accept the mode, and the display in [1] needs to have the whole *mode* rejected. [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 [2] https://gitlab.freedesktop.org/drm/intel/-/issues/8789#note_2047902 > + break; > + } > } else { > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > + /* !info->quirks && edid->input == ANALOG */ > + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > + * > + * CASE DRM_EDID_PT_ANALOG_CSYNC: > + * > + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for > + * "Analog Composite Sync" is possible here, as we are > + * currently on an analog video signal interface. > + */ > + case DRM_EDID_PT_ANALOG_CSYNC: > + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Analog composite sync!\n", > + connector->base.id, connector->name); > + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; > + break; > + default: > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > + break; > + } Another angle is that for analog displays, EDID offset 0x14 has info about the supported sync modes. If we're separating digital/analog sync handling, we should probably filter the analog sync with the info from 0x14. BR, Jani. > } > > set_size: > @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > } > > if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { > - mode->width_mm = drm_edid->edid->width_cm * 10; > - mode->height_mm = drm_edid->edid->height_cm * 10; > + mode->width_mm = edid->width_cm * 10; > + mode->height_mm = edid->height_cm * 10; > } > > mode->type = DRM_MODE_TYPE_DRIVER; > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > index 48e93f909ef6..169755d3de19 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -61,9 +61,15 @@ struct std_timing { > u8 vfreq_aspect; > } __attribute__((packed)); > > -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) > -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) > +#define DRM_EDID_PT_SYNC_MASK (3 << 3) > +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) > +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) > +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) > +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ > +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) > +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) > +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ > +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > #define DRM_EDID_PT_STEREO (1 << 5) > #define DRM_EDID_PT_INTERLACED (1 << 7) -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels @ 2023-08-17 13:05 ` Jani Nikula 0 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-17 13:05 UTC (permalink / raw) To: Dirk Lehmann, stable; +Cc: intel-gfx, Dirk Lehmann, dri-devel On Thu, 17 Aug 2023, Dirk Lehmann <develop@dj-l.de> wrote: > VESA Enhanced EDID Standard does not clearly describe how display > panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in > the Detailed Timing Definition (relative offset 17, absolute offset > 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). > > In practice many eDP panels which using a Digital Video Signal > Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal > Defintions at offset 47h[+18] blank 0x00, which would mean concerned > with the VESA Standard [1] that they are using "Analog Composite > Sync". > > Fix: Just detect Analog Sync Signal if an Analog Video Signal > Interface (bit 7 at offset 14h == 0) is in use. Just detect > Digital Sync Signal if an Digital Video Signal Interface is in > use. > > Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 Please don't reply with patches in-reply-to other people's patches. > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 This is now fixed by the revert that I just pushed. > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 I don't think this patch fixes that one; see below. > Signed-off-by: Dirk Lehmann <develop@dj-l.de> > --- > drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ > include/drm/drm_edid.h | 12 +++++-- > 2 files changed, 73 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index 1f470968ed14..6afdc34e55ce 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > const struct drm_display_info *info = &connector->display_info; > struct drm_device *dev = connector->dev; > struct drm_display_mode *mode; > + const struct edid *edid = drm_edid->edid; > const struct detailed_pixel_timing *pt = &timing->data.pixel_data; > unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; > unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; > @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > connector->base.id, connector->name); > return NULL; > } > - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", > - connector->base.id, connector->name); > - } > > /* it is incorrect if hsync/vsync width is zero */ > if (!hsync_pulse_width || !vsync_pulse_width) { > @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > > if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { > mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; > + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { > + /* !info->quirks && edid->input == DIGITAL */ > + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > + * > + * CASE DRM_EDID_PT_ANALOG_CSYNC: > + * > + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means > + * "Analog Composite Sync" as described in VESA > + * Standard. But many digital display panels without > + * composite sync are also using 0x00 here. > + * > + * Therefore use DEFAULT: as we are currently on an > + * digital video signal interface. > + */ > + case DRM_EDID_PT_DIGITAL_CSYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Digital composite sync!\n", > + connector->base.id, connector->name); > + mode->flags |= DRM_MODE_FLAG_CSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; > + break; > + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Digital seperate sync!\n", > + connector->base.id, connector->name); > + goto digital_default; > + break; /* Missing BREAK throws a compiler warning */ fallthrough; will do the trick. > + default: > +digital_default: > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; The failing mode in bug [1] has 0x0a for flags, so it ends up here, and for that display this patch is a no-op. As I explained in [2], all the problematic cases have invalid data, but the ones fixed by the revert need to ignore the analog sync *flags* and accept the mode, and the display in [1] needs to have the whole *mode* rejected. [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 [2] https://gitlab.freedesktop.org/drm/intel/-/issues/8789#note_2047902 > + break; > + } > } else { > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > + /* !info->quirks && edid->input == ANALOG */ > + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > + * > + * CASE DRM_EDID_PT_ANALOG_CSYNC: > + * > + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for > + * "Analog Composite Sync" is possible here, as we are > + * currently on an analog video signal interface. > + */ > + case DRM_EDID_PT_ANALOG_CSYNC: > + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Analog composite sync!\n", > + connector->base.id, connector->name); > + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; > + break; > + default: > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > + break; > + } Another angle is that for analog displays, EDID offset 0x14 has info about the supported sync modes. If we're separating digital/analog sync handling, we should probably filter the analog sync with the info from 0x14. BR, Jani. > } > > set_size: > @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > } > > if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { > - mode->width_mm = drm_edid->edid->width_cm * 10; > - mode->height_mm = drm_edid->edid->height_cm * 10; > + mode->width_mm = edid->width_cm * 10; > + mode->height_mm = edid->height_cm * 10; > } > > mode->type = DRM_MODE_TYPE_DRIVER; > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > index 48e93f909ef6..169755d3de19 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -61,9 +61,15 @@ struct std_timing { > u8 vfreq_aspect; > } __attribute__((packed)); > > -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) > -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) > +#define DRM_EDID_PT_SYNC_MASK (3 << 3) > +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) > +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) > +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) > +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ > +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) > +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) > +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ > +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > #define DRM_EDID_PT_STEREO (1 << 5) > #define DRM_EDID_PT_INTERLACED (1 << 7) -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels @ 2023-08-17 13:05 ` Jani Nikula 0 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-17 13:05 UTC (permalink / raw) To: Dirk Lehmann, stable Cc: dri-devel, intel-gfx, Ville Syrjälä, Dirk Lehmann On Thu, 17 Aug 2023, Dirk Lehmann <develop@dj-l.de> wrote: > VESA Enhanced EDID Standard does not clearly describe how display > panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in > the Detailed Timing Definition (relative offset 17, absolute offset > 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). > > In practice many eDP panels which using a Digital Video Signal > Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal > Defintions at offset 47h[+18] blank 0x00, which would mean concerned > with the VESA Standard [1] that they are using "Analog Composite > Sync". > > Fix: Just detect Analog Sync Signal if an Analog Video Signal > Interface (bit 7 at offset 14h == 0) is in use. Just detect > Digital Sync Signal if an Digital Video Signal Interface is in > use. > > Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 Please don't reply with patches in-reply-to other people's patches. > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 This is now fixed by the revert that I just pushed. > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 I don't think this patch fixes that one; see below. > Signed-off-by: Dirk Lehmann <develop@dj-l.de> > --- > drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ > include/drm/drm_edid.h | 12 +++++-- > 2 files changed, 73 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index 1f470968ed14..6afdc34e55ce 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > const struct drm_display_info *info = &connector->display_info; > struct drm_device *dev = connector->dev; > struct drm_display_mode *mode; > + const struct edid *edid = drm_edid->edid; > const struct detailed_pixel_timing *pt = &timing->data.pixel_data; > unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; > unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; > @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > connector->base.id, connector->name); > return NULL; > } > - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", > - connector->base.id, connector->name); > - } > > /* it is incorrect if hsync/vsync width is zero */ > if (!hsync_pulse_width || !vsync_pulse_width) { > @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > > if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { > mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; > + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { > + /* !info->quirks && edid->input == DIGITAL */ > + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > + * > + * CASE DRM_EDID_PT_ANALOG_CSYNC: > + * > + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means > + * "Analog Composite Sync" as described in VESA > + * Standard. But many digital display panels without > + * composite sync are also using 0x00 here. > + * > + * Therefore use DEFAULT: as we are currently on an > + * digital video signal interface. > + */ > + case DRM_EDID_PT_DIGITAL_CSYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Digital composite sync!\n", > + connector->base.id, connector->name); > + mode->flags |= DRM_MODE_FLAG_CSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; > + break; > + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Digital seperate sync!\n", > + connector->base.id, connector->name); > + goto digital_default; > + break; /* Missing BREAK throws a compiler warning */ fallthrough; will do the trick. > + default: > +digital_default: > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; The failing mode in bug [1] has 0x0a for flags, so it ends up here, and for that display this patch is a no-op. As I explained in [2], all the problematic cases have invalid data, but the ones fixed by the revert need to ignore the analog sync *flags* and accept the mode, and the display in [1] needs to have the whole *mode* rejected. [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 [2] https://gitlab.freedesktop.org/drm/intel/-/issues/8789#note_2047902 > + break; > + } > } else { > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > + /* !info->quirks && edid->input == ANALOG */ > + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > + * > + * CASE DRM_EDID_PT_ANALOG_CSYNC: > + * > + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for > + * "Analog Composite Sync" is possible here, as we are > + * currently on an analog video signal interface. > + */ > + case DRM_EDID_PT_ANALOG_CSYNC: > + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: > + drm_dbg_kms(dev, > + "[CONNECTOR:%d:%s] Analog composite sync!\n", > + connector->base.id, connector->name); > + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; > + break; > + default: > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > + break; > + } Another angle is that for analog displays, EDID offset 0x14 has info about the supported sync modes. If we're separating digital/analog sync handling, we should probably filter the analog sync with the info from 0x14. BR, Jani. > } > > set_size: > @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > } > > if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { > - mode->width_mm = drm_edid->edid->width_cm * 10; > - mode->height_mm = drm_edid->edid->height_cm * 10; > + mode->width_mm = edid->width_cm * 10; > + mode->height_mm = edid->height_cm * 10; > } > > mode->type = DRM_MODE_TYPE_DRIVER; > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > index 48e93f909ef6..169755d3de19 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -61,9 +61,15 @@ struct std_timing { > u8 vfreq_aspect; > } __attribute__((packed)); > > -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) > -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) > +#define DRM_EDID_PT_SYNC_MASK (3 << 3) > +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) > +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) > +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) > +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ > +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) > +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) > +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ > +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > #define DRM_EDID_PT_STEREO (1 << 5) > #define DRM_EDID_PT_INTERLACED (1 << 7) -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels 2023-08-17 13:05 ` Jani Nikula (?) @ 2023-08-17 14:29 ` Dirk Lehmann -1 siblings, 0 replies; 28+ messages in thread From: Dirk Lehmann @ 2023-08-17 14:29 UTC (permalink / raw) To: Jani Nikula, Dirk Lehmann, stable; +Cc: intel-gfx, dri-devel Hey Jani, On 8/17/23 15:05, Jani Nikula wrote: > On Thu, 17 Aug 2023, Dirk Lehmann <develop@dj-l.de> wrote: >> VESA Enhanced EDID Standard does not clearly describe how display >> panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in >> the Detailed Timing Definition (relative offset 17, absolute offset >> 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). >> >> In practice many eDP panels which using a Digital Video Signal >> Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal >> Defintions at offset 47h[+18] blank 0x00, which would mean concerned >> with the VESA Standard [1] that they are using "Analog Composite >> Sync". >> >> Fix: Just detect Analog Sync Signal if an Analog Video Signal >> Interface (bit 7 at offset 14h == 0) is in use. Just detect >> Digital Sync Signal if an Digital Video Signal Interface is in >> use. >> >> Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > > Please don't reply with patches in-reply-to other people's patches. Sorry, I am new with such patch lists :/ ... > >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 > > This is now fixed by the revert that I just pushed. > >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > > I don't think this patch fixes that one; see below. > >> Signed-off-by: Dirk Lehmann <develop@dj-l.de> >> --- >> drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ >> include/drm/drm_edid.h | 12 +++++-- >> 2 files changed, 73 insertions(+), 13 deletions(-) >> >> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >> index 1f470968ed14..6afdc34e55ce 100644 >> --- a/drivers/gpu/drm/drm_edid.c >> +++ b/drivers/gpu/drm/drm_edid.c >> @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> const struct drm_display_info *info = &connector->display_info; >> struct drm_device *dev = connector->dev; >> struct drm_display_mode *mode; >> + const struct edid *edid = drm_edid->edid; >> const struct detailed_pixel_timing *pt = &timing->data.pixel_data; >> unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; >> unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; >> @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> connector->base.id, connector->name); >> return NULL; >> } >> - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", >> - connector->base.id, connector->name); >> - } >> >> /* it is incorrect if hsync/vsync width is zero */ >> if (!hsync_pulse_width || !vsync_pulse_width) { >> @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> >> if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { >> mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; >> + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { >> + /* !info->quirks && edid->input == DIGITAL */ >> + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 >> + * >> + * CASE DRM_EDID_PT_ANALOG_CSYNC: >> + * >> + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means >> + * "Analog Composite Sync" as described in VESA >> + * Standard. But many digital display panels without >> + * composite sync are also using 0x00 here. >> + * >> + * Therefore use DEFAULT: as we are currently on an >> + * digital video signal interface. >> + */ >> + case DRM_EDID_PT_DIGITAL_CSYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Digital composite sync!\n", >> + connector->base.id, connector->name); >> + mode->flags |= DRM_MODE_FLAG_CSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; >> + break; >> + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Digital seperate sync!\n", >> + connector->base.id, connector->name); >> + goto digital_default; >> + break; /* Missing BREAK throws a compiler warning */ > > fallthrough; will do the trick. Cool, that's new for me. FALLTHROUGH really works, great :) > >> + default: >> +digital_default: >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > > The failing mode in bug [1] has 0x0a for flags, so it ends up here, and > for that display this patch is a no-op. Aaaeem yes, something is wrong here. If the EDID data are correct, then since 0001-*_5.15.patch in [1] should broke the implementation. (0x1a & (3 << 3)) == (3 << 3) == DRM_EDID_PT_DIGITAL_SEPARATE_SYNC But this implementation here I made and we are discussing should be have the same behavior as before in that case of [1]. The no-op should also be before. But then the fix ca62297b2085b before is useless. Yes, you are right, then reverting is the better idea xD > > As I explained in [2], all the problematic cases have invalid data, but > the ones fixed by the revert need to ignore the analog sync *flags* and > accept the mode, and the display in [1] needs to have the whole *mode* > rejected. > I don't know about the other problematic cases. I don't have the data of the use cases for that. > [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > [2] https://gitlab.freedesktop.org/drm/intel/-/issues/8789#note_2047902 > >> + break; >> + } >> } else { >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> + /* !info->quirks && edid->input == ANALOG */ >> + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 >> + * >> + * CASE DRM_EDID_PT_ANALOG_CSYNC: >> + * >> + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for >> + * "Analog Composite Sync" is possible here, as we are >> + * currently on an analog video signal interface. >> + */ >> + case DRM_EDID_PT_ANALOG_CSYNC: >> + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Analog composite sync!\n", >> + connector->base.id, connector->name); >> + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; >> + break; >> + default: >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> + break; >> + } > > Another angle is that for analog displays, EDID offset 0x14 has info > about the supported sync modes. If we're separating digital/analog sync > handling, we should probably filter the analog sync with the info from > 0x14. Yeah I also saw that in the VESA Standard, but I reflected that the analog display implementation should be more stable, as they are longer exist. For current digital eDP panels which have 0x00 at 47h are these composite bits at 14h not reachable --- because bit 7 of 14h is 1. It may just have effects on older analog displays. > > BR, > Jani. > Okay, summary: You may be right, as the fix commit ca62297b2085b makes less sense. Yeah, greets and thanks for the fast fix. Really great =D Dirk > >> } >> >> set_size: >> @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> } >> >> if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { >> - mode->width_mm = drm_edid->edid->width_cm * 10; >> - mode->height_mm = drm_edid->edid->height_cm * 10; >> + mode->width_mm = edid->width_cm * 10; >> + mode->height_mm = edid->height_cm * 10; >> } >> >> mode->type = DRM_MODE_TYPE_DRIVER; >> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h >> index 48e93f909ef6..169755d3de19 100644 >> --- a/include/drm/drm_edid.h >> +++ b/include/drm/drm_edid.h >> @@ -61,9 +61,15 @@ struct std_timing { >> u8 vfreq_aspect; >> } __attribute__((packed)); >> >> -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) >> -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) >> +#define DRM_EDID_PT_SYNC_MASK (3 << 3) >> +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) >> +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) >> +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) >> +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ >> +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) >> +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) >> +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ >> +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> #define DRM_EDID_PT_STEREO (1 << 5) >> #define DRM_EDID_PT_INTERLACED (1 << 7) > ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels @ 2023-08-17 14:29 ` Dirk Lehmann 0 siblings, 0 replies; 28+ messages in thread From: Dirk Lehmann @ 2023-08-17 14:29 UTC (permalink / raw) To: Jani Nikula, Dirk Lehmann, stable; +Cc: intel-gfx, dri-devel Hey Jani, On 8/17/23 15:05, Jani Nikula wrote: > On Thu, 17 Aug 2023, Dirk Lehmann <develop@dj-l.de> wrote: >> VESA Enhanced EDID Standard does not clearly describe how display >> panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in >> the Detailed Timing Definition (relative offset 17, absolute offset >> 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). >> >> In practice many eDP panels which using a Digital Video Signal >> Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal >> Defintions at offset 47h[+18] blank 0x00, which would mean concerned >> with the VESA Standard [1] that they are using "Analog Composite >> Sync". >> >> Fix: Just detect Analog Sync Signal if an Analog Video Signal >> Interface (bit 7 at offset 14h == 0) is in use. Just detect >> Digital Sync Signal if an Digital Video Signal Interface is in >> use. >> >> Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > > Please don't reply with patches in-reply-to other people's patches. Sorry, I am new with such patch lists :/ ... > >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 > > This is now fixed by the revert that I just pushed. > >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > > I don't think this patch fixes that one; see below. > >> Signed-off-by: Dirk Lehmann <develop@dj-l.de> >> --- >> drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ >> include/drm/drm_edid.h | 12 +++++-- >> 2 files changed, 73 insertions(+), 13 deletions(-) >> >> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >> index 1f470968ed14..6afdc34e55ce 100644 >> --- a/drivers/gpu/drm/drm_edid.c >> +++ b/drivers/gpu/drm/drm_edid.c >> @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> const struct drm_display_info *info = &connector->display_info; >> struct drm_device *dev = connector->dev; >> struct drm_display_mode *mode; >> + const struct edid *edid = drm_edid->edid; >> const struct detailed_pixel_timing *pt = &timing->data.pixel_data; >> unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; >> unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; >> @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> connector->base.id, connector->name); >> return NULL; >> } >> - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", >> - connector->base.id, connector->name); >> - } >> >> /* it is incorrect if hsync/vsync width is zero */ >> if (!hsync_pulse_width || !vsync_pulse_width) { >> @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> >> if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { >> mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; >> + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { >> + /* !info->quirks && edid->input == DIGITAL */ >> + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 >> + * >> + * CASE DRM_EDID_PT_ANALOG_CSYNC: >> + * >> + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means >> + * "Analog Composite Sync" as described in VESA >> + * Standard. But many digital display panels without >> + * composite sync are also using 0x00 here. >> + * >> + * Therefore use DEFAULT: as we are currently on an >> + * digital video signal interface. >> + */ >> + case DRM_EDID_PT_DIGITAL_CSYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Digital composite sync!\n", >> + connector->base.id, connector->name); >> + mode->flags |= DRM_MODE_FLAG_CSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; >> + break; >> + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Digital seperate sync!\n", >> + connector->base.id, connector->name); >> + goto digital_default; >> + break; /* Missing BREAK throws a compiler warning */ > > fallthrough; will do the trick. Cool, that's new for me. FALLTHROUGH really works, great :) > >> + default: >> +digital_default: >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > > The failing mode in bug [1] has 0x0a for flags, so it ends up here, and > for that display this patch is a no-op. Aaaeem yes, something is wrong here. If the EDID data are correct, then since 0001-*_5.15.patch in [1] should broke the implementation. (0x1a & (3 << 3)) == (3 << 3) == DRM_EDID_PT_DIGITAL_SEPARATE_SYNC But this implementation here I made and we are discussing should be have the same behavior as before in that case of [1]. The no-op should also be before. But then the fix ca62297b2085b before is useless. Yes, you are right, then reverting is the better idea xD > > As I explained in [2], all the problematic cases have invalid data, but > the ones fixed by the revert need to ignore the analog sync *flags* and > accept the mode, and the display in [1] needs to have the whole *mode* > rejected. > I don't know about the other problematic cases. I don't have the data of the use cases for that. > [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > [2] https://gitlab.freedesktop.org/drm/intel/-/issues/8789#note_2047902 > >> + break; >> + } >> } else { >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> + /* !info->quirks && edid->input == ANALOG */ >> + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 >> + * >> + * CASE DRM_EDID_PT_ANALOG_CSYNC: >> + * >> + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for >> + * "Analog Composite Sync" is possible here, as we are >> + * currently on an analog video signal interface. >> + */ >> + case DRM_EDID_PT_ANALOG_CSYNC: >> + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Analog composite sync!\n", >> + connector->base.id, connector->name); >> + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; >> + break; >> + default: >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> + break; >> + } > > Another angle is that for analog displays, EDID offset 0x14 has info > about the supported sync modes. If we're separating digital/analog sync > handling, we should probably filter the analog sync with the info from > 0x14. Yeah I also saw that in the VESA Standard, but I reflected that the analog display implementation should be more stable, as they are longer exist. For current digital eDP panels which have 0x00 at 47h are these composite bits at 14h not reachable --- because bit 7 of 14h is 1. It may just have effects on older analog displays. > > BR, > Jani. > Okay, summary: You may be right, as the fix commit ca62297b2085b makes less sense. Yeah, greets and thanks for the fast fix. Really great =D Dirk > >> } >> >> set_size: >> @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> } >> >> if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { >> - mode->width_mm = drm_edid->edid->width_cm * 10; >> - mode->height_mm = drm_edid->edid->height_cm * 10; >> + mode->width_mm = edid->width_cm * 10; >> + mode->height_mm = edid->height_cm * 10; >> } >> >> mode->type = DRM_MODE_TYPE_DRIVER; >> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h >> index 48e93f909ef6..169755d3de19 100644 >> --- a/include/drm/drm_edid.h >> +++ b/include/drm/drm_edid.h >> @@ -61,9 +61,15 @@ struct std_timing { >> u8 vfreq_aspect; >> } __attribute__((packed)); >> >> -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) >> -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) >> +#define DRM_EDID_PT_SYNC_MASK (3 << 3) >> +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) >> +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) >> +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) >> +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ >> +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) >> +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) >> +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ >> +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> #define DRM_EDID_PT_STEREO (1 << 5) >> #define DRM_EDID_PT_INTERLACED (1 << 7) > ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels @ 2023-08-17 14:29 ` Dirk Lehmann 0 siblings, 0 replies; 28+ messages in thread From: Dirk Lehmann @ 2023-08-17 14:29 UTC (permalink / raw) To: Jani Nikula, Dirk Lehmann, stable Cc: dri-devel, intel-gfx, Ville Syrjälä Hey Jani, On 8/17/23 15:05, Jani Nikula wrote: > On Thu, 17 Aug 2023, Dirk Lehmann <develop@dj-l.de> wrote: >> VESA Enhanced EDID Standard does not clearly describe how display >> panel vendors should setup the Sync Signal Defintions (bit 4 & 3) in >> the Detailed Timing Definition (relative offset 17, absolute offset >> 47h[+18]) for Digital Video Signal Interfaces (bit 7 at offset 14h). >> >> In practice many eDP panels which using a Digital Video Signal >> Interfaces (bit 7 at offset 14h == 1) are leaving the Sync Signal >> Defintions at offset 47h[+18] blank 0x00, which would mean concerned >> with the VESA Standard [1] that they are using "Analog Composite >> Sync". >> >> Fix: Just detect Analog Sync Signal if an Analog Video Signal >> Interface (bit 7 at offset 14h == 0) is in use. Just detect >> Digital Sync Signal if an Digital Video Signal Interface is in >> use. >> >> Reference: [1] VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 > > Please don't reply with patches in-reply-to other people's patches. Sorry, I am new with such patch lists :/ ... > >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 > > This is now fixed by the revert that I just pushed. > >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > > I don't think this patch fixes that one; see below. > >> Signed-off-by: Dirk Lehmann <develop@dj-l.de> >> --- >> drivers/gpu/drm/drm_edid.c | 74 ++++++++++++++++++++++++++++++++------ >> include/drm/drm_edid.h | 12 +++++-- >> 2 files changed, 73 insertions(+), 13 deletions(-) >> >> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >> index 1f470968ed14..6afdc34e55ce 100644 >> --- a/drivers/gpu/drm/drm_edid.c >> +++ b/drivers/gpu/drm/drm_edid.c >> @@ -3437,6 +3437,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> const struct drm_display_info *info = &connector->display_info; >> struct drm_device *dev = connector->dev; >> struct drm_display_mode *mode; >> + const struct edid *edid = drm_edid->edid; >> const struct detailed_pixel_timing *pt = &timing->data.pixel_data; >> unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; >> unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; >> @@ -3456,10 +3457,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> connector->base.id, connector->name); >> return NULL; >> } >> - if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", >> - connector->base.id, connector->name); >> - } >> >> /* it is incorrect if hsync/vsync width is zero */ >> if (!hsync_pulse_width || !vsync_pulse_width) { >> @@ -3505,11 +3502,68 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> >> if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { >> mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; >> + } else if (edid->input & DRM_EDID_INPUT_DIGITAL) { >> + /* !info->quirks && edid->input == DIGITAL */ >> + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 >> + * >> + * CASE DRM_EDID_PT_ANALOG_CSYNC: >> + * >> + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) means >> + * "Analog Composite Sync" as described in VESA >> + * Standard. But many digital display panels without >> + * composite sync are also using 0x00 here. >> + * >> + * Therefore use DEFAULT: as we are currently on an >> + * digital video signal interface. >> + */ >> + case DRM_EDID_PT_DIGITAL_CSYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Digital composite sync!\n", >> + connector->base.id, connector->name); >> + mode->flags |= DRM_MODE_FLAG_CSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; >> + break; >> + case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Digital seperate sync!\n", >> + connector->base.id, connector->name); >> + goto digital_default; >> + break; /* Missing BREAK throws a compiler warning */ > > fallthrough; will do the trick. Cool, that's new for me. FALLTHROUGH really works, great :) > >> + default: >> +digital_default: >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > > The failing mode in bug [1] has 0x0a for flags, so it ends up here, and > for that display this patch is a no-op. Aaaeem yes, something is wrong here. If the EDID data are correct, then since 0001-*_5.15.patch in [1] should broke the implementation. (0x1a & (3 << 3)) == (3 << 3) == DRM_EDID_PT_DIGITAL_SEPARATE_SYNC But this implementation here I made and we are discussing should be have the same behavior as before in that case of [1]. The no-op should also be before. But then the fix ca62297b2085b before is useless. Yes, you are right, then reverting is the better idea xD > > As I explained in [2], all the problematic cases have invalid data, but > the ones fixed by the revert need to ignore the analog sync *flags* and > accept the mode, and the display in [1] needs to have the whole *mode* > rejected. > I don't know about the other problematic cases. I don't have the data of the use cases for that. > [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > [2] https://gitlab.freedesktop.org/drm/intel/-/issues/8789#note_2047902 > >> + break; >> + } >> } else { >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> + /* !info->quirks && edid->input == ANALOG */ >> + switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> + /* VESA Enhanced EDID Standard, Release A, Rev.2, Page 35 >> + * >> + * CASE DRM_EDID_PT_ANALOG_CSYNC: >> + * >> + * (pt->misc & DRM_EDID_PT_SYNC_MASK == 0x00) for >> + * "Analog Composite Sync" is possible here, as we are >> + * currently on an analog video signal interface. >> + */ >> + case DRM_EDID_PT_ANALOG_CSYNC: >> + case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: >> + drm_dbg_kms(dev, >> + "[CONNECTOR:%d:%s] Analog composite sync!\n", >> + connector->base.id, connector->name); >> + mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; >> + break; >> + default: >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> + break; >> + } > > Another angle is that for analog displays, EDID offset 0x14 has info > about the supported sync modes. If we're separating digital/analog sync > handling, we should probably filter the analog sync with the info from > 0x14. Yeah I also saw that in the VESA Standard, but I reflected that the analog display implementation should be more stable, as they are longer exist. For current digital eDP panels which have 0x00 at 47h are these composite bits at 14h not reachable --- because bit 7 of 14h is 1. It may just have effects on older analog displays. > > BR, > Jani. > Okay, summary: You may be right, as the fix commit ca62297b2085b makes less sense. Yeah, greets and thanks for the fast fix. Really great =D Dirk > >> } >> >> set_size: >> @@ -3522,8 +3576,8 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> } >> >> if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { >> - mode->width_mm = drm_edid->edid->width_cm * 10; >> - mode->height_mm = drm_edid->edid->height_cm * 10; >> + mode->width_mm = edid->width_cm * 10; >> + mode->height_mm = edid->height_cm * 10; >> } >> >> mode->type = DRM_MODE_TYPE_DRIVER; >> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h >> index 48e93f909ef6..169755d3de19 100644 >> --- a/include/drm/drm_edid.h >> +++ b/include/drm/drm_edid.h >> @@ -61,9 +61,15 @@ struct std_timing { >> u8 vfreq_aspect; >> } __attribute__((packed)); >> >> -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) >> -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) >> +#define DRM_EDID_PT_SYNC_MASK (3 << 3) >> +# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) >> +# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) >> +# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) >> +# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ >> +# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) >> +# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) >> +# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ >> +# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> #define DRM_EDID_PT_STEREO (1 << 5) >> #define DRM_EDID_PT_INTERLACED (1 << 7) > ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels 2023-08-17 9:44 ` Dirk Lehmann (?) (?) @ 2023-08-17 14:00 ` kernel test robot -1 siblings, 0 replies; 28+ messages in thread From: kernel test robot @ 2023-08-17 14:00 UTC (permalink / raw) To: Dirk Lehmann; +Cc: stable, oe-kbuild-all Hi, Thanks for your patch. FYI: kernel test robot notices the stable kernel rule is not satisfied. Rule: 'Cc: stable@vger.kernel.org' or 'commit <sha1> upstream.' Subject: [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels Link: https://lore.kernel.org/stable/E1qWbpR-0007ey-0B%40djlnb.local The check is based on https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" 2023-08-15 10:19 ` Jani Nikula (?) @ 2023-08-17 11:35 ` Ville Syrjälä -1 siblings, 0 replies; 28+ messages in thread From: Ville Syrjälä @ 2023-08-17 11:35 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, stable, dri-devel On Tue, Aug 15, 2023 at 01:19:07PM +0300, Jani Nikula wrote: > This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. > > Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed > EDID detailed mode sync parsing. Unfortunately, there are quite a few > displays out there that have bogus (zero) sync field that are broken by > the change. Zero means analog composite sync, which is not right for > digital displays, and the modes get rejected. Regardless, it used to > work, and it needs to continue to work. Revert the change. Bah. I guess one option would be to quirk the bogus EDIDs, or maybe just ignore bogus sync flags for the eDP preferred mode. But maybe needs a bit more thinking, so Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Rejecting modes with analog composite sync was the part that fixed the > gitlab issue 8146 [1]. We'll need to get back to the drawing board with > that. > > [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 > Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: dri-devel@lists.freedesktop.org > Cc: <stable@vger.kernel.org> # v6.4+ > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- > include/drm/drm_edid.h | 12 +++--------- > 2 files changed, 11 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index f95152fac427..340da8257b51 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > connector->base.id, connector->name); > return NULL; > } > + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { > + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", > + connector->base.id, connector->name); > + } > > /* it is incorrect if hsync/vsync width is zero */ > if (!hsync_pulse_width || !vsync_pulse_width) { > @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { > mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; > } else { > - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > - case DRM_EDID_PT_ANALOG_CSYNC: > - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", > - connector->base.id, connector->name); > - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; > - break; > - case DRM_EDID_PT_DIGITAL_CSYNC: > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", > - connector->base.id, connector->name); > - mode->flags |= DRM_MODE_FLAG_CSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; > - break; > - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > - break; > - } > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > } > > set_size: > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > index 169755d3de19..48e93f909ef6 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -61,15 +61,9 @@ struct std_timing { > u8 vfreq_aspect; > } __attribute__((packed)); > > -#define DRM_EDID_PT_SYNC_MASK (3 << 3) > -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) > -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) > -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) > -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ > -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) > -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) > -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ > -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) > +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) > #define DRM_EDID_PT_STEREO (1 << 5) > #define DRM_EDID_PT_INTERLACED (1 << 7) > > -- > 2.39.2 -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" @ 2023-08-17 11:35 ` Ville Syrjälä 0 siblings, 0 replies; 28+ messages in thread From: Ville Syrjälä @ 2023-08-17 11:35 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, stable, dri-devel On Tue, Aug 15, 2023 at 01:19:07PM +0300, Jani Nikula wrote: > This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. > > Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed > EDID detailed mode sync parsing. Unfortunately, there are quite a few > displays out there that have bogus (zero) sync field that are broken by > the change. Zero means analog composite sync, which is not right for > digital displays, and the modes get rejected. Regardless, it used to > work, and it needs to continue to work. Revert the change. Bah. I guess one option would be to quirk the bogus EDIDs, or maybe just ignore bogus sync flags for the eDP preferred mode. But maybe needs a bit more thinking, so Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Rejecting modes with analog composite sync was the part that fixed the > gitlab issue 8146 [1]. We'll need to get back to the drawing board with > that. > > [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 > Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: dri-devel@lists.freedesktop.org > Cc: <stable@vger.kernel.org> # v6.4+ > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- > include/drm/drm_edid.h | 12 +++--------- > 2 files changed, 11 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index f95152fac427..340da8257b51 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > connector->base.id, connector->name); > return NULL; > } > + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { > + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", > + connector->base.id, connector->name); > + } > > /* it is incorrect if hsync/vsync width is zero */ > if (!hsync_pulse_width || !vsync_pulse_width) { > @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { > mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; > } else { > - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > - case DRM_EDID_PT_ANALOG_CSYNC: > - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", > - connector->base.id, connector->name); > - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; > - break; > - case DRM_EDID_PT_DIGITAL_CSYNC: > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", > - connector->base.id, connector->name); > - mode->flags |= DRM_MODE_FLAG_CSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; > - break; > - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > - break; > - } > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > } > > set_size: > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > index 169755d3de19..48e93f909ef6 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -61,15 +61,9 @@ struct std_timing { > u8 vfreq_aspect; > } __attribute__((packed)); > > -#define DRM_EDID_PT_SYNC_MASK (3 << 3) > -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) > -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) > -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) > -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ > -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) > -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) > -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ > -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) > +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) > #define DRM_EDID_PT_STEREO (1 << 5) > #define DRM_EDID_PT_INTERLACED (1 << 7) > > -- > 2.39.2 -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" @ 2023-08-17 11:35 ` Ville Syrjälä 0 siblings, 0 replies; 28+ messages in thread From: Ville Syrjälä @ 2023-08-17 11:35 UTC (permalink / raw) To: Jani Nikula; +Cc: dri-devel, intel-gfx, stable On Tue, Aug 15, 2023 at 01:19:07PM +0300, Jani Nikula wrote: > This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. > > Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed > EDID detailed mode sync parsing. Unfortunately, there are quite a few > displays out there that have bogus (zero) sync field that are broken by > the change. Zero means analog composite sync, which is not right for > digital displays, and the modes get rejected. Regardless, it used to > work, and it needs to continue to work. Revert the change. Bah. I guess one option would be to quirk the bogus EDIDs, or maybe just ignore bogus sync flags for the eDP preferred mode. But maybe needs a bit more thinking, so Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Rejecting modes with analog composite sync was the part that fixed the > gitlab issue 8146 [1]. We'll need to get back to the drawing board with > that. > > [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 > Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: dri-devel@lists.freedesktop.org > Cc: <stable@vger.kernel.org> # v6.4+ > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- > include/drm/drm_edid.h | 12 +++--------- > 2 files changed, 11 insertions(+), 30 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index f95152fac427..340da8257b51 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > connector->base.id, connector->name); > return NULL; > } > + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { > + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", > + connector->base.id, connector->name); > + } > > /* it is incorrect if hsync/vsync width is zero */ > if (!hsync_pulse_width || !vsync_pulse_width) { > @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto > if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { > mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; > } else { > - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { > - case DRM_EDID_PT_ANALOG_CSYNC: > - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", > - connector->base.id, connector->name); > - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; > - break; > - case DRM_EDID_PT_DIGITAL_CSYNC: > - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", > - connector->base.id, connector->name); > - mode->flags |= DRM_MODE_FLAG_CSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; > - break; > - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: > - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > - break; > - } > + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; > + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? > + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; > } > > set_size: > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h > index 169755d3de19..48e93f909ef6 100644 > --- a/include/drm/drm_edid.h > +++ b/include/drm/drm_edid.h > @@ -61,15 +61,9 @@ struct std_timing { > u8 vfreq_aspect; > } __attribute__((packed)); > > -#define DRM_EDID_PT_SYNC_MASK (3 << 3) > -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) > -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) > -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) > -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ > -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) > -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) > -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ > -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) > +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) > +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) > #define DRM_EDID_PT_STEREO (1 << 5) > #define DRM_EDID_PT_INTERLACED (1 << 7) > > -- > 2.39.2 -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" 2023-08-17 11:35 ` Ville Syrjälä (?) @ 2023-08-17 12:40 ` Jani Nikula -1 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-17 12:40 UTC (permalink / raw) To: Ville Syrjälä Cc: intel-gfx, Maxime Ripard, dri-devel, Thomas Zimmermann, stable On Thu, 17 Aug 2023, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > On Tue, Aug 15, 2023 at 01:19:07PM +0300, Jani Nikula wrote: >> This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. >> >> Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed >> EDID detailed mode sync parsing. Unfortunately, there are quite a few >> displays out there that have bogus (zero) sync field that are broken by >> the change. Zero means analog composite sync, which is not right for >> digital displays, and the modes get rejected. Regardless, it used to >> work, and it needs to continue to work. Revert the change. > > Bah. I guess one option would be to quirk the bogus EDIDs, or maybe just > ignore bogus sync flags for the eDP preferred mode. But maybe needs a > bit more thinking, so > > Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Thanks, pushed to drm-misc-fixes. BR, Jani. > >> >> Rejecting modes with analog composite sync was the part that fixed the >> gitlab issue 8146 [1]. We'll need to get back to the drawing board with >> that. >> >> [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 >> >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 >> Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Cc: dri-devel@lists.freedesktop.org >> Cc: <stable@vger.kernel.org> # v6.4+ >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> --- >> drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- >> include/drm/drm_edid.h | 12 +++--------- >> 2 files changed, 11 insertions(+), 30 deletions(-) >> >> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >> index f95152fac427..340da8257b51 100644 >> --- a/drivers/gpu/drm/drm_edid.c >> +++ b/drivers/gpu/drm/drm_edid.c >> @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> connector->base.id, connector->name); >> return NULL; >> } >> + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { >> + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", >> + connector->base.id, connector->name); >> + } >> >> /* it is incorrect if hsync/vsync width is zero */ >> if (!hsync_pulse_width || !vsync_pulse_width) { >> @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { >> mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; >> } else { >> - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> - case DRM_EDID_PT_ANALOG_CSYNC: >> - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", >> - connector->base.id, connector->name); >> - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; >> - break; >> - case DRM_EDID_PT_DIGITAL_CSYNC: >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", >> - connector->base.id, connector->name); >> - mode->flags |= DRM_MODE_FLAG_CSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; >> - break; >> - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> - break; >> - } >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> } >> >> set_size: >> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h >> index 169755d3de19..48e93f909ef6 100644 >> --- a/include/drm/drm_edid.h >> +++ b/include/drm/drm_edid.h >> @@ -61,15 +61,9 @@ struct std_timing { >> u8 vfreq_aspect; >> } __attribute__((packed)); >> >> -#define DRM_EDID_PT_SYNC_MASK (3 << 3) >> -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) >> -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) >> -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) >> -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ >> -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) >> -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) >> -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ >> -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) >> +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) >> #define DRM_EDID_PT_STEREO (1 << 5) >> #define DRM_EDID_PT_INTERLACED (1 << 7) >> >> -- >> 2.39.2 -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" @ 2023-08-17 12:40 ` Jani Nikula 0 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-17 12:40 UTC (permalink / raw) To: Ville Syrjälä Cc: intel-gfx, Maxime Ripard, dri-devel, Thomas Zimmermann, stable On Thu, 17 Aug 2023, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > On Tue, Aug 15, 2023 at 01:19:07PM +0300, Jani Nikula wrote: >> This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. >> >> Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed >> EDID detailed mode sync parsing. Unfortunately, there are quite a few >> displays out there that have bogus (zero) sync field that are broken by >> the change. Zero means analog composite sync, which is not right for >> digital displays, and the modes get rejected. Regardless, it used to >> work, and it needs to continue to work. Revert the change. > > Bah. I guess one option would be to quirk the bogus EDIDs, or maybe just > ignore bogus sync flags for the eDP preferred mode. But maybe needs a > bit more thinking, so > > Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Thanks, pushed to drm-misc-fixes. BR, Jani. > >> >> Rejecting modes with analog composite sync was the part that fixed the >> gitlab issue 8146 [1]. We'll need to get back to the drawing board with >> that. >> >> [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 >> >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 >> Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Cc: dri-devel@lists.freedesktop.org >> Cc: <stable@vger.kernel.org> # v6.4+ >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> --- >> drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- >> include/drm/drm_edid.h | 12 +++--------- >> 2 files changed, 11 insertions(+), 30 deletions(-) >> >> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >> index f95152fac427..340da8257b51 100644 >> --- a/drivers/gpu/drm/drm_edid.c >> +++ b/drivers/gpu/drm/drm_edid.c >> @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> connector->base.id, connector->name); >> return NULL; >> } >> + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { >> + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", >> + connector->base.id, connector->name); >> + } >> >> /* it is incorrect if hsync/vsync width is zero */ >> if (!hsync_pulse_width || !vsync_pulse_width) { >> @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { >> mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; >> } else { >> - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> - case DRM_EDID_PT_ANALOG_CSYNC: >> - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", >> - connector->base.id, connector->name); >> - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; >> - break; >> - case DRM_EDID_PT_DIGITAL_CSYNC: >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", >> - connector->base.id, connector->name); >> - mode->flags |= DRM_MODE_FLAG_CSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; >> - break; >> - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> - break; >> - } >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> } >> >> set_size: >> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h >> index 169755d3de19..48e93f909ef6 100644 >> --- a/include/drm/drm_edid.h >> +++ b/include/drm/drm_edid.h >> @@ -61,15 +61,9 @@ struct std_timing { >> u8 vfreq_aspect; >> } __attribute__((packed)); >> >> -#define DRM_EDID_PT_SYNC_MASK (3 << 3) >> -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) >> -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) >> -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) >> -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ >> -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) >> -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) >> -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ >> -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) >> +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) >> #define DRM_EDID_PT_STEREO (1 << 5) >> #define DRM_EDID_PT_INTERLACED (1 << 7) >> >> -- >> 2.39.2 -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" @ 2023-08-17 12:40 ` Jani Nikula 0 siblings, 0 replies; 28+ messages in thread From: Jani Nikula @ 2023-08-17 12:40 UTC (permalink / raw) To: Ville Syrjälä Cc: intel-gfx, stable, dri-devel, Thomas Zimmermann, Maxime Ripard, Maarten Lankhorst On Thu, 17 Aug 2023, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > On Tue, Aug 15, 2023 at 01:19:07PM +0300, Jani Nikula wrote: >> This reverts commit ca62297b2085b5b3168bd891ca24862242c635a1. >> >> Commit ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") fixed >> EDID detailed mode sync parsing. Unfortunately, there are quite a few >> displays out there that have bogus (zero) sync field that are broken by >> the change. Zero means analog composite sync, which is not right for >> digital displays, and the modes get rejected. Regardless, it used to >> work, and it needs to continue to work. Revert the change. > > Bah. I guess one option would be to quirk the bogus EDIDs, or maybe just > ignore bogus sync flags for the eDP preferred mode. But maybe needs a > bit more thinking, so > > Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Thanks, pushed to drm-misc-fixes. BR, Jani. > >> >> Rejecting modes with analog composite sync was the part that fixed the >> gitlab issue 8146 [1]. We'll need to get back to the drawing board with >> that. >> >> [1] https://gitlab.freedesktop.org/drm/intel/-/issues/8146 >> >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8789 >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8930 >> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9044 >> Fixes: ca62297b2085 ("drm/edid: Fix csync detailed mode parsing") >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Cc: dri-devel@lists.freedesktop.org >> Cc: <stable@vger.kernel.org> # v6.4+ >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> --- >> drivers/gpu/drm/drm_edid.c | 29 ++++++++--------------------- >> include/drm/drm_edid.h | 12 +++--------- >> 2 files changed, 11 insertions(+), 30 deletions(-) >> >> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c >> index f95152fac427..340da8257b51 100644 >> --- a/drivers/gpu/drm/drm_edid.c >> +++ b/drivers/gpu/drm/drm_edid.c >> @@ -3457,6 +3457,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> connector->base.id, connector->name); >> return NULL; >> } >> + if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { >> + drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Composite sync not supported\n", >> + connector->base.id, connector->name); >> + } >> >> /* it is incorrect if hsync/vsync width is zero */ >> if (!hsync_pulse_width || !vsync_pulse_width) { >> @@ -3503,27 +3507,10 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto >> if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { >> mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; >> } else { >> - switch (pt->misc & DRM_EDID_PT_SYNC_MASK) { >> - case DRM_EDID_PT_ANALOG_CSYNC: >> - case DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC: >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Analog composite sync!\n", >> - connector->base.id, connector->name); >> - mode->flags |= DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_NCSYNC; >> - break; >> - case DRM_EDID_PT_DIGITAL_CSYNC: >> - drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Digital composite sync!\n", >> - connector->base.id, connector->name); >> - mode->flags |= DRM_MODE_FLAG_CSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PCSYNC : DRM_MODE_FLAG_NCSYNC; >> - break; >> - case DRM_EDID_PT_DIGITAL_SEPARATE_SYNC: >> - mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> - mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> - DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> - break; >> - } >> + mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; >> + mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? >> + DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; >> } >> >> set_size: >> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h >> index 169755d3de19..48e93f909ef6 100644 >> --- a/include/drm/drm_edid.h >> +++ b/include/drm/drm_edid.h >> @@ -61,15 +61,9 @@ struct std_timing { >> u8 vfreq_aspect; >> } __attribute__((packed)); >> >> -#define DRM_EDID_PT_SYNC_MASK (3 << 3) >> -# define DRM_EDID_PT_ANALOG_CSYNC (0 << 3) >> -# define DRM_EDID_PT_BIPOLAR_ANALOG_CSYNC (1 << 3) >> -# define DRM_EDID_PT_DIGITAL_CSYNC (2 << 3) >> -# define DRM_EDID_PT_CSYNC_ON_RGB (1 << 1) /* analog csync only */ >> -# define DRM_EDID_PT_CSYNC_SERRATE (1 << 2) >> -# define DRM_EDID_PT_DIGITAL_SEPARATE_SYNC (3 << 3) >> -# define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) /* also digital csync */ >> -# define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> +#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) >> +#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) >> +#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) >> #define DRM_EDID_PT_STEREO (1 << 5) >> #define DRM_EDID_PT_INTERLACED (1 << 7) >> >> -- >> 2.39.2 -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/edid: Fix csync detailed mode parsing" (rev2) 2023-08-15 10:19 ` Jani Nikula ` (8 preceding siblings ...) (?) @ 2023-08-21 19:34 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-21 19:34 UTC (permalink / raw) To: Dirk Lehmann; +Cc: intel-gfx == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" (rev2) URL : https://patchwork.freedesktop.org/series/122455/ State : warning == Summary == Error: dim checkpatch failed /home/kbuild/linux/maintainer-tools/dim: line 50: /home/kbuild/.dimrc: No such file or directory ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Revert "drm/edid: Fix csync detailed mode parsing" (rev2) 2023-08-15 10:19 ` Jani Nikula ` (9 preceding siblings ...) (?) @ 2023-08-21 19:35 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-21 19:35 UTC (permalink / raw) To: Dirk Lehmann; +Cc: intel-gfx == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" (rev2) URL : https://patchwork.freedesktop.org/series/122455/ State : warning == Summary == Error: dim sparse failed /home/kbuild/linux/maintainer-tools/dim: line 50: /home/kbuild/.dimrc: No such file or directory ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/edid: Fix csync detailed mode parsing" (rev2) 2023-08-15 10:19 ` Jani Nikula ` (10 preceding siblings ...) (?) @ 2023-08-21 19:54 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-21 19:54 UTC (permalink / raw) To: Dirk Lehmann; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 12709 bytes --] == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" (rev2) URL : https://patchwork.freedesktop.org/series/122455/ State : success == Summary == CI Bug Log - changes from CI_DRM_13541 -> Patchwork_122455v2 ==================================================== Summary ------- **WARNING** Minor unknown changes coming with Patchwork_122455v2 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_122455v2, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/index.html Participating hosts (39 -> 39) ------------------------------ Additional (2): fi-kbl-soraka bat-mtlp-6 Missing (2): fi-snb-2520m fi-pnv-d510 Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_122455v2: ### IGT changes ### #### Warnings #### * igt@i915_module_load@load: - bat-adlp-11: [DMESG-WARN][1] ([i915#4423]) -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/bat-adlp-11/igt@i915_module_load@load.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-adlp-11/igt@i915_module_load@load.html Known issues ------------ Here are the changes found in Patchwork_122455v2 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@debugfs_test@basic-hwmon: - bat-adlp-11: NOTRUN -> [SKIP][3] ([i915#7456]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-adlp-11/igt@debugfs_test@basic-hwmon.html - bat-mtlp-6: NOTRUN -> [SKIP][4] ([i915#7456]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@debugfs_test@basic-hwmon.html * igt@fbdev@info: - bat-mtlp-6: NOTRUN -> [SKIP][5] ([i915#1849] / [i915#2582]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@fbdev@info.html * igt@fbdev@write: - bat-mtlp-6: NOTRUN -> [SKIP][6] ([i915#2582]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@fbdev@write.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html * igt@gem_lmem_swapping@verify-random: - bat-mtlp-6: NOTRUN -> [SKIP][9] ([i915#4613]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@gem_lmem_swapping@verify-random.html * igt@gem_mmap@basic: - bat-mtlp-6: NOTRUN -> [SKIP][10] ([i915#4083]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@gem_mmap@basic.html * igt@gem_tiled_blits@basic: - bat-mtlp-6: NOTRUN -> [SKIP][11] ([i915#4077]) +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@gem_tiled_blits@basic.html * igt@gem_tiled_pread_basic: - bat-mtlp-6: NOTRUN -> [SKIP][12] ([i915#4079]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@gem_tiled_pread_basic.html - bat-adlp-11: NOTRUN -> [SKIP][13] ([i915#3282]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-adlp-11/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - bat-mtlp-6: NOTRUN -> [SKIP][14] ([i915#3546]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@i915_pm_backlight@basic-brightness.html * igt@i915_pm_rps@basic-api: - bat-mtlp-6: NOTRUN -> [SKIP][15] ([i915#6621]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@i915_pm_rps@basic-api.html * igt@i915_selftest@live@gt_heartbeat: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][16] ([i915#5334] / [i915#7872]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][17] ([i915#1886] / [i915#7913]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s3-without-i915: - bat-mtlp-6: NOTRUN -> [SKIP][18] ([i915#6645]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@i915_suspend@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-bad-modifier: - bat-adlp-11: NOTRUN -> [ABORT][19] ([i915#4423]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-adlp-11/igt@kms_addfb_basic@addfb25-bad-modifier.html * igt@kms_addfb_basic@addfb25-x-tiled-legacy: - bat-mtlp-6: NOTRUN -> [SKIP][20] ([i915#4212]) +8 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-mtlp-6: NOTRUN -> [SKIP][21] ([i915#5190]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-kbl-soraka: NOTRUN -> [SKIP][22] ([fdo#109271]) +8 similar issues [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/fi-kbl-soraka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy: - bat-mtlp-6: NOTRUN -> [SKIP][23] ([i915#1845]) +11 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html * igt@kms_flip@basic-flip-vs-dpms: - bat-mtlp-6: NOTRUN -> [SKIP][24] ([i915#3637]) +3 similar issues [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_flip@basic-flip-vs-dpms.html * igt@kms_force_connector_basic@force-load-detect: - bat-mtlp-6: NOTRUN -> [SKIP][25] ([fdo#109285]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-mtlp-6: NOTRUN -> [SKIP][26] ([i915#5274]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_force_connector_basic@prune-stale-modes.html * igt@kms_frontbuffer_tracking@basic: - bat-mtlp-6: NOTRUN -> [SKIP][27] ([i915#4342]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_frontbuffer_tracking@basic.html * igt@kms_pipe_crc_basic@suspend-read-crc: - bat-mtlp-6: NOTRUN -> [SKIP][28] ([i915#1845] / [i915#4078]) +4 similar issues [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_pipe_crc_basic@suspend-read-crc.html * igt@kms_psr@cursor_plane_move: - bat-mtlp-6: NOTRUN -> [SKIP][29] ([i915#1072]) +3 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_psr@cursor_plane_move.html * igt@kms_psr@primary_mmap_gtt: - bat-rplp-1: NOTRUN -> [ABORT][30] ([i915#8442] / [i915#8469] / [i915#8668]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html * igt@kms_psr@sprite_plane_onoff: - bat-rplp-1: NOTRUN -> [SKIP][31] ([i915#1072]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-rplp-1/igt@kms_psr@sprite_plane_onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-mtlp-6: NOTRUN -> [SKIP][32] ([i915#8809]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@kms_setmode@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-flip: - bat-mtlp-6: NOTRUN -> [SKIP][33] ([i915#1845] / [i915#3708]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@prime_vgem@basic-fence-flip.html * igt@prime_vgem@basic-fence-mmap: - bat-mtlp-6: NOTRUN -> [SKIP][34] ([i915#3708] / [i915#4077]) +1 similar issue [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@prime_vgem@basic-fence-mmap.html * igt@prime_vgem@basic-write: - bat-mtlp-6: NOTRUN -> [SKIP][35] ([i915#3708]) +2 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-mtlp-6/igt@prime_vgem@basic-write.html #### Possible fixes #### * igt@core_auth@basic-auth: - bat-adlp-11: [ABORT][36] ([i915#4423] / [i915#9164]) -> [PASS][37] [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/bat-adlp-11/igt@core_auth@basic-auth.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-adlp-11/igt@core_auth@basic-auth.html #### Warnings #### * igt@kms_psr@cursor_plane_move: - bat-rplp-1: [ABORT][38] ([i915#8469] / [i915#8668]) -> [SKIP][39] ([i915#1072]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/bat-rplp-1/igt@kms_psr@cursor_plane_move.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/bat-rplp-1/igt@kms_psr@cursor_plane_move.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212 [i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342 [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190 [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274 [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334 [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621 [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645 [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456 [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872 [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913 [i915#8442]: https://gitlab.freedesktop.org/drm/intel/issues/8442 [i915#8469]: https://gitlab.freedesktop.org/drm/intel/issues/8469 [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668 [i915#8809]: https://gitlab.freedesktop.org/drm/intel/issues/8809 [i915#9164]: https://gitlab.freedesktop.org/drm/intel/issues/9164 Build changes ------------- * Linux: CI_DRM_13541 -> Patchwork_122455v2 CI-20190529: 20190529 CI_DRM_13541: 035b310211a224d37e0968584c01c91f4581f037 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7448: 84aa6d50648d9349fb4f1520f37e5374908c9f4d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_122455v2: 035b310211a224d37e0968584c01c91f4581f037 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits facf9d6edcb7 drm/edid: Fix "Analog composite sync!" for current eDP display panels == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/index.html [-- Attachment #2: Type: text/html, Size: 15287 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Revert "drm/edid: Fix csync detailed mode parsing" (rev2) 2023-08-15 10:19 ` Jani Nikula ` (11 preceding siblings ...) (?) @ 2023-08-21 23:01 ` Patchwork -1 siblings, 0 replies; 28+ messages in thread From: Patchwork @ 2023-08-21 23:01 UTC (permalink / raw) To: Dirk Lehmann; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 35263 bytes --] == Series Details == Series: Revert "drm/edid: Fix csync detailed mode parsing" (rev2) URL : https://patchwork.freedesktop.org/series/122455/ State : success == Summary == CI Bug Log - changes from CI_DRM_13541_full -> Patchwork_122455v2_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in Patchwork_122455v2_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@drm_buddy@drm_buddy_test: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#8661]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-snb6/igt@drm_buddy@drm_buddy_test.html * igt@gem_barrier_race@remote-request@rcs0: - shard-tglu: [PASS][2] -> [ABORT][3] ([i915#8190]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-tglu-10/igt@gem_barrier_race@remote-request@rcs0.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-tglu-10/igt@gem_barrier_race@remote-request@rcs0.html * igt@gem_ccs@block-multicopy-compressed: - shard-mtlp: NOTRUN -> [SKIP][4] ([i915#5325]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@gem_ccs@block-multicopy-compressed.html * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0: - shard-dg2: [PASS][5] -> [INCOMPLETE][6] ([i915#7297]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-11/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-2/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html * igt@gem_ctx_exec@basic-nohangcheck: - shard-rkl: [PASS][7] -> [FAIL][8] ([i915#6268]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-rkl-7/igt@gem_ctx_exec@basic-nohangcheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_ctx_persistence@heartbeat-stop: - shard-dg2: NOTRUN -> [SKIP][9] ([i915#8555]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@gem_ctx_persistence@heartbeat-stop.html * igt@gem_ctx_persistence@hostile: - shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-snb6/igt@gem_ctx_persistence@hostile.html * igt@gem_eio@banned: - shard-mtlp: [PASS][11] -> [FAIL][12] ([i915#8798]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-1/igt@gem_eio@banned.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-6/igt@gem_eio@banned.html * igt@gem_exec_capture@capture@vcs1-smem: - shard-mtlp: [PASS][13] -> [DMESG-WARN][14] ([i915#5591]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-8/igt@gem_exec_capture@capture@vcs1-smem.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-5/igt@gem_exec_capture@capture@vcs1-smem.html * igt@gem_exec_capture@pi@vecs0: - shard-mtlp: [PASS][15] -> [FAIL][16] ([i915#4475] / [i915#7765]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-2/igt@gem_exec_capture@pi@vecs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-2/igt@gem_exec_capture@pi@vecs0.html * igt@gem_exec_endless@dispatch@bcs0: - shard-mtlp: [PASS][17] -> [TIMEOUT][18] ([i915#3778] / [i915#7016]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-5/igt@gem_exec_endless@dispatch@bcs0.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-1/igt@gem_exec_endless@dispatch@bcs0.html * igt@gem_exec_fair@basic-none@bcs0: - shard-rkl: [PASS][19] -> [FAIL][20] ([i915#2842]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-rkl-1/igt@gem_exec_fair@basic-none@bcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-2/igt@gem_exec_fair@basic-none@bcs0.html * igt@gem_exec_reloc@basic-wc-gtt: - shard-mtlp: NOTRUN -> [SKIP][21] ([i915#3281]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@gem_exec_reloc@basic-wc-gtt.html * igt@gem_exec_schedule@noreorder@rcs0: - shard-mtlp: [PASS][22] -> [DMESG-FAIL][23] ([i915#9121]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-4/igt@gem_exec_schedule@noreorder@rcs0.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-4/igt@gem_exec_schedule@noreorder@rcs0.html * igt@gem_lmem_swapping@heavy-multi: - shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#4613]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl7/igt@gem_lmem_swapping@heavy-multi.html * igt@gem_lmem_swapping@smem-oom@lmem0: - shard-dg1: [PASS][25] -> [TIMEOUT][26] ([i915#5493]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg1-15/igt@gem_lmem_swapping@smem-oom@lmem0.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-12/igt@gem_lmem_swapping@smem-oom@lmem0.html * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-snb: [PASS][27] -> [FAIL][28] ([i915#8295]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-snb2/igt@gem_ppgtt@blt-vs-render-ctx0.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-snb1/igt@gem_ppgtt@blt-vs-render-ctx0.html * igt@i915_pm_rc6_residency@rc6-idle@rcs0: - shard-dg1: [PASS][29] -> [FAIL][30] ([i915#3591]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html * igt@i915_pm_rpm@dpms-mode-unset-lpsp: - shard-rkl: [PASS][31] -> [SKIP][32] ([i915#1397]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-rkl-7/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-2/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html * igt@i915_pm_rpm@dpms-non-lpsp: - shard-dg1: [PASS][33] -> [SKIP][34] ([i915#1397]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg1-16/igt@i915_pm_rpm@dpms-non-lpsp.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-19/igt@i915_pm_rpm@dpms-non-lpsp.html * igt@i915_pm_rps@reset: - shard-tglu: [PASS][35] -> [INCOMPLETE][36] ([i915#8320]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-tglu-3/igt@i915_pm_rps@reset.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-tglu-4/igt@i915_pm_rps@reset.html * igt@i915_selftest@live@requests: - shard-mtlp: [PASS][37] -> [ABORT][38] ([i915#7920] / [i915#7982]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-1/igt@i915_selftest@live@requests.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-6/igt@i915_selftest@live@requests.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-2-y-rc_ccs: - shard-rkl: NOTRUN -> [SKIP][39] ([i915#8502]) +3 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-2-y-rc_ccs.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-4-rc_ccs-cc: - shard-dg2: NOTRUN -> [SKIP][40] ([i915#8709]) +11 similar issues [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-4-rc_ccs-cc.html * igt@kms_async_flips@crc@pipe-a-hdmi-a-3: - shard-dg2: NOTRUN -> [FAIL][41] ([i915#8247]) +3 similar issues [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@kms_async_flips@crc@pipe-a-hdmi-a-3.html * igt@kms_async_flips@crc@pipe-b-hdmi-a-3: - shard-dg1: NOTRUN -> [FAIL][42] ([i915#8247]) +3 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-12/igt@kms_async_flips@crc@pipe-b-hdmi-a-3.html * igt@kms_big_fb@4-tiled-32bpp-rotate-90: - shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271]) +58 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl7/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html * igt@kms_big_fb@4-tiled-8bpp-rotate-90: - shard-mtlp: NOTRUN -> [SKIP][44] ([fdo#111614]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip: - shard-mtlp: [PASS][45] -> [FAIL][46] ([i915#3743]) +1 similar issue [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html * igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_mc_ccs: - shard-mtlp: NOTRUN -> [SKIP][47] ([i915#3886] / [i915#6095]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#3886]) +1 similar issue [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl7/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-bad-rotation-90-4_tiled_mtl_rc_ccs: - shard-dg2: NOTRUN -> [SKIP][49] ([i915#5354]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@kms_ccs@pipe-c-bad-rotation-90-4_tiled_mtl_rc_ccs.html * igt@kms_cdclk@mode-transition-all-outputs: - shard-mtlp: NOTRUN -> [SKIP][50] ([i915#7213] / [i915#9010]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@kms_cdclk@mode-transition-all-outputs.html * igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2: - shard-dg2: NOTRUN -> [SKIP][51] ([i915#4087]) +3 similar issues [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-2/igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2.html * igt@kms_content_protection@atomic@pipe-a-dp-4: - shard-dg2: NOTRUN -> [TIMEOUT][52] ([i915#7173]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@kms_content_protection@atomic@pipe-a-dp-4.html * igt@kms_content_protection@lic: - shard-dg2: NOTRUN -> [SKIP][53] ([i915#7118]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@kms_content_protection@lic.html * igt@kms_cursor_crc@cursor-onscreen-512x512: - shard-mtlp: NOTRUN -> [SKIP][54] ([i915#3359]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@kms_cursor_crc@cursor-onscreen-512x512.html * igt@kms_cursor_legacy@cursor-vs-flip-toggle: - shard-mtlp: [PASS][55] -> [FAIL][56] ([i915#8248]) +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-2/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-5/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-apl: [PASS][57] -> [FAIL][58] ([i915#2346]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_flip@2x-dpms-vs-vblank-race: - shard-dg2: NOTRUN -> [SKIP][59] ([fdo#109274]) +1 similar issue [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@kms_flip@2x-dpms-vs-vblank-race.html * igt@kms_flip@2x-flip-vs-rmfb-interruptible: - shard-apl: NOTRUN -> [SKIP][60] ([fdo#109271] / [fdo#111767]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl7/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html * igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4: - shard-mtlp: [PASS][61] -> [FAIL][62] ([i915#9056]) +3 similar issues [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-5/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-5/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render: - shard-dg2: [PASS][63] -> [FAIL][64] ([i915#6880]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt: - shard-mtlp: NOTRUN -> [SKIP][65] ([i915#1825]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-pwrite: - shard-dg2: NOTRUN -> [SKIP][66] ([i915#3458]) +1 similar issue [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-mtlp: NOTRUN -> [SKIP][67] ([i915#8708]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][68] ([i915#8708]) +1 similar issue [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-gtt.html * igt@kms_hdmi_inject@inject-audio: - shard-dg2: [PASS][69] -> [SKIP][70] ([i915#433]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-10/igt@kms_hdmi_inject@inject-audio.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-12/igt@kms_hdmi_inject@inject-audio.html * igt@kms_hdr@bpc-switch: - shard-dg2: NOTRUN -> [SKIP][71] ([i915#3555] / [i915#8228]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@kms_hdr@bpc-switch.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1: - shard-snb: NOTRUN -> [DMESG-WARN][72] ([i915#8841]) +2 similar issues [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-snb1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@intel-max-src-size: - shard-dg2: NOTRUN -> [SKIP][73] ([i915#6953]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@kms_plane_scaling@intel-max-src-size.html * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-3: - shard-dg1: NOTRUN -> [FAIL][74] ([i915#8292]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-12/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-3.html * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][75] ([i915#5176]) +23 similar issues [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-12/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-25@pipe-a-hdmi-a-3.html * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-d-dp-2: - shard-dg2: NOTRUN -> [SKIP][76] ([i915#5176]) +3 similar issues [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-12/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-d-dp-2.html * igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-1: - shard-rkl: NOTRUN -> [SKIP][77] ([i915#5176]) +5 similar issues [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-75@pipe-a-hdmi-a-1.html * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1: - shard-snb: NOTRUN -> [SKIP][78] ([fdo#109271]) +188 similar issues [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-snb4/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-vga-1.html * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][79] ([i915#5235]) +15 similar issues [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-12/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-hdmi-a-3.html * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][80] ([i915#5235]) +1 similar issue [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-4/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-2.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-dp-4: - shard-dg2: NOTRUN -> [SKIP][81] ([i915#5235]) +11 similar issues [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-dp-4.html * igt@kms_psr@psr2_cursor_mmap_gtt: - shard-dg2: NOTRUN -> [SKIP][82] ([i915#1072]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@kms_psr@psr2_cursor_mmap_gtt.html * igt@kms_rotation_crc@primary-rotation-270: - shard-mtlp: NOTRUN -> [SKIP][83] ([i915#4235]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@kms_rotation_crc@primary-rotation-270.html * igt@kms_selftest@drm_format: - shard-apl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#8661]) +1 similar issue [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl7/igt@kms_selftest@drm_format.html * igt@kms_sysfs_edid_timing: - shard-dg2: [PASS][85] -> [FAIL][86] ([IGT#2]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-12/igt@kms_sysfs_edid_timing.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@kms_sysfs_edid_timing.html * igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend: - shard-apl: [PASS][87] -> [ABORT][88] ([i915#180]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-apl7/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl6/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html * igt@v3d/v3d_submit_csd@bad-extension: - shard-mtlp: NOTRUN -> [SKIP][89] ([i915#2575]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-3/igt@v3d/v3d_submit_csd@bad-extension.html * igt@vc4/vc4_lookup_fail@bad-color-write: - shard-dg2: NOTRUN -> [SKIP][90] ([i915#7711]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-11/igt@vc4/vc4_lookup_fail@bad-color-write.html #### Possible fixes #### * igt@gem_eio@reset-stress: - shard-dg1: [FAIL][91] ([i915#5784]) -> [PASS][92] [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg1-15/igt@gem_eio@reset-stress.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-12/igt@gem_eio@reset-stress.html * igt@gem_exec_capture@pi@rcs0: - shard-mtlp: [FAIL][93] ([i915#4475]) -> [PASS][94] [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-2/igt@gem_exec_capture@pi@rcs0.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-2/igt@gem_exec_capture@pi@rcs0.html * igt@gem_exec_fair@basic-deadline: - shard-glk: [FAIL][95] ([i915#2846]) -> [PASS][96] [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-glk1/igt@gem_exec_fair@basic-deadline.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-glk1/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_schedule@noreorder@bcs0: - shard-mtlp: [DMESG-FAIL][97] ([i915#9121]) -> [PASS][98] +1 similar issue [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-4/igt@gem_exec_schedule@noreorder@bcs0.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-4/igt@gem_exec_schedule@noreorder@bcs0.html * igt@gem_lmem_swapping@smem-oom@lmem0: - shard-dg2: [TIMEOUT][99] ([i915#5493]) -> [PASS][100] [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-6/igt@gem_lmem_swapping@smem-oom@lmem0.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-1/igt@gem_lmem_swapping@smem-oom@lmem0.html * igt@i915_pm_rpm@dpms-mode-unset-non-lpsp: - shard-dg2: [SKIP][101] ([i915#1397]) -> [PASS][102] [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-12/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html * igt@i915_pm_rpm@modeset-non-lpsp: - shard-rkl: [SKIP][103] ([i915#1397]) -> [PASS][104] +1 similar issue [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-2/igt@i915_pm_rpm@modeset-non-lpsp.html * igt@kms_big_fb@4-tiled-64bpp-rotate-180: - shard-mtlp: [FAIL][105] ([i915#5138]) -> [PASS][106] [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-1/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-2/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip: - shard-mtlp: [FAIL][107] ([i915#3743]) -> [PASS][108] +1 similar issue [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-mtlp: [FAIL][109] ([i915#2346]) -> [PASS][110] [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4-rc_ccs: - shard-mtlp: [FAIL][111] ([i915#9056]) -> [PASS][112] +5 similar issues [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-5/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4-rc_ccs.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-5/igt@kms_flip_tiling@flip-change-tiling@edp-1-pipe-b-4-rc_ccs-cc-to-4-rc_ccs.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: - shard-dg2: [FAIL][113] ([i915#6880]) -> [PASS][114] +1 similar issue [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1: - shard-apl: [ABORT][115] ([i915#180]) -> [PASS][116] [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html * igt@perf_pmu@most-busy-idle-check-all@rcs0: - shard-dg1: [FAIL][117] ([i915#5234]) -> [PASS][118] [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg1-12/igt@perf_pmu@most-busy-idle-check-all@rcs0.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-18/igt@perf_pmu@most-busy-idle-check-all@rcs0.html * igt@sysfs_heartbeat_interval@nopreempt@ccs0: - shard-mtlp: [FAIL][119] ([i915#6015]) -> [PASS][120] [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-5/igt@sysfs_heartbeat_interval@nopreempt@ccs0.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-2/igt@sysfs_heartbeat_interval@nopreempt@ccs0.html #### Warnings #### * igt@gem_exec_schedule@noreorder@vcs0: - shard-mtlp: [FAIL][121] -> [DMESG-FAIL][122] ([i915#9121]) [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-4/igt@gem_exec_schedule@noreorder@vcs0.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-4/igt@gem_exec_schedule@noreorder@vcs0.html * igt@kms_content_protection@content_type_change: - shard-dg2: [SKIP][123] ([i915#7118]) -> [SKIP][124] ([i915#7118] / [i915#7162]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-2/igt@kms_content_protection@content_type_change.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-12/igt@kms_content_protection@content_type_change.html * igt@kms_content_protection@mei_interface: - shard-dg2: [SKIP][125] ([i915#7118] / [i915#7162]) -> [SKIP][126] ([i915#7118]) [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-12/igt@kms_content_protection@mei_interface.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-3/igt@kms_content_protection@mei_interface.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-mtlp: [FAIL][127] ([i915#2346]) -> [DMESG-FAIL][128] ([i915#2017] / [i915#5954]) [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-mtlp-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-mtlp-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_fbcon_fbt@psr: - shard-rkl: [SKIP][129] ([fdo#110189] / [i915#3955]) -> [SKIP][130] ([i915#3955]) [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-rkl-1/igt@kms_fbcon_fbt@psr.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-rkl-7/igt@kms_fbcon_fbt@psr.html * igt@kms_psr@cursor_plane_move: - shard-dg1: [SKIP][131] ([i915#1072] / [i915#4078]) -> [SKIP][132] ([i915#1072]) [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg1-16/igt@kms_psr@cursor_plane_move.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-15/igt@kms_psr@cursor_plane_move.html * igt@kms_psr@primary_mmap_gtt: - shard-dg1: [SKIP][133] ([i915#1072]) -> [SKIP][134] ([i915#1072] / [i915#4078]) [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg1-14/igt@kms_psr@primary_mmap_gtt.html [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg1-12/igt@kms_psr@primary_mmap_gtt.html * igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem: - shard-dg2: [INCOMPLETE][135] ([i915#5493]) -> [CRASH][136] ([i915#7331]) [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13541/shard-dg2-6/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/shard-dg2-1/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087 [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235 [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433 [i915#4475]: https://gitlab.freedesktop.org/drm/intel/issues/4475 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5234]: https://gitlab.freedesktop.org/drm/intel/issues/5234 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493 [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591 [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784 [i915#5954]: https://gitlab.freedesktop.org/drm/intel/issues/5954 [i915#6015]: https://gitlab.freedesktop.org/drm/intel/issues/6015 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880 [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953 [i915#7016]: https://gitlab.freedesktop.org/drm/intel/issues/7016 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7162]: https://gitlab.freedesktop.org/drm/intel/issues/7162 [i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173 [i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213 [i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297 [i915#7331]: https://gitlab.freedesktop.org/drm/intel/issues/7331 [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 [i915#7765]: https://gitlab.freedesktop.org/drm/intel/issues/7765 [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920 [i915#7982]: https://gitlab.freedesktop.org/drm/intel/issues/7982 [i915#8190]: https://gitlab.freedesktop.org/drm/intel/issues/8190 [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228 [i915#8247]: https://gitlab.freedesktop.org/drm/intel/issues/8247 [i915#8248]: https://gitlab.freedesktop.org/drm/intel/issues/8248 [i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292 [i915#8295]: https://gitlab.freedesktop.org/drm/intel/issues/8295 [i915#8320]: https://gitlab.freedesktop.org/drm/intel/issues/8320 [i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502 [i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555 [i915#8661]: https://gitlab.freedesktop.org/drm/intel/issues/8661 [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708 [i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709 [i915#8798]: https://gitlab.freedesktop.org/drm/intel/issues/8798 [i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841 [i915#9010]: https://gitlab.freedesktop.org/drm/intel/issues/9010 [i915#9056]: https://gitlab.freedesktop.org/drm/intel/issues/9056 [i915#9121]: https://gitlab.freedesktop.org/drm/intel/issues/9121 Build changes ------------- * Linux: CI_DRM_13541 -> Patchwork_122455v2 CI-20190529: 20190529 CI_DRM_13541: 035b310211a224d37e0968584c01c91f4581f037 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7448: 84aa6d50648d9349fb4f1520f37e5374908c9f4d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_122455v2: 035b310211a224d37e0968584c01c91f4581f037 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_122455v2/index.html [-- Attachment #2: Type: text/html, Size: 40698 bytes --] ^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2023-08-21 23:01 UTC | newest] Thread overview: 28+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-08-15 10:19 [Intel-gfx] [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" Jani Nikula 2023-08-15 10:19 ` Jani Nikula 2023-08-15 10:19 ` Jani Nikula 2023-08-15 10:19 ` [Intel-gfx] [PATCH v2 1/2] " Dirk Lehmann 2023-08-15 10:19 ` Dirk Lehmann 2023-08-15 11:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork 2023-08-15 11:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2023-08-15 11:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2023-08-15 12:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2023-08-17 9:44 ` [Intel-gfx] [PATCH v2 2/2] drm/edid: Fix "Analog composite sync!" for current eDP display panels Dirk Lehmann 2023-08-17 9:44 ` Dirk Lehmann 2023-08-17 13:05 ` [Intel-gfx] " Jani Nikula 2023-08-17 13:05 ` Jani Nikula 2023-08-17 13:05 ` Jani Nikula 2023-08-17 14:29 ` [Intel-gfx] " Dirk Lehmann 2023-08-17 14:29 ` Dirk Lehmann 2023-08-17 14:29 ` Dirk Lehmann 2023-08-17 14:00 ` kernel test robot 2023-08-17 11:35 ` [Intel-gfx] [PATCH] Revert "drm/edid: Fix csync detailed mode parsing" Ville Syrjälä 2023-08-17 11:35 ` Ville Syrjälä 2023-08-17 11:35 ` Ville Syrjälä 2023-08-17 12:40 ` [Intel-gfx] " Jani Nikula 2023-08-17 12:40 ` Jani Nikula 2023-08-17 12:40 ` Jani Nikula 2023-08-21 19:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/edid: Fix csync detailed mode parsing" (rev2) Patchwork 2023-08-21 19:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2023-08-21 19:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2023-08-21 23:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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