From: Jiri Pirko <jiri@resnulli.us>
To: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Cc: Bart Van Assche <bvanassche@acm.org>,
netdev@vger.kernel.org, intel-wired-lan@lists.osuosl.org,
linux-arm-kernel@lists.infradead.org,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
linux-clk@vger.kernel.org, Milena Olech <milena.olech@intel.com>
Subject: Re: [Intel-wired-lan] [PATCH net-next v3 7/9] ice: implement dpll interface to control cgu
Date: Thu, 10 Aug 2023 08:43:00 +0200 [thread overview]
Message-ID: <ZNSG9GwGhND0YsBr@nanopsycho> (raw)
In-Reply-To: <20230809214027.556192-8-vadim.fedorenko@linux.dev>
Wed, Aug 09, 2023 at 11:40:25PM CEST, vadim.fedorenko@linux.dev wrote:
>From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
[...]
>+/**
>+ * ice_dpll_deinit - Disable the driver/HW support for dpll subsystem
>+ * the dpll device.
>+ * @pf: board private structure
>+ *
>+ * Handles the cleanup work required after dpll initialization, freeing
>+ * resources and unregistering the dpll, pin and all resources used for
>+ * handling them.
>+ *
>+ * Context: Destroys pf->dplls.lock mutex.
>+ */
>+void ice_dpll_deinit(struct ice_pf *pf)
>+{
>+ bool cgu = ice_is_feature_supported(pf, ICE_F_CGU);
>+
>+ if (!test_bit(ICE_FLAG_DPLL, pf->flags))
>+ return;
>+ if (cgu)
>+ ice_dpll_deinit_worker(pf);
>+ clear_bit(ICE_FLAG_DPLL, pf->flags);
Clearing the flag after deinit worker somehow implicates that it needs
to be set until here. That is not true.
Please rather use test_and_clear_bit() instead of test_bit() which would
takes care of the clear alongside with the check.
With or without that.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
[...]
_______________________________________________
Intel-wired-lan mailing list
Intel-wired-lan@osuosl.org
https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
WARNING: multiple messages have this Message-ID (diff)
From: Jiri Pirko <jiri@resnulli.us>
To: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Cc: Jakub Kicinski <kuba@kernel.org>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Paolo Abeni <pabeni@redhat.com>,
Milena Olech <milena.olech@intel.com>,
Michal Michalik <michal.michalik@intel.com>,
linux-arm-kernel@lists.infradead.org, poros@redhat.com,
mschmidt@redhat.com, netdev@vger.kernel.org,
linux-clk@vger.kernel.org, Bart Van Assche <bvanassche@acm.org>,
intel-wired-lan@lists.osuosl.org
Subject: Re: [PATCH net-next v3 7/9] ice: implement dpll interface to control cgu
Date: Thu, 10 Aug 2023 08:43:00 +0200 [thread overview]
Message-ID: <ZNSG9GwGhND0YsBr@nanopsycho> (raw)
In-Reply-To: <20230809214027.556192-8-vadim.fedorenko@linux.dev>
Wed, Aug 09, 2023 at 11:40:25PM CEST, vadim.fedorenko@linux.dev wrote:
>From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
[...]
>+/**
>+ * ice_dpll_deinit - Disable the driver/HW support for dpll subsystem
>+ * the dpll device.
>+ * @pf: board private structure
>+ *
>+ * Handles the cleanup work required after dpll initialization, freeing
>+ * resources and unregistering the dpll, pin and all resources used for
>+ * handling them.
>+ *
>+ * Context: Destroys pf->dplls.lock mutex.
>+ */
>+void ice_dpll_deinit(struct ice_pf *pf)
>+{
>+ bool cgu = ice_is_feature_supported(pf, ICE_F_CGU);
>+
>+ if (!test_bit(ICE_FLAG_DPLL, pf->flags))
>+ return;
>+ if (cgu)
>+ ice_dpll_deinit_worker(pf);
>+ clear_bit(ICE_FLAG_DPLL, pf->flags);
Clearing the flag after deinit worker somehow implicates that it needs
to be set until here. That is not true.
Please rather use test_and_clear_bit() instead of test_bit() which would
takes care of the clear alongside with the check.
With or without that.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
[...]
WARNING: multiple messages have this Message-ID (diff)
From: Jiri Pirko <jiri@resnulli.us>
To: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Cc: Jakub Kicinski <kuba@kernel.org>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jonathan Lemon <jonathan.lemon@gmail.com>,
Paolo Abeni <pabeni@redhat.com>,
Milena Olech <milena.olech@intel.com>,
Michal Michalik <michal.michalik@intel.com>,
linux-arm-kernel@lists.infradead.org, poros@redhat.com,
mschmidt@redhat.com, netdev@vger.kernel.org,
linux-clk@vger.kernel.org, Bart Van Assche <bvanassche@acm.org>,
intel-wired-lan@lists.osuosl.org
Subject: Re: [PATCH net-next v3 7/9] ice: implement dpll interface to control cgu
Date: Thu, 10 Aug 2023 08:43:00 +0200 [thread overview]
Message-ID: <ZNSG9GwGhND0YsBr@nanopsycho> (raw)
In-Reply-To: <20230809214027.556192-8-vadim.fedorenko@linux.dev>
Wed, Aug 09, 2023 at 11:40:25PM CEST, vadim.fedorenko@linux.dev wrote:
>From: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
[...]
>+/**
>+ * ice_dpll_deinit - Disable the driver/HW support for dpll subsystem
>+ * the dpll device.
>+ * @pf: board private structure
>+ *
>+ * Handles the cleanup work required after dpll initialization, freeing
>+ * resources and unregistering the dpll, pin and all resources used for
>+ * handling them.
>+ *
>+ * Context: Destroys pf->dplls.lock mutex.
>+ */
>+void ice_dpll_deinit(struct ice_pf *pf)
>+{
>+ bool cgu = ice_is_feature_supported(pf, ICE_F_CGU);
>+
>+ if (!test_bit(ICE_FLAG_DPLL, pf->flags))
>+ return;
>+ if (cgu)
>+ ice_dpll_deinit_worker(pf);
>+ clear_bit(ICE_FLAG_DPLL, pf->flags);
Clearing the flag after deinit worker somehow implicates that it needs
to be set until here. That is not true.
Please rather use test_and_clear_bit() instead of test_bit() which would
takes care of the clear alongside with the check.
With or without that.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
[...]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-08-10 6:43 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-09 21:40 [Intel-wired-lan] [PATCH net-next v3 0/9] Create common DPLL configuration API Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 1/9] dpll: documentation on DPLL subsystem interface Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-10 6:45 ` [Intel-wired-lan] " Jiri Pirko
2023-08-10 6:45 ` Jiri Pirko
2023-08-10 6:45 ` Jiri Pirko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 2/9] dpll: spec: Add Netlink spec in YAML Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 3/9] dpll: core: Add DPLL framework base functions Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 4/9] dpll: netlink: " Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 5/9] netdev: expose DPLL pin handle for netdevice Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 6/9] ice: add admin commands to access cgu configuration Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-11 2:21 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-11 2:21 ` Jakub Kicinski
2023-08-11 2:21 ` Jakub Kicinski
2023-08-11 9:30 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-11 9:30 ` Vadim Fedorenko
2023-08-11 9:30 ` Vadim Fedorenko
2023-08-11 12:16 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2023-08-11 12:16 ` Kubalewski, Arkadiusz
2023-08-11 12:16 ` Kubalewski, Arkadiusz
2023-08-11 13:23 ` [Intel-wired-lan] " Vadim Fedorenko
2023-08-11 13:23 ` Vadim Fedorenko
2023-08-11 13:23 ` Vadim Fedorenko
2023-08-11 12:04 ` [Intel-wired-lan] " Kubalewski, Arkadiusz
2023-08-11 12:04 ` Kubalewski, Arkadiusz
2023-08-11 12:04 ` Kubalewski, Arkadiusz
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 7/9] ice: implement dpll interface to control cgu Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-10 6:43 ` Jiri Pirko [this message]
2023-08-10 6:43 ` Jiri Pirko
2023-08-10 6:43 ` Jiri Pirko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 8/9] ptp_ocp: implement DPLL ops Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` [Intel-wired-lan] [PATCH net-next v3 9/9] mlx5: Implement SyncE support using DPLL infrastructure Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
2023-08-09 21:40 ` Vadim Fedorenko
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