From: Gregory Price <gregory.price@memverge.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Gregory Price <gourry.memverge@gmail.com>,
qemu-devel@nongnu.org, linux-cxl@vger.kernel.org,
junhee.ryu@sk.com, kwangjin.ko@sk.com
Subject: Re: [PATCH 4/5] cxl/type3: add an optional mhd validation function for memory accesses
Date: Mon, 4 Sep 2023 07:01:01 -0400 [thread overview]
Message-ID: <ZPW47STwetDqs1vi@memverge.com> (raw)
In-Reply-To: <20230904180214.00007e32@Huawei.com>
On Mon, Sep 04, 2023 at 06:02:14PM +0100, Jonathan Cameron wrote:
> On Thu, 31 Aug 2023 21:29:13 -0400
> Gregory Price <gourry.memverge@gmail.com> wrote:
>
> > When memory accesses are made, some MHSLD's would validate the address
> > is within the scope of allocated sections. To do this, the base device
> > must call an optional function set by inherited devices.
> >
> > Signed-off-by: Gregory Price <gregory.price@memverge.com>
>
> This sort of callback addition can be done via class initialization.
> E.g. get_lsa_size()
> https://elixir.bootlin.com/qemu/latest/source/hw/mem/cxl_type3.c#L1494
> as the callback is the same for all instances of the class which
> in next patch is CXLNiagraClass where you already set the
> PCIClass callbacks in cxl_niagara_class_init()
>
> You can then use something like:
> CXLType3Class *cvc = CXL_TYPE3_GET_CLASS(ct3d);
> cvc->mhd_access_valid(ct3d, dpa_offset, size);
>
> Jonathan
>
Will make this change along with a few cleanups suggested elsewhere and
a few boneheaded mistakes.
~Gregory
next prev parent reply other threads:[~2023-09-05 16:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-01 1:29 [PATCH 0/5 v2] CXL: SK hynix Niagara MHSLD Device Gregory Price
2023-09-01 1:29 ` [PATCH 1/5] cxl/mailbox: move mailbox effect definitions to a header Gregory Price
2023-09-05 8:50 ` Philippe Mathieu-Daudé
2023-09-01 1:29 ` [PATCH 2/5] cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions Gregory Price
2023-09-04 16:53 ` Jonathan Cameron
2023-09-04 16:53 ` Jonathan Cameron via
2023-09-05 8:51 ` Philippe Mathieu-Daudé
2023-09-01 1:29 ` [PATCH 3/5] cxl/type3: Expose ct3 functions so that inheriters can call them Gregory Price
2023-09-05 8:59 ` Philippe Mathieu-Daudé
2023-09-04 11:11 ` Gregory Price
2023-09-01 1:29 ` [PATCH 4/5] cxl/type3: add an optional mhd validation function for memory accesses Gregory Price
2023-09-04 17:02 ` Jonathan Cameron
2023-09-04 17:02 ` Jonathan Cameron via
2023-09-04 11:01 ` Gregory Price [this message]
2023-09-01 1:29 ` [PATCH 5/5] cxl/vendor: SK hynix Niagara Multi-Headed SLD Device Gregory Price
2023-09-06 13:04 ` Jonathan Cameron
2023-09-06 13:04 ` Jonathan Cameron via
2023-09-05 16:04 ` Gregory Price
2023-09-12 12:37 ` Jonathan Cameron
2023-09-12 12:37 ` Jonathan Cameron via
2023-09-05 9:04 ` [PATCH 0/5 v2] CXL: SK hynix Niagara MHSLD Device Philippe Mathieu-Daudé
2023-09-04 11:24 ` Gregory Price
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