From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Vinod Govindapillai <vinod.govindapillai@intel.com>
Cc: ville.syrjala@intel.com, intel-gfx@lists.freedesktop.org,
matthew.d.roper@intel.com, intel-xe@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 2/2] drm/i915/lnl: FBC is supported with per pixel alpha
Date: Wed, 13 Sep 2023 13:38:23 +0300 [thread overview]
Message-ID: <ZQGRH4aWpp078lBl@intel.com> (raw)
In-Reply-To: <20230904115517.458662-3-vinod.govindapillai@intel.com>
On Mon, Sep 04, 2023 at 02:55:17PM +0300, Vinod Govindapillai wrote:
> For LNL onwards, FBC can be supported on planes with per
> pixel alpha
>
> Bspec: 69560
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a3999ad95a19..c0e4caec03ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1209,7 +1209,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
> return 0;
> }
>
> - if (plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
> + if (DISPLAY_VER(i915) < 20 &&
Bspec still says 15. Someone needs to figure this mess out for
all LNL patches.
> + plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
> fb->format->has_alpha) {
We would have already rejected the pixel format earlier, so atm this
check is redundant.
> plane_state->no_fbc_reason = "per-pixel alpha not supported";
> return 0;
> --
> 2.34.1
--
Ville Syrjälä
Intel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Vinod Govindapillai <vinod.govindapillai@intel.com>
Cc: ville.syrjala@intel.com, intel-gfx@lists.freedesktop.org,
matthew.d.roper@intel.com, intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [Intel-gfx] [PATCH v4 2/2] drm/i915/lnl: FBC is supported with per pixel alpha
Date: Wed, 13 Sep 2023 13:38:23 +0300 [thread overview]
Message-ID: <ZQGRH4aWpp078lBl@intel.com> (raw)
In-Reply-To: <20230904115517.458662-3-vinod.govindapillai@intel.com>
On Mon, Sep 04, 2023 at 02:55:17PM +0300, Vinod Govindapillai wrote:
> For LNL onwards, FBC can be supported on planes with per
> pixel alpha
>
> Bspec: 69560
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a3999ad95a19..c0e4caec03ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1209,7 +1209,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
> return 0;
> }
>
> - if (plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
> + if (DISPLAY_VER(i915) < 20 &&
Bspec still says 15. Someone needs to figure this mess out for
all LNL patches.
> + plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
> fb->format->has_alpha) {
We would have already rejected the pixel format earlier, so atm this
check is redundant.
> plane_state->no_fbc_reason = "per-pixel alpha not supported";
> return 0;
> --
> 2.34.1
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2023-09-13 10:38 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-04 11:55 [Intel-gfx] [PATCH v4 0/2] fbc on any planes Vinod Govindapillai
2023-09-04 11:55 ` [Intel-xe] " Vinod Govindapillai
2023-09-04 11:55 ` [Intel-gfx] [PATCH v4 1/2] drm/i915/lnl: possibility to enable FBC on first three planes Vinod Govindapillai
2023-09-04 11:55 ` [Intel-xe] " Vinod Govindapillai
2023-09-04 11:55 ` [Intel-gfx] [PATCH v4 2/2] drm/i915/lnl: FBC is supported with per pixel alpha Vinod Govindapillai
2023-09-04 11:55 ` [Intel-xe] " Vinod Govindapillai
2023-09-13 10:38 ` Ville Syrjälä [this message]
2023-09-13 10:38 ` [Intel-xe] [Intel-gfx] " Ville Syrjälä
2023-09-13 10:48 ` Govindapillai, Vinod
2023-09-13 10:48 ` [Intel-xe] " Govindapillai, Vinod
2023-09-21 8:34 ` Govindapillai, Vinod
2023-09-21 8:34 ` [Intel-xe] " Govindapillai, Vinod
2023-09-21 11:37 ` Ville Syrjälä
2023-09-21 11:37 ` [Intel-xe] " Ville Syrjälä
2023-09-21 13:22 ` [Intel-gfx] [Intel-xe] " Lucas De Marchi
2023-09-21 13:22 ` [Intel-xe] [Intel-gfx] " Lucas De Marchi
2023-09-21 17:23 ` [Intel-gfx] [Intel-xe] " Ville Syrjälä
2023-09-21 17:23 ` [Intel-xe] [Intel-gfx] " Ville Syrjälä
2023-09-21 18:20 ` [Intel-gfx] [Intel-xe] " Lucas De Marchi
2023-09-21 18:20 ` [Intel-xe] [Intel-gfx] " Lucas De Marchi
2023-09-04 12:08 ` [Intel-xe] ✓ CI.Patch_applied: success for fbc on any planes (rev2) Patchwork
2023-09-04 12:08 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-09-04 12:09 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-09-04 12:16 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-09-04 12:16 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
2023-09-04 12:17 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-09-04 12:48 ` [Intel-xe] ✓ CI.BAT: success " Patchwork
2023-09-04 14:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2023-09-04 14:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-04 14:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-04 16:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-21 13:24 ` [Intel-gfx] [PATCH v4 0/2] fbc on any planes Lucas De Marchi
2023-09-21 13:24 ` [Intel-xe] " Lucas De Marchi
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