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From: Leonardo Bras <leobras@redhat.com>
To: guoren@kernel.org
Cc: paul.walmsley@sifive.com, anup@brainfault.org,
	peterz@infradead.org, mingo@redhat.com, will@kernel.org,
	palmer@rivosinc.com, longman@redhat.com, boqun.feng@gmail.com,
	tglx@linutronix.de, paulmck@kernel.org, rostedt@goodmis.org,
	rdunlap@infradead.org, catalin.marinas@arm.com,
	conor.dooley@microchip.com, xiaoguang.xing@sophgo.com,
	bjorn@rivosinc.com, alexghiti@rivosinc.com,
	keescook@chromium.org, greentime.hu@sifive.com,
	ajones@ventanamicro.com, jszhang@kernel.org, wefu@redhat.com,
	wuwei2016@iscas.ac.cn, linux-arch@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org,
	kvm@vger.kernel.org, virtualization@lists.linux-foundation.org,
	linux-csky@vger.kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V11 16/17] RISC-V: paravirt: pvqspinlock: KVM: Add paravirt qspinlock skeleton
Date: Fri, 15 Sep 2023 03:46:37 -0300	[thread overview]
Message-ID: <ZQP9zSl70Jd2T5wp@redhat.com> (raw)
In-Reply-To: <20230910082911.3378782-17-guoren@kernel.org>

On Sun, Sep 10, 2023 at 04:29:10AM -0400, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
> 
> Add the files functions needed to support the SBI PVLOCK (paravirt
> qspinlock kick_cpu) extension. This is a preparation for the next
> core implementation of kick_cpu.
> 
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> ---
>  arch/riscv/include/asm/kvm_vcpu_sbi.h |  1 +
>  arch/riscv/include/uapi/asm/kvm.h     |  1 +
>  arch/riscv/kvm/Makefile               |  1 +
>  arch/riscv/kvm/vcpu_sbi.c             |  4 +++
>  arch/riscv/kvm/vcpu_sbi_pvlock.c      | 38 +++++++++++++++++++++++++++
>  5 files changed, 45 insertions(+)
>  create mode 100644 arch/riscv/kvm/vcpu_sbi_pvlock.c
> 
> diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> index cdcf0ff07be7..7b4d60b54d7e 100644
> --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> @@ -71,6 +71,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst;
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm;
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental;
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor;
> +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_pvlock;
>  
>  #ifdef CONFIG_RISCV_PMU_SBI
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_pmu;
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 992c5e407104..d005c229f2da 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -148,6 +148,7 @@ enum KVM_RISCV_SBI_EXT_ID {
>  	KVM_RISCV_SBI_EXT_PMU,
>  	KVM_RISCV_SBI_EXT_EXPERIMENTAL,
>  	KVM_RISCV_SBI_EXT_VENDOR,
> +	KVM_RISCV_SBI_EXT_PVLOCK,
>  	KVM_RISCV_SBI_EXT_MAX,
>  };
>  
> diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile
> index 4c2067fc59fc..6112750a3a0c 100644
> --- a/arch/riscv/kvm/Makefile
> +++ b/arch/riscv/kvm/Makefile
> @@ -26,6 +26,7 @@ kvm-$(CONFIG_RISCV_SBI_V01) += vcpu_sbi_v01.o
>  kvm-y += vcpu_sbi_base.o
>  kvm-y += vcpu_sbi_replace.o
>  kvm-y += vcpu_sbi_hsm.o
> +kvm-y += vcpu_sbi_pvlock.o
>  kvm-y += vcpu_timer.o
>  kvm-$(CONFIG_RISCV_PMU_SBI) += vcpu_pmu.o vcpu_sbi_pmu.o
>  kvm-y += aia.o
> diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
> index 9cd97091c723..c03c3d489b2b 100644
> --- a/arch/riscv/kvm/vcpu_sbi.c
> +++ b/arch/riscv/kvm/vcpu_sbi.c
> @@ -74,6 +74,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ext[] = {
>  		.ext_idx = KVM_RISCV_SBI_EXT_VENDOR,
>  		.ext_ptr = &vcpu_sbi_ext_vendor,
>  	},
> +	{
> +		.ext_idx = KVM_RISCV_SBI_EXT_PVLOCK,
> +		.ext_ptr = &vcpu_sbi_ext_pvlock,
> +	},
>  };
>  
>  void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run)
> diff --git a/arch/riscv/kvm/vcpu_sbi_pvlock.c b/arch/riscv/kvm/vcpu_sbi_pvlock.c
> new file mode 100644
> index 000000000000..544a456c5041
> --- /dev/null
> +++ b/arch/riscv/kvm/vcpu_sbi_pvlock.c
> @@ -0,0 +1,38 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c), 2023 Alibaba Cloud
> + *
> + * Authors:
> + *     Guo Ren <guoren@linux.alibaba.com>
> + */
> +
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/kvm_host.h>
> +#include <asm/sbi.h>
> +#include <asm/kvm_vcpu_sbi.h>
> +
> +static int kvm_sbi_ext_pvlock_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
> +				      struct kvm_vcpu_sbi_return *retdata)
> +{
> +	int ret = 0;
> +	struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
> +	unsigned long funcid = cp->a6;
> +
> +	switch (funcid) {
> +	case SBI_EXT_PVLOCK_KICK_CPU:
> +		break;

IIUC, the kick implementation comes in the next patch but here it becomes a 
no-op. Is there any chance this may break a future bisect?

I don't understand a lot, but I would suggest either removing this no-op 
case SBI_EXT_PVLOCK_KICK_CPU, or merging this patch with the next one.

Other than that, LGTM.

Thanks,
Leo



> +	default:
> +		ret = SBI_ERR_NOT_SUPPORTED;
> +	}
> +
> +	retdata->err_val = ret;
> +
> +	return 0;
> +}
> +
> +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_pvlock = {
> +	.extid_start = SBI_EXT_PVLOCK,
> +	.extid_end = SBI_EXT_PVLOCK,
> +	.handler = kvm_sbi_ext_pvlock_handler,
> +};
> -- 
> 2.36.1
> 


WARNING: multiple messages have this Message-ID (diff)
From: Leonardo Bras <leobras@redhat.com>
To: guoren@kernel.org
Cc: paul.walmsley@sifive.com, anup@brainfault.org,
	peterz@infradead.org, mingo@redhat.com, will@kernel.org,
	palmer@rivosinc.com, longman@redhat.com, boqun.feng@gmail.com,
	tglx@linutronix.de, paulmck@kernel.org, rostedt@goodmis.org,
	rdunlap@infradead.org, catalin.marinas@arm.com,
	conor.dooley@microchip.com, xiaoguang.xing@sophgo.com,
	bjorn@rivosinc.com, alexghiti@rivosinc.com,
	keescook@chromium.org, greentime.hu@sifive.com,
	ajones@ventanamicro.com, jszhang@kernel.org, wefu@redhat.com,
	wuwei2016@iscas.ac.cn, linux-arch@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-doc@vger.kernel.org,
	kvm@vger.kernel.org, virtualization@lists.linux-foundation.org,
	linux-csky@vger.kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: Re: [PATCH V11 16/17] RISC-V: paravirt: pvqspinlock: KVM: Add paravirt qspinlock skeleton
Date: Fri, 15 Sep 2023 03:46:37 -0300	[thread overview]
Message-ID: <ZQP9zSl70Jd2T5wp@redhat.com> (raw)
In-Reply-To: <20230910082911.3378782-17-guoren@kernel.org>

On Sun, Sep 10, 2023 at 04:29:10AM -0400, guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
> 
> Add the files functions needed to support the SBI PVLOCK (paravirt
> qspinlock kick_cpu) extension. This is a preparation for the next
> core implementation of kick_cpu.
> 
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> ---
>  arch/riscv/include/asm/kvm_vcpu_sbi.h |  1 +
>  arch/riscv/include/uapi/asm/kvm.h     |  1 +
>  arch/riscv/kvm/Makefile               |  1 +
>  arch/riscv/kvm/vcpu_sbi.c             |  4 +++
>  arch/riscv/kvm/vcpu_sbi_pvlock.c      | 38 +++++++++++++++++++++++++++
>  5 files changed, 45 insertions(+)
>  create mode 100644 arch/riscv/kvm/vcpu_sbi_pvlock.c
> 
> diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> index cdcf0ff07be7..7b4d60b54d7e 100644
> --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h
> +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h
> @@ -71,6 +71,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst;
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm;
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental;
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor;
> +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_pvlock;
>  
>  #ifdef CONFIG_RISCV_PMU_SBI
>  extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_pmu;
> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h
> index 992c5e407104..d005c229f2da 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -148,6 +148,7 @@ enum KVM_RISCV_SBI_EXT_ID {
>  	KVM_RISCV_SBI_EXT_PMU,
>  	KVM_RISCV_SBI_EXT_EXPERIMENTAL,
>  	KVM_RISCV_SBI_EXT_VENDOR,
> +	KVM_RISCV_SBI_EXT_PVLOCK,
>  	KVM_RISCV_SBI_EXT_MAX,
>  };
>  
> diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile
> index 4c2067fc59fc..6112750a3a0c 100644
> --- a/arch/riscv/kvm/Makefile
> +++ b/arch/riscv/kvm/Makefile
> @@ -26,6 +26,7 @@ kvm-$(CONFIG_RISCV_SBI_V01) += vcpu_sbi_v01.o
>  kvm-y += vcpu_sbi_base.o
>  kvm-y += vcpu_sbi_replace.o
>  kvm-y += vcpu_sbi_hsm.o
> +kvm-y += vcpu_sbi_pvlock.o
>  kvm-y += vcpu_timer.o
>  kvm-$(CONFIG_RISCV_PMU_SBI) += vcpu_pmu.o vcpu_sbi_pmu.o
>  kvm-y += aia.o
> diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
> index 9cd97091c723..c03c3d489b2b 100644
> --- a/arch/riscv/kvm/vcpu_sbi.c
> +++ b/arch/riscv/kvm/vcpu_sbi.c
> @@ -74,6 +74,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ext[] = {
>  		.ext_idx = KVM_RISCV_SBI_EXT_VENDOR,
>  		.ext_ptr = &vcpu_sbi_ext_vendor,
>  	},
> +	{
> +		.ext_idx = KVM_RISCV_SBI_EXT_PVLOCK,
> +		.ext_ptr = &vcpu_sbi_ext_pvlock,
> +	},
>  };
>  
>  void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run)
> diff --git a/arch/riscv/kvm/vcpu_sbi_pvlock.c b/arch/riscv/kvm/vcpu_sbi_pvlock.c
> new file mode 100644
> index 000000000000..544a456c5041
> --- /dev/null
> +++ b/arch/riscv/kvm/vcpu_sbi_pvlock.c
> @@ -0,0 +1,38 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c), 2023 Alibaba Cloud
> + *
> + * Authors:
> + *     Guo Ren <guoren@linux.alibaba.com>
> + */
> +
> +#include <linux/errno.h>
> +#include <linux/err.h>
> +#include <linux/kvm_host.h>
> +#include <asm/sbi.h>
> +#include <asm/kvm_vcpu_sbi.h>
> +
> +static int kvm_sbi_ext_pvlock_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
> +				      struct kvm_vcpu_sbi_return *retdata)
> +{
> +	int ret = 0;
> +	struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
> +	unsigned long funcid = cp->a6;
> +
> +	switch (funcid) {
> +	case SBI_EXT_PVLOCK_KICK_CPU:
> +		break;

IIUC, the kick implementation comes in the next patch but here it becomes a 
no-op. Is there any chance this may break a future bisect?

I don't understand a lot, but I would suggest either removing this no-op 
case SBI_EXT_PVLOCK_KICK_CPU, or merging this patch with the next one.

Other than that, LGTM.

Thanks,
Leo



> +	default:
> +		ret = SBI_ERR_NOT_SUPPORTED;
> +	}
> +
> +	retdata->err_val = ret;
> +
> +	return 0;
> +}
> +
> +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_pvlock = {
> +	.extid_start = SBI_EXT_PVLOCK,
> +	.extid_end = SBI_EXT_PVLOCK,
> +	.handler = kvm_sbi_ext_pvlock_handler,
> +};
> -- 
> 2.36.1
> 


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  reply	other threads:[~2023-09-15  6:47 UTC|newest]

Thread overview: 215+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-10  8:28 [PATCH V11 00/17] riscv: Add Native/Paravirt qspinlock support guoren
2023-09-10  8:28 ` guoren
2023-09-10  8:28 ` [PATCH V11 01/17] asm-generic: ticket-lock: Reuse arch_spinlock_t of qspinlock guoren
2023-09-10  8:28   ` guoren
2023-09-11 19:05   ` Leonardo Brás
2023-09-11 19:05     ` Leonardo Brás
2023-09-13  1:55     ` Guo Ren
2023-09-13  1:55       ` Guo Ren
2023-09-13  7:59       ` Leonardo Bras
2023-09-13  7:59         ` Leonardo Bras
2023-09-10  8:28 ` [PATCH V11 02/17] asm-generic: ticket-lock: Move into ticket_spinlock.h guoren
2023-09-10  8:28   ` guoren
2023-09-13  8:15   ` Leonardo Bras
2023-09-13  8:15     ` Leonardo Bras
2023-09-10  8:28 ` [PATCH V11 03/17] riscv: Use Zicbop in arch_xchg when available guoren
2023-12-31  8:29   ` guoren
2023-09-10  8:28   ` guoren
2023-09-13  8:49   ` Leonardo Bras
2023-09-13  8:49     ` Leonardo Bras
2023-09-15 12:36     ` Guo Ren
2023-09-15 12:36       ` Guo Ren
2023-09-16  1:25       ` Leonardo Bras
2023-09-16  1:25         ` Leonardo Bras
2023-09-17 14:34         ` Guo Ren
2023-09-17 14:34           ` Guo Ren
2023-09-19  5:13           ` Leonardo Bras
2023-09-19  5:13             ` Leonardo Bras
2023-09-19  7:53             ` Guo Ren
2023-09-19  7:53               ` Guo Ren
2023-09-19 14:38               ` Leonardo Bras
2023-09-19 14:38                 ` Leonardo Bras
2023-09-14 13:47   ` Andrew Jones
2023-09-14 13:47     ` Andrew Jones
2023-09-15  8:22     ` Leonardo Bras
2023-09-15  8:22       ` Leonardo Bras
2023-09-15 11:07       ` Andrew Jones
2023-09-15 11:07         ` Andrew Jones
2023-09-15 11:26         ` Conor Dooley
2023-09-15 11:26           ` Conor Dooley
2023-09-15 12:22           ` Andrew Jones
2023-09-15 12:22             ` Andrew Jones
2023-09-15 12:42             ` Conor Dooley
2023-09-15 12:42               ` Conor Dooley
2023-09-16  0:05               ` Conor Dooley
2023-09-16  0:05                 ` Conor Dooley
2023-09-15 20:32         ` Leonardo Bras
2023-09-15 20:32           ` Leonardo Bras
2023-09-14 14:25   ` Andrew Jones
2023-09-14 14:25     ` Andrew Jones
2023-09-14 14:47     ` Andrew Jones
2023-09-14 14:47       ` Andrew Jones
2023-09-15 11:37       ` Conor Dooley
2023-09-15 11:37         ` Conor Dooley
2023-09-15 12:14         ` Andrew Jones
2023-09-15 12:14           ` Andrew Jones
2023-09-15 12:53           ` Conor Dooley
2023-09-15 12:53             ` Conor Dooley
2023-09-10  8:28 ` [PATCH V11 04/17] locking/qspinlock: Improve xchg_tail for number of cpus >= 16k guoren
2023-09-10  8:28   ` guoren
2023-09-11  2:35   ` Waiman Long
2023-09-11  2:35     ` Waiman Long
2023-09-11  2:35     ` Waiman Long
2023-09-11  3:09     ` Guo Ren
2023-09-11  3:09       ` Guo Ren
2023-09-11 13:03       ` Waiman Long
2023-09-11 13:03         ` Waiman Long
2023-09-11 13:03         ` Waiman Long
2023-09-12  1:10         ` Guo Ren
2023-09-12  1:10           ` Guo Ren
2023-09-13  8:55           ` Leonardo Bras
2023-09-13  8:55             ` Leonardo Bras
2023-09-13 12:52             ` Guo Ren
2023-09-13 12:52               ` Guo Ren
2023-09-13 13:06               ` Waiman Long
2023-09-13 13:06                 ` Waiman Long
2023-09-13 13:06                 ` Waiman Long
2023-09-14  3:45                 ` Guo Ren
2023-09-14  3:45                   ` Guo Ren
2023-09-10  8:28 ` [PATCH V11 05/17] riscv: qspinlock: Add basic queued_spinlock support guoren
2023-09-10  8:28   ` guoren
2023-09-13 20:28   ` Leonardo Bras
2023-09-13 20:28     ` Leonardo Bras
2023-09-14  4:46     ` Guo Ren
2023-09-14  4:46       ` Guo Ren
2023-09-14  9:43       ` Leonardo Bras
2023-09-14  9:43         ` Leonardo Bras
2023-09-15  2:10         ` Guo Ren
2023-09-15  2:10           ` Guo Ren
2023-09-15  9:08           ` Leonardo Bras
2023-09-15  9:08             ` Leonardo Bras
2023-09-17 15:02             ` Guo Ren
2023-09-17 15:02               ` Guo Ren
2023-09-19  5:20               ` Leonardo Bras
2023-09-19  5:20                 ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 06/17] riscv: qspinlock: Introduce combo spinlock guoren
2023-09-10  8:29   ` guoren
2023-09-10 11:06   ` Guo Ren
2023-09-10 11:06     ` Guo Ren
2023-09-13 20:37     ` Leonardo Bras
2023-09-13 20:37       ` Leonardo Bras
2023-09-13 20:49       ` Leonardo Bras
2023-09-13 20:49         ` Leonardo Bras
2023-09-14  4:49         ` Guo Ren
2023-09-14  4:49           ` Guo Ren
2023-09-14  7:17           ` Leonardo Bras
2023-09-14  7:17             ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 07/17] riscv: qspinlock: Introduce qspinlock param for command line guoren
2023-09-10  8:29   ` guoren
2023-09-11 15:22   ` Waiman Long
2023-09-11 15:22     ` Waiman Long
2023-09-11 15:22     ` Waiman Long
2023-09-12  1:06     ` Guo Ren
2023-09-12  1:06       ` Guo Ren
2023-09-11 15:34   ` Waiman Long
2023-09-11 15:34     ` Waiman Long
2023-09-11 15:34     ` Waiman Long
2023-09-12  1:08     ` Guo Ren
2023-09-12  1:08       ` Guo Ren
2023-09-14  7:32       ` Leonardo Bras
2023-09-14  7:32         ` Leonardo Bras
2023-09-14 17:23         ` Waiman Long
2023-09-14 17:23           ` Waiman Long
2023-09-14 17:23           ` Waiman Long
2023-09-10  8:29 ` [PATCH V11 08/17] riscv: qspinlock: Add virt_spin_lock() support for KVM guest guoren
2023-09-10  8:29   ` guoren
2023-09-14  8:02   ` Leonardo Bras
2023-09-14  8:02     ` Leonardo Bras
2023-09-17 15:12     ` Guo Ren
2023-09-17 15:12       ` Guo Ren
2023-09-19  5:30       ` Leonardo Bras
2023-09-19  5:30         ` Leonardo Bras
2023-09-19  8:04         ` Guo Ren
2023-09-19  8:04           ` Guo Ren
2023-09-19 14:40           ` Leonardo Bras
2023-09-19 14:40             ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 09/17] riscv: qspinlock: errata: Add ERRATA_THEAD_WRITE_ONCE fixup guoren
2023-09-10  8:29   ` guoren
2023-09-14  8:32   ` Leonardo Bras
2023-09-14  8:32     ` Leonardo Bras
2023-09-17 15:15     ` Guo Ren
2023-09-17 15:15       ` Guo Ren
2023-09-19  5:34       ` Leonardo Bras
2023-09-19  5:34         ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 10/17] riscv: qspinlock: errata: Enable qspinlock for T-HEAD processors guoren
2023-09-10  8:29   ` guoren
2023-09-14  9:36   ` Leonardo Bras
2023-09-14  9:36     ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 11/17] RISC-V: paravirt: pvqspinlock: Add paravirt qspinlock skeleton guoren
2023-09-10  8:29   ` guoren
2023-09-15  5:42   ` Leonardo Bras
2023-09-15  5:42     ` Leonardo Bras
2023-09-17 14:58     ` Guo Ren
2023-09-17 14:58       ` Guo Ren
2023-09-19  5:43       ` Leonardo Bras
2023-09-19  5:43         ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 12/17] RISC-V: paravirt: pvqspinlock: Add nopvspin kernel parameter guoren
2023-09-10  8:29   ` guoren
2023-09-15  6:05   ` Leonardo Bras
2023-09-15  6:05     ` Leonardo Bras
2023-09-17 15:03     ` Guo Ren
2023-09-17 15:03       ` Guo Ren
2023-09-19  5:44       ` Leonardo Bras
2023-09-19  5:44         ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 13/17] RISC-V: paravirt: pvqspinlock: Add SBI implementation guoren
2023-09-10  8:29   ` guoren
2023-09-15  6:23   ` Leonardo Bras
2023-09-15  6:23     ` Leonardo Bras
2023-09-17 15:06     ` Guo Ren
2023-09-17 15:06       ` Guo Ren
2023-09-19  5:45       ` Leonardo Bras
2023-09-19  5:45         ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 14/17] RISC-V: paravirt: pvqspinlock: Add kconfig entry guoren
2023-09-10  8:29   ` guoren
2023-09-15  6:25   ` Leonardo Bras
2023-09-15  6:25     ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 15/17] RISC-V: paravirt: pvqspinlock: Add trace point for pv_kick/wait guoren
2023-09-10  8:29   ` guoren
2023-09-15  6:33   ` Leonardo Bras
2023-09-15  6:33     ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 16/17] RISC-V: paravirt: pvqspinlock: KVM: Add paravirt qspinlock skeleton guoren
2023-09-10  8:29   ` guoren
2023-09-15  6:46   ` Leonardo Bras [this message]
2023-09-15  6:46     ` Leonardo Bras
2023-09-10  8:29 ` [PATCH V11 17/17] RISC-V: paravirt: pvqspinlock: KVM: Implement kvm_sbi_ext_pvlock_kick_cpu() guoren
2023-09-10  8:29   ` guoren
2023-09-15  6:52   ` Leonardo Bras
2023-09-15  6:52     ` Leonardo Bras
2023-09-10  8:58 ` [PATCH V11 00/17] riscv: Add Native/Paravirt qspinlock support Conor Dooley
2023-09-10  8:58   ` Conor Dooley
2023-09-10  9:16   ` Guo Ren
2023-09-10  9:16     ` Guo Ren
2023-09-10  9:20     ` Guo Ren
2023-09-10  9:20       ` Guo Ren
2023-09-10  9:31     ` Conor Dooley
2023-09-10  9:31       ` Conor Dooley
2023-09-10  9:49       ` Guo Ren
2023-09-10  9:49         ` Guo Ren
2023-09-10 19:45         ` Conor Dooley
2023-09-10 19:45           ` Conor Dooley
2023-09-11  3:36           ` Guo Ren
2023-09-11  3:36             ` Guo Ren
2023-09-11 12:52             ` Conor Dooley
2023-09-11 12:52               ` Conor Dooley
2023-09-12  1:33               ` Guo Ren
2023-09-12  1:33                 ` Guo Ren
2023-09-12  8:07                 ` Conor Dooley
2023-09-12  8:07                   ` Conor Dooley
2023-09-12 10:58                   ` Guo Ren
2023-09-12 10:58                     ` Guo Ren
2023-11-06 20:42 ` Leonardo Bras
2023-11-06 20:42   ` Leonardo Bras
2023-11-12  4:23   ` Guo Ren
2023-11-12  4:23     ` Guo Ren
2023-11-13 10:19     ` Leonardo Bras Soares Passos
2023-11-13 10:19       ` Leonardo Bras Soares Passos

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