From: Oliver Upton <oliver.upton@linux.dev>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Marc Zyngier <maz@kernel.org>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Shaoqin Huang <shahuang@redhat.com>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v5 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test
Date: Fri, 15 Sep 2023 21:00:01 +0000 [thread overview]
Message-ID: <ZQTF0bxzXN2kUPTI@linux.dev> (raw)
In-Reply-To: <20230817003029.3073210-11-rananta@google.com>
Hi Raghu,
On Thu, Aug 17, 2023 at 12:30:27AM +0000, Raghavendra Rao Ananta wrote:
> From: Reiji Watanabe <reijiw@google.com>
>
> Introduce vpmu_counter_access test for arm64 platforms.
> The test configures PMUv3 for a vCPU, sets PMCR_EL0.N for the vCPU,
> and check if the guest can consistently see the same number of the
> PMU event counters (PMCR_EL0.N) that userspace sets.
> This test case is done with each of the PMCR_EL0.N values from
> 0 to 31 (With the PMCR_EL0.N values greater than the host value,
> the test expects KVM_SET_ONE_REG for the PMCR_EL0 to fail).
>
> Signed-off-by: Reiji Watanabe <reijiw@google.com>
> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> ---
> tools/testing/selftests/kvm/Makefile | 1 +
> .../kvm/aarch64/vpmu_counter_access.c | 235 ++++++++++++++++++
> 2 files changed, 236 insertions(+)
> create mode 100644 tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
>
> diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
> index c692cc86e7da8..a1599e2b82e38 100644
> --- a/tools/testing/selftests/kvm/Makefile
> +++ b/tools/testing/selftests/kvm/Makefile
> @@ -148,6 +148,7 @@ TEST_GEN_PROGS_aarch64 += aarch64/smccc_filter
> TEST_GEN_PROGS_aarch64 += aarch64/vcpu_width_config
> TEST_GEN_PROGS_aarch64 += aarch64/vgic_init
> TEST_GEN_PROGS_aarch64 += aarch64/vgic_irq
> +TEST_GEN_PROGS_aarch64 += aarch64/vpmu_counter_access
> TEST_GEN_PROGS_aarch64 += access_tracking_perf_test
> TEST_GEN_PROGS_aarch64 += demand_paging_test
> TEST_GEN_PROGS_aarch64 += dirty_log_test
> diff --git a/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c b/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
> new file mode 100644
> index 0000000000000..d0afec07948ef
> --- /dev/null
> +++ b/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
> @@ -0,0 +1,235 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * vpmu_counter_access - Test vPMU event counter access
> + *
> + * Copyright (c) 2022 Google LLC.
> + *
> + * This test checks if the guest can see the same number of the PMU event
> + * counters (PMCR_EL0.N) that userspace sets.
> + * This test runs only when KVM_CAP_ARM_PMU_V3 is supported on the host.
> + */
> +#include <kvm_util.h>
> +#include <processor.h>
> +#include <test_util.h>
> +#include <vgic.h>
> +#include <perf/arm_pmuv3.h>
> +#include <linux/bitfield.h>
> +
> +/* The max number of the PMU event counters (excluding the cycle counter) */
> +#define ARMV8_PMU_MAX_GENERAL_COUNTERS (ARMV8_PMU_MAX_COUNTERS - 1)
> +
> +struct vpmu_vm {
> + struct kvm_vm *vm;
> + struct kvm_vcpu *vcpu;
> + int gic_fd;
> +};
> +
nit: this test is single threaded, so there will only ever be a single
instance of a VM at a time. Dynamically allocating a backing structure
doesn't add any value, IMO.
You can just get away with using globals.
> +/*
> + * Create a guest with one vCPU, and attempt to set the PMCR_EL0.N for
> + * the vCPU to @pmcr_n, which is larger than the host value.
> + * The attempt should fail as @pmcr_n is too big to set for the vCPU.
> + */
> +static void run_error_test(uint64_t pmcr_n)
> +{
> + struct vpmu_vm *vpmu_vm;
> + struct kvm_vcpu *vcpu;
> + int ret;
> + uint64_t pmcr, pmcr_orig;
> +
> + pr_debug("Error test with pmcr_n %lu (larger than the host)\n", pmcr_n);
> + vpmu_vm = create_vpmu_vm(guest_code);
> + vcpu = vpmu_vm->vcpu;
> +
> + /* Update the PMCR_EL0.N with @pmcr_n */
> + vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_PMCR_EL0), &pmcr_orig);
> + pmcr = pmcr_orig & ~ARMV8_PMU_PMCR_N;
> + pmcr |= (pmcr_n << ARMV8_PMU_PMCR_N_SHIFT);
> +
> + /* This should fail as @pmcr_n is too big to set for the vCPU */
> + ret = __vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_PMCR_EL0), pmcr);
> + TEST_ASSERT(ret, "Setting PMCR to 0x%lx (orig PMCR 0x%lx) didn't fail",
> + pmcr, pmcr_orig);
The failure pattern for this should now be the write to PMCR_EL0.N had
no effect.
--
Thanks,
Oliver
WARNING: multiple messages have this Message-ID (diff)
From: Oliver Upton <oliver.upton@linux.dev>
To: Raghavendra Rao Ananta <rananta@google.com>
Cc: Marc Zyngier <maz@kernel.org>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Shaoqin Huang <shahuang@redhat.com>,
Jing Zhang <jingzhangos@google.com>,
Reiji Watanabe <reijiw@google.com>,
Colton Lewis <coltonlewis@google.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v5 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test
Date: Fri, 15 Sep 2023 21:00:01 +0000 [thread overview]
Message-ID: <ZQTF0bxzXN2kUPTI@linux.dev> (raw)
In-Reply-To: <20230817003029.3073210-11-rananta@google.com>
Hi Raghu,
On Thu, Aug 17, 2023 at 12:30:27AM +0000, Raghavendra Rao Ananta wrote:
> From: Reiji Watanabe <reijiw@google.com>
>
> Introduce vpmu_counter_access test for arm64 platforms.
> The test configures PMUv3 for a vCPU, sets PMCR_EL0.N for the vCPU,
> and check if the guest can consistently see the same number of the
> PMU event counters (PMCR_EL0.N) that userspace sets.
> This test case is done with each of the PMCR_EL0.N values from
> 0 to 31 (With the PMCR_EL0.N values greater than the host value,
> the test expects KVM_SET_ONE_REG for the PMCR_EL0 to fail).
>
> Signed-off-by: Reiji Watanabe <reijiw@google.com>
> Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
> ---
> tools/testing/selftests/kvm/Makefile | 1 +
> .../kvm/aarch64/vpmu_counter_access.c | 235 ++++++++++++++++++
> 2 files changed, 236 insertions(+)
> create mode 100644 tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
>
> diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
> index c692cc86e7da8..a1599e2b82e38 100644
> --- a/tools/testing/selftests/kvm/Makefile
> +++ b/tools/testing/selftests/kvm/Makefile
> @@ -148,6 +148,7 @@ TEST_GEN_PROGS_aarch64 += aarch64/smccc_filter
> TEST_GEN_PROGS_aarch64 += aarch64/vcpu_width_config
> TEST_GEN_PROGS_aarch64 += aarch64/vgic_init
> TEST_GEN_PROGS_aarch64 += aarch64/vgic_irq
> +TEST_GEN_PROGS_aarch64 += aarch64/vpmu_counter_access
> TEST_GEN_PROGS_aarch64 += access_tracking_perf_test
> TEST_GEN_PROGS_aarch64 += demand_paging_test
> TEST_GEN_PROGS_aarch64 += dirty_log_test
> diff --git a/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c b/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
> new file mode 100644
> index 0000000000000..d0afec07948ef
> --- /dev/null
> +++ b/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
> @@ -0,0 +1,235 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * vpmu_counter_access - Test vPMU event counter access
> + *
> + * Copyright (c) 2022 Google LLC.
> + *
> + * This test checks if the guest can see the same number of the PMU event
> + * counters (PMCR_EL0.N) that userspace sets.
> + * This test runs only when KVM_CAP_ARM_PMU_V3 is supported on the host.
> + */
> +#include <kvm_util.h>
> +#include <processor.h>
> +#include <test_util.h>
> +#include <vgic.h>
> +#include <perf/arm_pmuv3.h>
> +#include <linux/bitfield.h>
> +
> +/* The max number of the PMU event counters (excluding the cycle counter) */
> +#define ARMV8_PMU_MAX_GENERAL_COUNTERS (ARMV8_PMU_MAX_COUNTERS - 1)
> +
> +struct vpmu_vm {
> + struct kvm_vm *vm;
> + struct kvm_vcpu *vcpu;
> + int gic_fd;
> +};
> +
nit: this test is single threaded, so there will only ever be a single
instance of a VM at a time. Dynamically allocating a backing structure
doesn't add any value, IMO.
You can just get away with using globals.
> +/*
> + * Create a guest with one vCPU, and attempt to set the PMCR_EL0.N for
> + * the vCPU to @pmcr_n, which is larger than the host value.
> + * The attempt should fail as @pmcr_n is too big to set for the vCPU.
> + */
> +static void run_error_test(uint64_t pmcr_n)
> +{
> + struct vpmu_vm *vpmu_vm;
> + struct kvm_vcpu *vcpu;
> + int ret;
> + uint64_t pmcr, pmcr_orig;
> +
> + pr_debug("Error test with pmcr_n %lu (larger than the host)\n", pmcr_n);
> + vpmu_vm = create_vpmu_vm(guest_code);
> + vcpu = vpmu_vm->vcpu;
> +
> + /* Update the PMCR_EL0.N with @pmcr_n */
> + vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_PMCR_EL0), &pmcr_orig);
> + pmcr = pmcr_orig & ~ARMV8_PMU_PMCR_N;
> + pmcr |= (pmcr_n << ARMV8_PMU_PMCR_N_SHIFT);
> +
> + /* This should fail as @pmcr_n is too big to set for the vCPU */
> + ret = __vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_PMCR_EL0), pmcr);
> + TEST_ASSERT(ret, "Setting PMCR to 0x%lx (orig PMCR 0x%lx) didn't fail",
> + pmcr, pmcr_orig);
The failure pattern for this should now be the write to PMCR_EL0.N had
no effect.
--
Thanks,
Oliver
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next prev parent reply other threads:[~2023-09-15 21:00 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-17 0:30 [PATCH v5 00/12] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 01/12] KVM: arm64: PMU: Introduce a helper to set the guest's PMU Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-09-15 19:22 ` Oliver Upton
2023-09-15 19:22 ` Oliver Upton
2023-09-18 17:24 ` Raghavendra Rao Ananta
2023-09-18 17:24 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 02/12] KVM: arm64: PMU: Set the default PMU for the guest on vCPU reset Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 5:03 ` kernel test robot
2023-08-17 5:03 ` kernel test robot
2023-08-17 7:54 ` kernel test robot
2023-08-17 7:54 ` kernel test robot
2023-09-15 19:33 ` Oliver Upton
2023-09-15 19:33 ` Oliver Upton
2023-09-18 16:41 ` Raghavendra Rao Ananta
2023-09-18 16:41 ` Raghavendra Rao Ananta
2023-09-18 16:47 ` Oliver Upton
2023-09-18 16:47 ` Oliver Upton
2023-09-18 16:58 ` Raghavendra Rao Ananta
2023-09-18 16:58 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 03/12] KVM: arm64: PMU: Clear PM{C,I}NTEN{SET,CLR} and PMOVS{SET,CLR} " Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 05/12] KVM: arm64: PMU: Simplify extracting PMCR_EL0.N Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 6:38 ` kernel test robot
2023-08-17 6:38 ` kernel test robot
2023-09-15 19:56 ` Oliver Upton
2023-09-15 19:56 ` Oliver Upton
2023-09-18 16:53 ` Raghavendra Rao Ananta
2023-09-18 16:53 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 06/12] KVM: arm64: PMU: Add a helper to read a vCPU's PMCR_EL0 Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 07/12] KVM: arm64: PMU: Set PMCR_EL0.N for vCPU based on the associated PMU Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 08/12] KVM: arm64: PMU: Allow userspace to limit PMCR_EL0.N for the guest Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-21 12:12 ` Shaoqin Huang
2023-08-21 12:12 ` Shaoqin Huang
2023-08-21 23:28 ` Raghavendra Rao Ananta
2023-08-21 23:28 ` Raghavendra Rao Ananta
2023-08-22 3:26 ` Shaoqin Huang
2023-08-22 3:26 ` Shaoqin Huang
2023-09-15 20:36 ` Oliver Upton
2023-09-15 20:36 ` Oliver Upton
2023-09-18 17:02 ` Raghavendra Rao Ananta
2023-09-18 17:02 ` Raghavendra Rao Ananta
2023-08-22 10:05 ` Shaoqin Huang
2023-08-22 10:05 ` Shaoqin Huang
2023-08-23 16:06 ` Raghavendra Rao Ananta
2023-08-23 16:06 ` Raghavendra Rao Ananta
2023-08-24 8:50 ` Shaoqin Huang
2023-08-24 8:50 ` Shaoqin Huang
2023-08-25 22:34 ` Raghavendra Rao Ananta
2023-08-25 22:34 ` Raghavendra Rao Ananta
2023-08-26 2:40 ` Shaoqin Huang
2023-08-26 2:40 ` Shaoqin Huang
2023-09-15 20:53 ` Oliver Upton
2023-09-15 20:53 ` Oliver Upton
2023-09-15 21:54 ` Oliver Upton
2023-09-15 21:54 ` Oliver Upton
2023-09-18 17:11 ` Raghavendra Rao Ananta
2023-09-18 17:11 ` Raghavendra Rao Ananta
2023-09-18 17:22 ` Raghavendra Rao Ananta
2023-09-18 17:22 ` Raghavendra Rao Ananta
2023-09-18 17:07 ` Raghavendra Rao Ananta
2023-09-18 17:07 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 09/12] tools: Import arm_pmuv3.h Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 10/12] KVM: selftests: aarch64: Introduce vpmu_counter_access test Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-09-15 21:00 ` Oliver Upton [this message]
2023-09-15 21:00 ` Oliver Upton
2023-09-18 17:20 ` Raghavendra Rao Ananta
2023-09-18 17:20 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 11/12] KVM: selftests: aarch64: vPMU register test for implemented counters Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
2023-08-17 0:30 ` [PATCH v5 12/12] KVM: selftests: aarch64: vPMU register test for unimplemented counters Raghavendra Rao Ananta
2023-08-17 0:30 ` Raghavendra Rao Ananta
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