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* [Intel-xe] [PATCH] drm/xe/irq: Clear GFX_MSTR_IRQ as part of IRQ reset
@ 2023-09-19 14:41 Gustavo Sousa
  2023-09-19 14:45 ` [Intel-xe] ✓ CI.Patch_applied: success for " Patchwork
                   ` (8 more replies)
  0 siblings, 9 replies; 17+ messages in thread
From: Gustavo Sousa @ 2023-09-19 14:41 UTC (permalink / raw)
  To: intel-xe

Starting with Xe_LP+, GFX_MSTR_IRQ contains status bits that have W1C
behavior. If we do not properly reset them, we would miss delivery of
interrupts if a pending bit is set when enabling IRQs.

As an example, the display part of our probe routine contains paths
where we wait for vblank interrupts. If a display interrupt was already
pending when enabling IRQs, we would time out waiting for the vblank.

That in fact happened recently when modprobing Xe on a Lunar Lake with a
specific configuration; and that's how we found out we were missing this
step in the IRQ enabling logic.

Fix the issue by clearing GFX_MSTR_IRQ as part of the IRQ reset.

BSpec: 50875, 54028, 62357
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_irq.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index ccb934f8fa34..3746e9204e48 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -456,6 +456,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
 
 static void gt_irq_reset(struct xe_tile *tile)
 {
+	struct xe_device *xe = tile_to_xe(tile);
 	struct xe_gt *mmio = tile->primary_gt;
 
 	u32 ccs_mask = xe_hw_engine_mask_per_class(tile->primary_gt,
@@ -463,6 +464,9 @@ static void gt_irq_reset(struct xe_tile *tile)
 	u32 bcs_mask = xe_hw_engine_mask_per_class(tile->primary_gt,
 						   XE_ENGINE_CLASS_COPY);
 
+	if (GRAPHICS_VERx100(xe) >= 1210)
+		xe_mmio_write32(mmio, GFX_MSTR_IRQ, ~0);
+
 	/* Disable RCS, BCS, VCS and VECS class engines. */
 	xe_mmio_write32(mmio, RENDER_COPY_INTR_ENABLE, 0);
 	xe_mmio_write32(mmio, VCS_VECS_INTR_ENABLE, 0);
-- 
2.42.0


^ permalink raw reply related	[flat|nested] 17+ messages in thread
end of thread, other threads:[~2023-09-20 17:02 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
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2023-09-19 14:41 [Intel-xe] [PATCH] drm/xe/irq: Clear GFX_MSTR_IRQ as part of IRQ reset Gustavo Sousa
2023-09-19 14:45 ` [Intel-xe] ✓ CI.Patch_applied: success for " Patchwork
2023-09-19 14:45 ` [Intel-xe] ✓ CI.checkpatch: " Patchwork
2023-09-19 14:47 ` [Intel-xe] ✓ CI.KUnit: " Patchwork
2023-09-19 14:54 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-09-19 14:54 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-09-19 14:55 ` [Intel-xe] ✓ CI.checksparse: " Patchwork
2023-09-19 15:30 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
2023-09-19 17:31 ` [Intel-xe] [PATCH] " Lucas De Marchi
2023-09-19 17:35   ` Gustavo Sousa
2023-09-20  4:08     ` Lucas De Marchi
2023-09-20 10:56       ` Ville Syrjälä
2023-09-20 16:23         ` Gustavo Sousa
2023-09-20 17:02           ` Ville Syrjälä
2023-09-20 16:11       ` Gustavo Sousa
2023-09-19 21:15 ` Matt Roper
2023-09-20 14:44   ` Gustavo Sousa

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