From: Ido Schimmel <idosch@idosch.org>
To: "Drewek, Wojciech" <wojciech.drewek@intel.com>
Cc: Jakub Kicinski <kuba@kernel.org>,
"idosch@nvidia.com" <idosch@nvidia.com>,
"intel-wired-lan@lists.osuosl.org"
<intel-wired-lan@lists.osuosl.org>,
"Kitszel, Przemyslaw" <przemyslaw.kitszel@intel.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: [Intel-wired-lan] [PATCH iwl-next v2] ice: Disable Cage Max Power override
Date: Thu, 21 Sep 2023 15:09:22 +0300 [thread overview]
Message-ID: <ZQwycrJW5nhXu0TF@shredder> (raw)
In-Reply-To: <MW4PR11MB5776FD835D06ED08B07D3FD6FDF6A@MW4PR11MB5776.namprd11.prod.outlook.com>
On Fri, Sep 15, 2023 at 01:15:01PM +0000, Drewek, Wojciech wrote:
> In ice driver port split works per device not per port. According to
> /Documentation/networking/devlink/ice.rst, section "Port split":
> The "ice" driver supports port splitting only for port 0, as the FW has
> a predefined set of available port split options for the whole device.
> And if you look at available port options (same file) you'll see that in case of "Split count" 1
> only quad 1 is working. And in case of "Split count" 2 the second quad might be used. So, if we
> increase max_pwr in the first quad in case of "Split count" 1 and then switch to "Split count" 2,
> the second quad might end up with no link (because it will have decreased max_pwr).
But there's also an option where the second cage isn't actually used.
Anyway, my suggestion is to allow user space to set / get the max power
using ethtool and give user space visibility about link down reason via
the ethtool extended state.
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WARNING: multiple messages have this Message-ID (diff)
From: Ido Schimmel <idosch@idosch.org>
To: "Drewek, Wojciech" <wojciech.drewek@intel.com>
Cc: Jakub Kicinski <kuba@kernel.org>,
"intel-wired-lan@lists.osuosl.org"
<intel-wired-lan@lists.osuosl.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"Kitszel, Przemyslaw" <przemyslaw.kitszel@intel.com>,
"idosch@nvidia.com" <idosch@nvidia.com>
Subject: Re: [PATCH iwl-next v2] ice: Disable Cage Max Power override
Date: Thu, 21 Sep 2023 15:09:22 +0300 [thread overview]
Message-ID: <ZQwycrJW5nhXu0TF@shredder> (raw)
In-Reply-To: <MW4PR11MB5776FD835D06ED08B07D3FD6FDF6A@MW4PR11MB5776.namprd11.prod.outlook.com>
On Fri, Sep 15, 2023 at 01:15:01PM +0000, Drewek, Wojciech wrote:
> In ice driver port split works per device not per port. According to
> /Documentation/networking/devlink/ice.rst, section "Port split":
> The "ice" driver supports port splitting only for port 0, as the FW has
> a predefined set of available port split options for the whole device.
> And if you look at available port options (same file) you'll see that in case of "Split count" 1
> only quad 1 is working. And in case of "Split count" 2 the second quad might be used. So, if we
> increase max_pwr in the first quad in case of "Split count" 1 and then switch to "Split count" 2,
> the second quad might end up with no link (because it will have decreased max_pwr).
But there's also an option where the second cage isn't actually used.
Anyway, my suggestion is to allow user space to set / get the max power
using ethtool and give user space visibility about link down reason via
the ethtool extended state.
next prev parent reply other threads:[~2023-09-21 12:09 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-24 8:54 [Intel-wired-lan] [PATCH iwl-next v2] ice: Disable Cage Max Power override Wojciech Drewek
2023-08-24 8:54 ` Wojciech Drewek
2023-08-24 9:38 ` [Intel-wired-lan] " Przemek Kitszel
2023-08-24 9:38 ` Przemek Kitszel
2023-08-24 15:32 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-24 15:32 ` Jakub Kicinski
2023-08-25 11:01 ` [Intel-wired-lan] " Drewek, Wojciech
2023-08-25 11:01 ` Drewek, Wojciech
2023-08-26 0:54 ` [Intel-wired-lan] " Jakub Kicinski
2023-08-26 0:54 ` Jakub Kicinski
2023-08-27 8:47 ` [Intel-wired-lan] " Ido Schimmel
2023-08-27 8:47 ` Ido Schimmel
2023-08-29 9:12 ` [Intel-wired-lan] " Drewek, Wojciech
2023-08-29 9:12 ` Drewek, Wojciech
2023-08-30 15:17 ` [Intel-wired-lan] " Ido Schimmel
2023-08-30 15:17 ` Ido Schimmel
2023-09-01 13:34 ` [Intel-wired-lan] " Drewek, Wojciech
2023-09-01 13:34 ` Drewek, Wojciech
2023-09-12 14:26 ` [Intel-wired-lan] " Ido Schimmel
2023-09-12 14:26 ` Ido Schimmel
2023-09-15 13:15 ` [Intel-wired-lan] " Drewek, Wojciech
2023-09-15 13:15 ` Drewek, Wojciech
2023-09-21 12:09 ` Ido Schimmel [this message]
2023-09-21 12:09 ` Ido Schimmel
2023-10-05 13:58 ` [Intel-wired-lan] " Drewek, Wojciech
2023-10-05 13:58 ` Drewek, Wojciech
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